"A High-Speed Parallel FPGA Implementation of Harris Corner Detection."

Hongtao Zhou et al. (2020)

> Home

Details and statistics

DOI: 10.1109/ICTA50426.2020.9332111

access: closed

type: Conference or Workshop Paper

metadata version: 2023-11-02

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/icta3/ZhouDYQ0WL20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/icta3/ZhouDYQ0WL20
Hongtao Zhou, Runjiang Dou, Shuangming Yu, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu:
A High-Speed Parallel FPGA Implementation of Harris Corner Detection. ICTA 2020: 71-72

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.