"A 12.75-to-16-GHz Spur-Jitter-Joint-Optimization SS-PLL Achieving ..."

Yixi Li et al. (2023)

> Home

Details and statistics

DOI: 10.1109/A-SSCC58667.2023.10347983

access: closed

type: Conference or Workshop Paper

metadata version: 2024-07-22

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/asscc/LiZCSZQLWL23
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/asscc/LiZCSZQLWL23
Yixi Li, Zhao Zhang, Yong Chen, Xinyu Shen, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu:
A 12.75-to-16-GHz Spur-Jitter-Joint-Optimization SS-PLL Achieving -94.55-dBc Reference Spur, 31.9-fs Integrated Jitter and -260.1-dB FoM. A-SSCC 2023: 1-3

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.