default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDIEEE Transactions on Computers, Volume 68
Volume 68, Number 1, January 2019
- Paolo Montuschi
:
Thank-You State of the Journal Editorial by the Outgoing Editor-in-Chief. 1-2 - Ahmed Louri:
Editorial from the Incoming Editor-in-Chief. 3 - Alejandro Valero, Francisco Candel, Darío Suárez Gracia, Salvador Petit, Julio Sahuquillo:
An Aging-Aware GPU Register File Design Based on Data Redundancy. 4-20 - Yi Wu, You Li, Xiangxuan Ge, Yuan Gao, Weikang Qian:
An Efficient Method for Calculating the Error Statistics of Block-Based Approximate Adders. 21-38 - Kwangwon Koh, Kangho Kim, Seung-Hyub Jeon, Jaehyuk Huh:
Disaggregated Cloud Memory with Elastic Block Management. 39-52 - Heba Khdr, Hussam Amrouch, Jörg Henkel:
Dynamic Guardband Selection: Thermal-Aware Optimization for Unreliable Multi-Core Systems. 53-66 - Nusa Zidaric, Mark D. Aagaard, Guang Gong:
Hardware Optimizations and Analysis for the WG-16 Cipher with Tower Field Arithmetic. 67-82 - Yejia Di, Liang Shi, Congming Gao, Qiao Li, Chun Jason Xue, Kaijie Wu:
Minimizing Retention Induced Refresh Through Exploiting Process Variation of Flash Memory. 83-98 - Orhun Kara, Muhammed F. Esgin:
On Analysis of Lightweight Stream Ciphers with Keyed Update. 99-110 - Ming-Chang Yang, Yuan-Hao Chang, Fenggang Wu, Tei-Wei Kuo, David H. C. Du:
On Improving the Write Responsiveness for Host-Aware SMR Drives. 111-124 - Andrea Gulino, Abdulrahman Kaitoua, Stefano Ceri:
Optimal Binning for Genomics. 125-138 - Jian Liu, Wenting Li, Ghassan O. Karame, N. Asokan:
Scalable Byzantine Consensus via Hardware-Assisted Secret Sharing. 139-151
Volume 68, Number 2, February 2019
- Chang-Ai Sun, Hepeng Dai, Huai Liu, Tsong Yueh Chen, Kai-Yuan Cai:
Adaptive Partition Testing. 157-169 - Peng Liu, Shunbin Li, Qingyuan Ding:
An Energy-Efficient Accelerator Based on Hybrid CPU-FPGA Devices for Password Recovery. 170-181 - Farimah Farahmandi, Prabhat Mishra:
Automated Test Generation for Debugging Multiple Bugs in Arithmetic Circuits. 182-197 - Junshi Wang, Masoumeh Ebrahimi, Letian Huang, Xuan Xie, Qiang Li, Guangjun Li, Axel Jantsch:
Efficient Design-for-Test Approach for Networks-on-Chip. 198-213 - Alfonso Sánchez-Macián, Luis Alberto Aranda, Pedro Reviriego, Vahdaneh Kiani, Juan Antonio Maestro:
Enhancing Instruction TLB Resilience to Soft Errors. 214-224 - Shiru Ren, Yunqi Zhang, Lichen Pan, Zhen Xiao:
Phantasy: Low-Latency Virtualization-Based Fault Tolerance via Asynchronous Prefetching. 225-238 - Thomas Grass, Trevor E. Carlson, Alejandro Rico, Germán Ceballos, Eduard Ayguadé, Marc Casas, Miquel Moretó:
Sampled Simulation of Task-Based Programs. 255-269 - Xi Cheng, Min Zhou, Xiaoyu Song, Ming Gu, Jiaguang Sun:
Tolerating C Integer Error via Precision Elevation. 270-286 - Chongyan Gu, Weiqiang Liu, Neil Hanley, Robert Hesselbarth, Máire O'Neill:
A Theoretical Model to Link Uniqueness and Min-Entropy for PUF Evaluations. 287-293 - Kazuteru Namba, Fabrizio Lombardi:
Coding for Write Latency Reduction in a Multi-Level Cell (MLC) Phase Change Memory (PCM). 301-306 - Prawar Poudel, Biswajit Ray, Aleksandar Milenkovic:
Microcontroller TRNGs Using Perturbed States of NOR Flash Memory Cells. 307-313 - Shuo Li, Nong Xiao, Peng Wang, Guangyu Sun, Xiaoyang Wang, Yiran Chen, Hai Helen Li, Jason Cong, Tao Zhang:
RC-NVM: Dual-Addressing Non-Volatile Memory Architecture Supporting Both Row and Column Memory Accesses. 239-254 - Gabriel Rodríguez, Mahmut T. Kandemir, Juan Touriño:
Affine Modeling of Program Traces. 294-300
Volume 68, Number 3, March 2019
- Sunil Dutt, Satyabrata Dash, Sukumar Nandi, Gaurav Trivedi:
Analysis, Modeling and Optimization of Equal Segment Based Approximate Adders. 314-330 - Subho S. Banerjee, Mohamed El-Hadedy, Jong Bin Lim, Zbigniew T. Kalbarczyk, Deming Chen, Steven S. Lumetta, Ravishankar K. Iyer:
ASAP: Accelerated Short-Read Alignment on Programmable Hardware. 331-346 - Debapriya Basu Roy, Shivam Bhasin, Sylvain Guilley, Annelie Heuser, Sikhar Patranabis, Debdeep Mukhopadhyay:
CC Meets FIPS: A Hybrid Test Methodology for First Order Side Channel Analysis. 347-361 - Shibo Wang, Mahdi Nazm Bojnordi, Xiaochen Guo, Engin Ipek:
Content Aware Refresh: Exploiting the Asymmetry of DRAM Retention Errors to Reduce the Refresh Frequency of Less Vulnerable Data. 362-374 - Quintin Fettes, Mark Clark, Razvan C. Bunescu, Avinash Karanth, Ahmed Louri:
Dynamic Voltage and Frequency Scaling in NoCs with Supervised and Reinforcement Learning Techniques. 375-389 - Seongjae Park, Minchan Kim, Heon Y. Yeom:
GCMA: Guaranteed Contiguous Memory Allocator. 390-401 - Xiaoyi Zhang, Dan Feng, Yu Hua, Jianxi Chen:
Optimizing File Systems with a Write-Efficient Journaling Scheme on Non-Volatile Memory. 402-413 - Chengwen Wu, Guangyan Zhang, Yang Wang, Xinyang Jiang, Weimin Zheng:
Redio: Accelerating Disk-Based Graph Processing by Reducing Disk I/Os. 414-425 - Xubin Chen, Yin Li, Tong Zhang:
Reducing Flash Memory Write Traffic by Exploiting a Few MBs of Capacitor-Powered Write Buffer Inside Solid-State Drives (SSDs). 426-439 - David Kozhaya, Jeremie Decouchant, Paulo Jorge Esteves Veríssimo:
RT-ByzCast: Byzantine-Resilient Real-Time Reliable Broadcast. 440-454 - Elham Cheshmikhani, Hamed Farbeh, Seyed Ghassem Miremadi, Hossein Asadi:
TA-LRW: A Replacement Policy for Error Rate Reduction in STT-MRAM Caches. 455-470
Volume 68, Number 4, April 2019
- Jian Zhou, Huafeng Wu, Jun Wang:
ApproxSSD: Data Layout Aware Sampling on an Array of SSDs. 471-483 - Fabian Schuiki, Michael Schaffner, Frank K. Gürkaynak, Luca Benini:
A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets. 484-497 - Weining Song, Yang Zhou, Mengying Zhao, Lei Ju, Chun Jason Xue, Zhiping Jia:
EMC: Energy-Aware Morphable Cache Design for Non-Volatile Processors. 498-509 - Pirmin Vogel, Andrea Marongiu, Luca Benini:
Exploring Shared Virtual Memory for FPGA Accelerators with a Configurable IOMMU. 510-525 - Hai Wang, Diya Tang, Ming Zhang, Sheldon X.-D. Tan, Chi Zhang, He Tang, Yuan Yuan:
GDP: A Greedy Based Dynamic Power Budgeting Method for Multi/Many-Core Systems in Dark Silicon. 526-541 - Ning Pang, Jifu Zhang, Chaowei Zhang, Xiao Qin:
Parallel Hierarchical Subspace Clustering of Categorical Data. 542-555 - Panping Zhou, Jianzhong Huang, Xiao Qin, Changsheng Xie:
PaRS: A Popularity-Aware Redundancy Scheme for In-Memory Stores. 556-569 - Kamil Doruk Gür, Yuriy Polyakov, Kurt Rohloff, Gerard W. Ryan, Hadi Sajjadpour, Erkay Savas:
Practical Applications of Improved Gaussian Sampling for Trapdoor Lattices. 570-584 - Liwei Kuang, Laurence T. Yang, Qing Zhu, Jinjun Chen:
Secure Tensor Decomposition for Big Data Using Transparent Computing Paradigm. 585-596 - Anastasia Volkova, Matei Istoan, Florent de Dinechin, Thibault Hilaire:
Towards Hardware IIR Filters Computing Just Right: Direct Form I Case Study. 597-608 - Yunho Oh, Keunsoo Kim, Myung Kuk Yoon, Jong Hyun Park, Yongjun Park, Murali Annavaram, Won Woo Ro:
Adaptive Cooperation of Prefetching and Warp Scheduling on GPUs. 609-616 - Yinglin Zhao, Peng Ouyang, Wang Kang, Shouyi Yin, Youguang Zhang, Shaojun Wei, Weisheng Zhao:
An STT-MRAM Based in Memory Architecture for Low Power Integral Computing. 617-623 - Magnus Gausdal Find, René Peralta:
Better Circuits for Binary Polynomial Multiplication. 624-630
Volume 68, Number 5, May 2019
- Dan Huang, Qing Liu, Jong Choi, Norbert Podhorszki, Scott Klasky, Jeremy Logan, George Ostrouchov, Xubin He, Matthew Wolf:
Can I/O Variability Be Reduced on QoS-Less HPC Storage Systems? 631-645 - Hsing Min Chen, Shin-Ying Lee, Trevor N. Mudge, Carole-Jean Wu, Chaitali Chakrabarti:
Configurable-ECC: Architecting a Flexible ECC Scheme to Support Different Sized Accesses in High Bandwidth Memory Systems. 646-659 - Min Soo Kim, Alberto A. Del Barrio, Leonardo Tavares Oliveira, Román Hermida, Nader Bagherzadeh:
Efficient Mitchell's Approximate Log Multipliers for Convolutional Neural Networks. 660-675 - José L. Núñez-Yáñez:
Energy Proportional Neural Network Inference with Adaptive Voltage and Frequency Scaling. 676-687 - Gustavo H. M. Zanon, Marcos A. Simplício Jr., Geovandro C. C. F. Pereira, Javad Doliskani, Paulo S. L. M. Barreto:
Faster Key Compression for Isogeny-Based Cryptosystems. 688-701 - Rima Bellal, El-sedik Lamini, Hacène Belbachir, Samir Tagzout, Adel Belouchrani:
Improved Affine Arithmetic-Based Precision Analysis for Polynomial Function Evaluation. 702-712 - Davide Gadioli, Emanuele Vitali, Gianluca Palermo, Cristina Silvano:
mARGOt: A Dynamic Autotuning Framework for Self-Aware Approximate Computing. 713-728 - Edgard Muñoz-Coreas, Himanshu Thapliyal:
Quantum Circuit Design of a T-count Optimized Integer Multiplier. 729-739 - Allyson Bonetti França, Danilo Leal Maciel, José Marques Soares, Giovanni Cordeiro Barroso:
Sherlock N-overlap: Invasive Normalization and Overlap Coefficient for the Similarity Analysis Between Source Code. 740-751 - Jaemin Jang, Wongyu Shin, Jungwhan Choi, Yongju Kim, Lee-Sup Kim:
Sparse-Insertion Write Cache to Mitigate Write Disturbance Errors in Phase Change Memory. 752-764 - Alessandro Vallero, Alessandro Savino, Athanasios Chatzidimitriou, Manolis Kaliorakis, Maha Kooli, Marc Riera, Martí Anglada, Giorgio Di Natale, Alberto Bosio, Ramon Canal, Antonio González, Dimitris Gizopoulos, Riccardo Mariani, Stefano Di Carlo:
SyRA: Early System Reliability Analysis for Cross-Layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems. 765-783 - Ke Chen, Linbin Chen, Pedro Reviriego, Fabrizio Lombardi:
Efficient Implementations of Reduced Precision Redundancy (RPR) Multiply and Accumulate (MAC). 784-790 - Eleonora Testa, Mathias Soeken, Luca Gaetano Amarù, Winston Haaswijk, Giovanni De Micheli:
Mapping Monotone Boolean Functions into Majority. 791-797 - Pedro Reviriego, Shanshan Liu, Ori Rottenstreich, Fabrizio Lombardi:
Two Bit Overlap: A Class of Double Error Correction One Step Majority Logic Decodable Codes. 798-803
Volume 68, Number 6, June 2019
- Weiqiang Liu, Tian Cao, Peipei Yin, Yuying Zhu, Chenghua Wang, Earl E. Swartzlander Jr., Fabrizio Lombardi:
Design and Analysis of Approximate Redundant Binary Multipliers. 804-819 - Daniel Casini, Alessandro Biondi, Giorgio C. Buttazzo:
Handling Transients of Dynamic Real-Time Workload Under EDF Scheduling. 820-835 - Suzana Milutinovic, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Increasing the Reliability of Software Timing Analysis for Cache-Based Processors. 836-851 - Biresh Kumar Joardar, Ryan Gary Kim, Janardhan Rao Doppa, Partha Pratim Pande, Diana Marculescu, Radu Marculescu:
Learning-Based Application-Agnostic 3D NoC Design for Heterogeneous Manycore Systems. 852-866 - Wenyan Lu, Guihai Yan, Jiajun Li, Shijun Gong, Shuhao Jiang, Jingya Wu, Xiaowei Li:
Promoting the Harmony between Sparsity and Regularity: A Relaxed Synchronous Architecture for Convolutional Neural Networks. 867-881 - Maolin Yang, Wen-Hung Huang, Jian-Jia Chen:
Resource-Oriented Partitioning for Multiprocessor Systems with Shared Resources. 882-898 - Adrián Pérez-Resa, Miguel Garcia-Bosque, Carlos Sánchez-Azqueta, Santiago Celma:
Self-Synchronized Encryption for Physical Layer in 10Gbps Optical Links. 899-911 - Sanchari Sen, Shubham Jain, Swagath Venkataramani, Anand Raghunathan:
SparCE: Sparsity Aware General-Purpose Core Extensions to Accelerate Deep Neural Networks. 912-925 - Yecheng Zhao, Haibo Zeng:
The Concept of Unschedulability Core for Optimizing Real-Time Systems with Fixed-Priority Scheduling. 926-938 - Zubair Md. Fadlullah, Bomin Mao, Fengxiao Tang, Nei Kato:
Value Iteration Architecture Based Deep Learning for Intelligent Routing Exploiting Heterogeneous Computing Platforms. 939-950
Volume 68, Number 7, July 2019
- Javier D. Bruguera, Florent de Dinechin:
Guest Editors Introduction: Special Section on Computer Arithmetic. 951-952 - Victor Magron, Alexandre Rocca, Thao Dang:
Certified Roundoff Error Bounds Using Bernstein Expansions and Sparse Krivine-Stengle Representations. 953-966 - Neil Burgess, Christopher E. Goodyer, Christopher Neal Hinds, David Raymond Lutz:
High-Precision Anchored Accumulators for Reproducible Floating-Point Summation. 967-978 - Joppe W. Bos, Simon Friedberger:
Arithmetic Considerations for Isogeny-Based Cryptography. 979-990 - Arash Reyhani-Masoleh, Hayssam El-Razouk, Amin Monfared:
New Multiplicative Inverse Architectures Using Gaussian Normal Basis. 991-1006 - Seyyedeh Atefeh Musavi, Mahmoud Reza Hashemi:
An Ontology-Based Method for HW/SW Architecture Reconstruction. 1007-1018 - Dongliang Xue, Linpeng Huang, Chao Li, Chentao Wu:
Dapper: An Adaptive Manager for Large-Capacity Persistent Memory. 1019-1034 - Hao Zhang, Dongdong Chen, Seok-Bum Ko:
Efficient Multiple-Precision Floating-Point Fused Multiply-Add with Mixed-Precision Support. 1035-1048 - Konstantinos Maragos, George Lentaris, Dimitrios Soudris:
In-the-Field Mitigation of Process Variability for Improved FPGA Performance. 1049-1063 - Lu Wang, Xia Zhao, David R. Kaeli, Zhiying Wang, Lieven Eeckhout:
Intra-Cluster Coalescing and Distributed-Block Scheduling to Reduce GPU NoC Pressure. 1064-1076 - Guohui Li, Chunyang Zhou, Jianjun Li, Bing Guo:
Maintaining Data Freshness in Distributed Cyber-Physical Systems. 1077-1090 - Rei Ueno, Manami Suzuki, Naofumi Homma:
Tackling Biased PUFs Through Biased Masking: A Debiasing Method for Efficient Fuzzy Extractor. 1091-1104 - Nobutaka Kito, Naofumi Takagi:
Concurrent Error Detectable Carry Select Adder with Easy Testability. 1105-1110
Volume 68, Number 8, August 2019
- Yuan-Hao Chang, Jingtong Hu, Mehdi Baradaran Tahoori, Ronald F. DeMara:
Guest Editorial: IEEE Transactions on Computers Special Section on Emerging Non-Volatile Memory Technologies: From Devices to Architectures and Systems. 1111-1113 - Reza Salkhordeh, Onur Mutlu, Hossein Asadi:
An Analytical Model for Performance and Lifetime Estimation of Hybrid DRAM-NVM Main Memories. 1114-1130 - Guohao Dai, Tianhao Huang, Yu Wang, Huazhong Yang, John Wawrzynek:
HyVE: Hybrid Vertex-Edge Memory Hierarchy for Energy-Efficient Graph Processing. 1131-1146 - Youmin Chen, Youyou Lu, Pei Chen, Jiwu Shu:
Efficient and Consistent NVMM Cache for SSD-Based File System. 1147-1158 - Masoud Zabihi, Zamshed Iqbal Chowdhury, Zhengyang Zhao, Ulya R. Karpuzcu, Jianping Wang, Sachin S. Sapatnekar:
In-Memory Processing on the Spintronic CRAM: From Hardware Design to Application Mapping. 1159-1173 - Lei Yang, Weichen Liu, Nan Guan, Nikil D. Dutt:
Optimal Application Mapping and Scheduling for Network-on-Chips with Computation in STT-RAM Based Router. 1174-1189 - Amogh Agrawal, Aayush Ankit, Kaushik Roy:
SPARE: Spiking Neural Network Acceleration Using ROM-Embedded RAMs as In-Memory-Computation Primitives. 1190-1200 - Indranil Roy, Ankit Srivastava, Matt Grimm, Marziyeh Nourian, Michela Becchi, Srinivas Aluru:
Evaluating High Performance Pattern Matching on the Automata Processor. 1201-1212 - Anton V. Gorshkov, Michael Berezalsky, Julia Fedorova, Konstantin Levit-Gurevich, Noam Itzhaki:
GPU Instruction Hotspots Detection Based on Binary Instrumentation Approach. 1213-1224 - Jiangshan Yu, David Kozhaya, Jeremie Decouchant, Paulo Jorge Esteves Veríssimo:
RepuCoin: Your Reputation Is Your Power. 1225-1237 - El Mehdi Benhani, Lilian Bossuet, Alain Aubert:
The Security of ARM TrustZone in a FPGA-Based SoC. 1238-1248 - Weiqiang Liu, Jian Ni, Zhe Liu, Chunyang Liu, Máire O'Neill:
Optimized Modular Multiplication for Supersingular Isogeny Diffie-Hellman. 1249-1255
Volume 68, Number 9, September 2019
- Bomin Mao, Fengxiao Tang, Zubair Md. Fadlullah, Nei Kato:
An Absorbing Markov Chain Based Model to Solve Computation and Communication Tradeoff in GPU-Accelerated MDRUs for Safety Confirmation in Disaster Scenarios. 1256-1268 - Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa:
Boolean Minimization of Projected Sums of Products via Boolean Relations. 1269-1282 - Xia Zhao, Sheng Ma, Zhiying Wang, Natalie D. Enright Jerger, Lieven Eeckhout:
CD-Xbar: A Converge-Diverge Crossbar Network for High-Performance GPUs. 1283-1296 - Sukarn Agarwal, Hemangee K. Kapoor:
Improving the Lifetime of Non-Volatile Cache by Write Restriction. 1297-1312 - Xueliang Wei, Dan Feng, Wei Tong, Jingning Liu, Liuqing Ye:
NICO: Reducing Software-Transparent Crash Consistency Cost for Persistent Memory. 1313-1324 - Saransh Gupta, Mohsen Imani, Harveen Kaur, Tajana Simunic Rosing:
NNPIM: A Processing In-Memory Architecture for Neural Network Acceleration. 1325-1337 - Chunhua Xiao, Lei Zhang, Weichen Liu, Linfeng Cheng, Pengda Li, Yanyue Pan, Neil Bergmann:
NV-eCryptfs: Accelerating Enterprise-Level Cryptographic File System with Non-Volatile Memory. 1338-1352 - Xinmiao Zhang, Yingjie Lao:
On the Construction of Composite Finite Fields for Hardware Obfuscation. 1353-1364 - Mingzhe Zhang, Lunkai Zhang, Lei Jiang, Frederic T. Chong, Zhiyong Liu:
Quick-and-Dirty: An Architecture for High-Performance Temporary Short Writes in MLC PCM. 1365-1375 - Xiaoda Zhang, Zhuzhong Qian, Sheng Zhang, Xiangbo Li, Xiaoliang Wang, Sanglu Lu:
Semi-Clairvoyant Scheduling in Data Analytics Systems. 1376-1389 - Gautier Berthou, Tristan Delizy, Kevin Marquet, Tanguy Risset, Guillaume Salagnac:
Sytare: A Lightweight Kernel for NVRAM-Based Transiently-Powered Systems. 1390-1403 - Alexis Ramos, Ricardo Gonzalez-Toral, Pedro Reviriego, Juan Antonio Maestro:
An ALU Protection Methodology for Soft Processors on SRAM-Based FPGAs. 1404-1410
Volume 68, Number 10, October 2019
- Yang Shi, Wujing Wei, Hongfei Fan, Man Ho Au, Xiapu Luo:
A Light-Weight White-Box Encryption Scheme for Securing Distributed Embedded Devices. 1411-1427 - Moonsoo Kim, Jungwoo Choi, Hyun Kim, Hyuk-Jae Lee:
An Effective DRAM Address Remapping for Mitigating Rowhammer Errors. 1428-1441 - Francisco Candel, Alejandro Valero, Salvador Petit, Julio Sahuquillo:
Efficient Management of Cache Accesses to Boost GPGPU Memory Subsystem Performance. 1442-1454 - Jonathan Woodruff, Alexandre Joannou, Hongyan Xia, Anthony C. J. Fox, Robert M. Norton, David Chisnall, Brooks Davis, Khilan Gudka, Nathaniel Wesley Filardo, A. Theodore Markettos, Michael Roe, Peter G. Neumann, Robert N. M. Watson, Simon W. Moore:
CHERI Concentrate: Practical Compressed Capabilities. 1455-1469 - Yonglin Hao, Takanori Isobe, Lin Jiao, Chaoyun Li, Willi Meier, Yosuke Todo, Qingju Wang:
Improved Division Property Based Cube Attacks Exploiting Algebraic Properties of Superpoly. 1470-1486 - Xiaoliang Dai, Hongxu Yin, Niraj K. Jha:
NeST: A Neural Network Synthesis Tool Based on a Grow-and-Prune Paradigm. 1487-1497 - Sikhar Patranabis, Nilanjan Datta, Dirmanto Jap, Jakub Breier, Shivam Bhasin, Debdeep Mukhopadhyay:
SCADFA: Combined SCA+DFA Attacks on Block Ciphers with Practical Validations. 1498-1510 - Houssam-Eddine Zahaf, Giuseppe Lipari, Marko Bertogna, Pierre Boulet:
The Parallel Multi-Mode Digraph Task Model for Energy-Aware Real-Time Heterogeneous Multi-Core Systems. 1511-1524 - Michele Lora, Sara Vinco, Franco Fummi:
Translation, Abstraction and Integration for Effective Smart System Design. 1525-1538 - Fatemehsadat Mireshghallah, Mohammad Bakhshalipour, Mohammad Sadrosadati, Hamid Sarbazi-Azad:
Energy-Efficient Permanent Fault Tolerance in Hard Real-Time Systems. 1539-1545 - Moonsoo Kim, Ik-Joon Chang, Hyuk-Jae Lee:
Segmented Tag Cache: A Novel Cache Organization for Reducing Dynamic Read Energy. 1546-1552 - Alberto Nannarelli:
Tunable Floating-Point Adder. 1553-1560
Volume 68, Number 11, November 2019
- Duc-Phong Le, Sze Ling Yeo, Khoongming Khoo:
Algebraic Differential Fault Analysis on SIMON Block Cipher. 1561-1572 - Nicolas Fabiano, Jean-Michel Muller, Joris Picot:
Algorithms for Triple-Word Arithmetic. 1573-1583 - Yuhai Cao, Chao Li, Jing Wang, Weigong Zhang, Quan Chen, Jingwen Leng, Bin Yao, Yao Shen, Minyi Guo:
DR Refresh: Releasing DRAM Potential by Enabling Read Accesses Under Refresh. 1584-1596 - Ahmad Hassan, Dimitrios S. Nikolopoulos, Hans Vandierendonck:
Fast and Energy-Efficient OLAP Data Management on Hybrid Main Memory Systems. 1597-1611 - Gabriel Gallin, Arnaud Tisserand:
Generation of Finely-Pipelined GF(PP) Multipliers for Flexible Curve Based Cryptography on FPGAs. 1612-1622 - Kyle Kuan, Tosiron Adegbija:
HALLS: An Energy-Efficient Highly Adaptable Last Level STT-RAM Cache for Multicore Systems. 1623-1634 - Honglan Jiang, Leibo Liu, Fabrizio Lombardi, Jie Han:
Low-Power Unsigned Divider and Square Root Circuit Designs Using Adaptive Approximation. 1635-1646 - Hussam Amrouch, Seyed Borna Ehsani, Andreas Gerstlauer, Jörg Henkel:
On the Efficiency of Voltage Overscaling under Temperature and Aging Effects. 1647-1662 - Jiajun Li, Shuhao Jiang, Shijun Gong, Jingya Wu, Junchao Yan, Guihai Yan, Xiaowei Li:
SqueezeFlow: A Sparse CNN Accelerator Exploiting Concise Convolution Rules. 1663-1677 - G. Robert Redinbo:
Tensor Product DFT Codes vs Standard DFT Codes. 1678-1688 - Zhen Gu, Shuguo Li:
A Generalized RNS Mclaughlin Modular Multiplication with Non-Coprime Moduli Sets. 1689-1696 - Suganthi Venkatachalam, Elizabeth Adams, Hyuk Jae Lee, Seok-Bum Ko:
Design and Analysis of Area and Power Efficient Approximate Booth Multipliers. 1697-1703
Volume 68, Number 12, December 2019
- Jing-Yuan Luo, Hsiang-Yun Cheng, Ing-Chao Lin, Da-Wei Chang:
TAP: Reducing the Energy of Asymmetric Hybrid Last-Level Cache via Thrashing Aware Placement and Migration. 1704-1719 - Jérôme Courtois, Lokman A. Abbas-Turki, Jean-Claude Bajard:
Resilience of Randomized RNS Arithmetic with Respect to Side-Channel Leaks of Cryptographic Computation. 1720-1730 - Tao Ye, Yongzhuang Wei, Willi Meier:
A New Cube Attack on MORUS by Using Division Property. 1731-1740 - Jungwhan Choi, Jaemin Jang, Lee-Sup Kim:
DC-PCM: Mitigating PCM Write Disturbance with Low Performance Overhead by Using Detection Cells. 1741-1754 - Qihua Zhou, Kun Wang, Peng Li, Deze Zeng, Song Guo, Baoliu Ye, Minyi Guo:
Fast Coflow Scheduling via Traffic Compression and Stage Pipelining in Datacenter Networks. 1755-1771 - Hyokeun Lee, Moonsoo Kim, Hyunchul Kim, Hyun Kim, Hyuk-Jae Lee:
Integration and Boost of a Read-Modify-Write Module in Phase Change Memory System. 1772-1784 - Junlong Zhou, Xiaobo Sharon Hu, Yue Ma, Jin Sun, Tongquan Wei, Shiyan Hu:
Improving Availability of Multicore Real-Time Systems Suffering Both Permanent and Transient Faults. 1785-1801 - Ipoom Jeong, Changmin Lee, Keunsoo Kim, Won Woo Ro:
OverCome: Coarse-Grained Instruction Commit with Handover Register Renaming. 1802-1816 - Reza Yazdani, José-María Arnau, Antonio González:
A Low-Power, High-Performance Speech Recognition Accelerator. 1817-1831
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-04-25 17:51 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
