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ORCIDFabian Schuiki
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2020 – today
- 2023
[j8]Paul Scheffler
, Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini:
Sparse Stream Semantic Registers: A Lightweight ISA Extension Accelerating General Sparse Linear Algebra. IEEE Trans. Parallel Distributed Syst. 34(12): 3147-3161 (2023)- [i12]Paul Scheffler, Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini:
Sparse Stream Semantic Registers: A Lightweight ISA Extension Accelerating General Sparse Linear Algebra. CoRR abs/2305.05559 (2023) - 2022
- [j7]Andreas Kurth, Wolfgang Rönninger, Thomas Benz, Matheus A. Cavalcante, Fabian Schuiki, Florian Zaruba, Luca Benini:
An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication. IEEE Trans. Computers 71(8): 1794-1809 (2022) - 2021
- [b1]Fabian Schuiki:
Streaming architectures for extreme energy efficiency in high-performance computing. ETH Zurich, Zürich, Switzerland, Hartung-Gorre Verlag 2021, ISBN 978-3-86628-725-9, pp. 1-311 - [j6]Florian Zaruba, Fabian Schuiki, Luca Benini:
Manticore: A 4096-Core RISC-V Chiplet Architecture for Ultraefficient Floating-Point Computing. IEEE Micro 41(2): 36-42 (2021) - [j5]Fabian Schuiki, Florian Zaruba, Torsten Hoefler, Luca Benini:
Stream Semantic Registers: A Lightweight RISC-V ISA Extension Achieving Full Compute Utilization in Single-Issue Cores. IEEE Trans. Computers 70(2): 212-227 (2021) - [j4]Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini:
Snitch: A Tiny Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads. IEEE Trans. Computers 70(11): 1845-1860 (2021) - [j3]Stefan Mach, Fabian Schuiki, Florian Zaruba, Luca Benini:
FPnew: An Open-Source Multiformat Floating-Point Unit Architecture for Energy-Proportional Transprecision Computing. IEEE Trans. Very Large Scale Integr. Syst. 29(4): 774-787 (2021) - [c13]Paul Scheffler, Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini:
Indirection Stream Semantic Register Architecture for Efficient Sparse-Dense Linear Algebra. DATE 2021: 1787-1792 - [c12]Thomas Benz, Luca Bertaccini, Florian Zaruba, Fabian Schuiki, Frank K. Gürkaynak, Luca Benini:
A 10-core SoC with 20 Fine-Grain Power Domains for Energy-Proportional Data-Parallel Processing over a Wide Voltage and Temperature Range. ESSCIRC 2021: 263-266 - [c11]Samuel Riedel, Fabian Schuiki, Paul Scheffler, Florian Zaruba, Luca Benini:
Banshee: A Fast LLVM-Based RISC-V Binary Translator. ICCAD 2021: 1-9 - [i11]Andreas Kurth, Fabian Schuiki, Luca Benini:
Implementing CNN Layers on the Manticore Cluster-Based Many-Core Architecture. CoRR abs/2104.08009 (2021) - 2020
- [j2]Matheus A. Cavalcante, Fabian Schuiki, Florian Zaruba, Michael Schaffner, Luca Benini:
Ara: A 1-GHz+ Scalable and Energy-Efficient RISC-V Vector Processor With Multiprecision Floating-Point Support in 22-nm FD-SOI. IEEE Trans. Very Large Scale Integr. Syst. 28(2): 530-543 (2020) - [c10]Matheus A. Cavalcante, Andreas Kurth, Fabian Schuiki, Luca Benini:
Design of an open-source bridge between non-coherent burst-based and coherent cache-line-based memory systems. CF 2020: 81-88 - [c9]Dionysios Diamantopoulos, Florian Scheidegger, Stefan Mach, Fabian Schuiki, Germain Haugou, Michael Schaffner, Frank K. Gürkaynak, Christoph Hagleitner, A. Cristiano I. Malossi, Luca Benini:
XwattPilot: A Full-stack Cloud System Enabling Agile Development of Transprecision Software for Low-power SoCs. COOL CHIPS 2020: 1-3 - [c8]Florian Zaruba, Fabian Schuiki, Luca Benini:
A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing. Hot Chips Symposium 2020: 1-24 - [c7]Alfio Di Mauro, Florian Zaruba, Fabian Schuiki, Stefan Mach, Luca Benini:
Live Demonstration: Exploiting Body-Biasing for Static Corner Trimming and Maximum Energy Efficiency Operation in 22nm FDX Technology. ISCAS 2020: 1 - [c6]Fabian Schuiki, Andreas Kurth, Tobias Grosser, Luca Benini:
LLHD: a multi-level intermediate representation for hardware description languages. PLDI 2020: 258-271 - [i10]Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini:
Snitch: A 10 kGE Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads. CoRR abs/2002.10143 (2020) - [i9]Fabian Schuiki, Andreas Kurth, Tobias Grosser, Luca Benini:
LLHD: A Multi-level Intermediate Representation for Hardware Description Languages. CoRR abs/2004.03494 (2020) - [i8]Stefan Mach, Fabian Schuiki, Florian Zaruba, Luca Benini:
FPnew: An Open-Source Multi-Format Floating-Point Unit Architecture for Energy-Proportional Transprecision Computing. CoRR abs/2007.01530 (2020) - [i7]Florian Zaruba, Fabian Schuiki, Luca Benini:
Manticore: A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing. CoRR abs/2008.06502 (2020) - [i6]Andreas Kurth, Wolfgang Rönninger, Thomas Benz, Matheus A. Cavalcante, Fabian Schuiki, Florian Zaruba, Luca Benini:
An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication. CoRR abs/2009.05334 (2020) - [i5]Paul Scheffler, Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini:
Indirection Stream Semantic Register Architecture for Efficient Sparse-Dense Linear Algebra. CoRR abs/2011.08070 (2020)
2010 – 2019
- 2019
- [j1]Fabian Schuiki, Michael Schaffner, Frank K. Gürkaynak, Luca Benini:
A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets. IEEE Trans. Computers 68(4): 484-497 (2019) - [c5]Fabian Schuiki, Michael Schaffner, Luca Benini:
NTX: An Energy-efficient Streaming Accelerator for Floating-point Generalized Reduction Workloads in 22 nm FD-SOI. DATE 2019: 662-667 - [c4]Florian Zaruba, Fabian Schuiki, Stefan Mach, Luca Benini:
The Floating Point Trinity: A Multi-modal Approach to Extreme Energy-Efficiency and Performance. ICECS 2019: 767-770 - [c3]Fabian Schuiki, Michael Schaffner, Luca Benini:
NTX: A 260 Gflop/sW Streaming Accelerator for Oblivious Floating-Point Algorithms in 22 nm FD-SOI. ISOCC 2019: 117-118 - [c2]Stefan Mach, Fabian Schuiki, Florian Zaruba, Luca Benini:
A 0.80pJ/flop, 1.24Tflop/sW 8-to-64 bit Transprecision Floating-Point Unit for a 64 bit RISC-V Processor in 22nm FD-SOI. VLSI-SoC 2019: 95-98 - [i4]Matheus A. Cavalcante, Fabian Schuiki, Florian Zaruba, Michael Schaffner, Luca Benini:
Ara: A 1 GHz+ Scalable and Energy-Efficient RISC-V Vector Processor with Multi-Precision Floating Point Support in 22 nm FD-SOI. CoRR abs/1906.00478 (2019) - [i3]Fabian Schuiki, Florian Zaruba, Torsten Hoefler, Luca Benini:
Stream Semantic Registers: A Lightweight RISC-V ISA Extension Achieving Full Compute Utilization in Single-Issue Cores. CoRR abs/1911.08356 (2019) - 2018
- [i2]Fabian Schuiki, Michael Schaffner, Frank K. Gürkaynak, Luca Benini:
A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets. CoRR abs/1803.04783 (2018) - [i1]Fabian Schuiki, Michael Schaffner, Luca Benini:
NTX: An Energy-efficient Streaming Accelerator for Floating-point Generalized Reduction Workloads in 22nm FD-SOI. CoRR abs/1812.00182 (2018) - 2015
- [c1]Mahdi Asadpour, Mario Burger, Fabian Schuiki, Karin Anna Hummel:
Needle in a Haystack: Limiting the Search Space in Mission-aware Packet Forwarding for Drones. SmartObjects@MobiCom 2015: 31-36
Coauthor Index
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