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ORCIDHonglan Jiang
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2020 – today
- 2024
[j17]Hai Mo
, Yong Wu, Honglan Jiang, Zining Ma, Fabrizio Lombardi, Jie Han, Leibo Liu:
Learning the Error Features of Approximate Multipliers for Neural Network Applications. IEEE Trans. Computers 73(3): 842-856 (2024)- [j16]Zijing Niu, Tingting Zhang, Honglan Jiang, Bruce F. Cockburn, Leibo Liu, Jie Han:
Hardware-Efficient Logarithmic Floating-Point Multipliers for Error-Tolerant Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 71(1): 209-222 (2024) - [c17]Xinkuang Geng, Siting Liu, Leibo Liu, Jie Han, Honglan Jiang:
QUQ: Quadruplet Uniform Quantization for Efficient Vision Transformer Inference. DAC 2024: 272:1-272:6 - [c16]Xinkuang Geng, Siting Liu, Jianfei Jiang, Kai Jiang, Honglan Jiang:
Compact Powers-of-Two: An Efficient Non-Uniform Quantization for Deep Neural Networks. DATE 2024: 1-6 - [c15]Xiaolu Hu, Ao Liu, Xinkuang Geng, Zizhong Wei, Kai Jiang, Honglan Jiang:
A Configurable Approximate Multiplier for CNNs Using Partial Product Speculation. DATE 2024: 1-6 - [c14]Wenhui Zhang, Xinkuang Geng, Qin Wang, Jie Han, Honglan Jiang:
A Low-Power and High-Accuracy Approximate Adder for Logarithmic Number System. ACM Great Lakes Symposium on VLSI 2024: 125-131 - [i1]Ao Liu, Jie Han, Qin Wang, Zhigang Mao, Honglan Jiang:
An Architectural Error Metric for CNN-Oriented Approximate Multipliers. CoRR abs/2408.12836 (2024) - 2023
- [j15]Tong Li, Honglan Jiang, Hai Mo, Jie Han, Leibo Liu, Zhi-Gang Mao:
Approximate Processing Element Design and Analysis for the Implementation of CNN Accelerators. J. Comput. Sci. Technol. 38(2): 309-327 (2023) - [c13]Zhican Wang, Gang Wang, Honglan Jiang, Ningyi Xu, Guanghui He:
COSA:Co-Operative Systolic Arrays for Multi-head Attention Mechanism in Neural Network using Hybrid Data Reuse and Fusion Methodologies. DAC 2023: 1-6 - [c12]Ziheng Wang, Farzad Niknia, Shanshan Liu, Honglan Jiang, Siting Liu, Pedro Reviriego, Fabrizio Lombardi:
Feature-Embedding Triplet Networks with a Separately Constrained Loss Function. ISCAS 2023: 1-5 - 2022
- [j14]Yong Wu, Honglan Jiang, Zining Ma, Pengfei Gou, Yong Lu, Jie Han, Shouyi Yin, Shaojun Wei, Leibo Liu:
An Energy-Efficient Approximate Divider Based on Logarithmic Conversion and Piecewise Constant Approximation. IEEE Trans. Circuits Syst. I Regul. Pap. 69(7): 2655-2668 (2022) - [j13]Francisco Javier Hernandez Santiago, Honglan Jiang, Hussam Amrouch, Andreas Gerstlauer, Leibo Liu, Jie Han:
Characterizing Approximate Adders and Multipliers for Mitigating Aging and Temperature Degradations. IEEE Trans. Circuits Syst. I Regul. Pap. 69(11): 4558-4571 (2022) - [c11]Yibo Wu, Liang Wang, Xiaohang Wang, Jie Han, Jianfeng Zhu, Honglan Jiang, Shouyi Yin, Shaojun Wei, Leibo Liu:
Upward Packet Popup for Deadlock Freedom in Modular Chiplet-Based Systems. HPCA 2022: 986-1000 - [c10]Han Li, Heng Shi, Honglan Jiang, Siting Liu:
HSB-GDM: a Hybrid Stochastic-Binary Circuit for Gradient Descent with Momentum in the Training of Neural Networks. NANOARCH 2022: 22:1-22:6 - [p2]Tingting Zhang, Honglan Jiang, Weiqiang Liu, Fabrizio Lombardi, Leibo Liu, Seok-Bum Ko, Jie Han:
Majority Logic-Based Approximate Multipliers for Error-Tolerant Applications. Approximate Computing 2022: 119-146 - 2021
- [j12]Honglan Jiang, Shaahin Angizi, Deliang Fan, Jie Han, Leibo Liu:
Non-Volatile Approximate Arithmetic Circuits Using Scalable Hybrid Spin-CMOS Majority Gates. IEEE Trans. Circuits Syst. I Regul. Pap. 68(3): 1217-1230 (2021) - [c9]Zijing Niu, Honglan Jiang, Mohammad Saeed Ansari, Bruce F. Cockburn, Leibo Liu, Jie Han:
A Logarithmic Floating-Point Multiplier for the Efficient Training of Neural Networks. ACM Great Lakes Symposium on VLSI 2021: 65-70 - 2020
- [j11]Hao Cai, Honglan Jiang, Yongliang Zhou, Menglin Han, Bo Liu:
Interplay Bitwise Operation in Emerging MRAM for Efficient In-memory Computing. CCF Trans. High Perform. Comput. 2(3): 282-296 (2020) - [j10]Honglan Jiang, Francisco Javier Hernandez Santiago, Hai Mo, Leibo Liu, Jie Han:
Approximate Arithmetic Circuits: A Survey, Characterization, and Recent Applications. Proc. IEEE 108(12): 2108-2135 (2020) - [c8]Zhixi Yang, Honglan Jiang, Xianbin Li, Jun Yang:
Power-Efficient Approximate Multiplier Using Adaptive Error Compensation. ACM Great Lakes Symposium on VLSI 2020: 205-210
2010 – 2019
- 2019
- [j9]Honglan Jiang, Leibo Liu, Fabrizio Lombardi, Jie Han:
Low-Power Unsigned Divider and Square Root Circuit Designs Using Adaptive Approximation. IEEE Trans. Computers 68(11): 1635-1646 (2019) - [j8]Honglan Jiang, Cong Liu, Fabrizio Lombardi, Jie Han:
Low-Power Approximate Unsigned Multipliers With Configurable Error Recovery. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(1): 189-202 (2019) - [j7]Honglan Jiang, Leibo Liu, Pieter P. Jonker, Duncan G. Elliott, Fabrizio Lombardi, Jie Han:
A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(1): 313-326 (2019) - [c7]Honglan Jiang, Francisco J. H. Santiago, Mohammad Saeed Ansari, Leibo Liu, Bruce F. Cockburn, Fabrizio Lombardi, Jie Han:
Characterizing Approximate Adders and Multipliers Optimized under Different Design Constraints. ACM Great Lakes Symposium on VLSI 2019: 393-398 - [c6]Hao Cai, Honglan Jiang, Menglin Han, Zhaohao Wang, You Wang, Jun Yang, Jie Han, Leibo Liu, Weisheng Zhao:
Pj-AxMTJ: Process-in-memory with Joint Magnetization Switching for Approximate Computing in Magnetic Tunnel Junction. ISVLSI 2019: 111-115 - [p1]Honglan Jiang, Leibo Liu, Fabrizio Lombardi, Jie Han:
Approximate Arithmetic Circuits: Design and Evaluation. Approximate Circuits 2019: 67-98 - 2018
- [j6]Mohammad Saeed Ansari, Honglan Jiang, Bruce F. Cockburn, Jie Han:
Low-Power Approximate Multipliers Using Encoded Partial Products and Approximate Compressors. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(3): 404-416 (2018) - [j5]Siting Liu, Honglan Jiang, Leibo Liu, Jie Han:
Gradient Descent Using Stochastic Circuits for Efficient Training of Learning Machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(11): 2530-2541 (2018) - [j4]Vojtech Mrazek, Zdenek Vasícek, Lukás Sekanina, Honglan Jiang, Jie Han:
Scalable Construction of Approximate Multipliers With Formally Guaranteed Worst Case Error. IEEE Trans. Very Large Scale Integr. Syst. 26(11): 2572-2576 (2018) - [c5]Honglan Jiang, Leibo Liu, Fabrizio Lombardi, Jie Han:
Adaptive approximation in arithmetic circuits: A low-power unsigned divider design. DATE 2018: 1411-1416 - 2017
- [j3]Honglan Jiang, Cong Liu, Leibo Liu, Fabrizio Lombardi, Jie Han:
A Review, Classification, and Comparative Evaluation of Approximate Arithmetic Circuits. ACM J. Emerg. Technol. Comput. Syst. 13(4): 60:1-60:34 (2017) - [j2]Weiqiang Liu, Liangyu Qian, Chenghua Wang, Honglan Jiang, Jie Han, Fabrizio Lombardi:
Design of Approximate Radix-4 Booth Multipliers for Error-Tolerant Computing. IEEE Trans. Computers 66(8): 1435-1441 (2017) - [c4]Honglan Jiang, Leibo Liu, Jie Han:
An efficient hardware design for cerebellar models using approximate circuits: special session paper. CODES+ISSS 2017: 31:1-31:2 - 2016
- [j1]Honglan Jiang, Jie Han, Fei Qiao, Fabrizio Lombardi:
Approximate Radix-8 Booth Multipliers for Low-Power and High-Performance Operation. IEEE Trans. Computers 65(8): 2638-2644 (2016) - [c3]Honglan Jiang, Chengkun Shen, Pieter P. Jonker, Fabrizio Lombardi, Jie Han:
Adaptive Filter Design Using Stochastic Circuits. ISVLSI 2016: 122-127 - [c2]Honglan Jiang, Cong Liu, Naman Maheshwari, Fabrizio Lombardi, Jie Han:
A comparative evaluation of approximate multipliers. NANOARCH 2016: 191-196 - 2015
- [c1]Honglan Jiang, Jie Han, Fabrizio Lombardi:
A Comparative Review and Evaluation of Approximate Adders. ACM Great Lakes Symposium on VLSI 2015: 343-348
Coauthor Index
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