default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDOliver Keszöcze
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
[j15]Martin Lukac, Saadat Nursultan, Georgiy Krylov, Oliver Keszöcze, Abilmansur Rakhmettulayev, Michitaka Kameyama:
Geometric Refactoring of Quantum and Reversible Circuits Using Graph Algorithms. IEICE Trans. Inf. Syst. 107(8): 930-939 (2024)- [c34]Patrick Plagwitz
, Frank Hannig, Jürgen Teich, Oliver Keszöcze:
SNN vs. CNN Implementations on FPGAs: An Empirical Evaluation. ARC 2024: 3-18 - [c33]Niklas Jungnitz, Oliver Keszöcze:
SAS - A Framework for Symmetry-based Approximate Synthesis. DAC 2024: 278:1-278:6 - [c32]Martin Schoeberl, Hans Jakob Damsgaard, Luca Pezzarossa, Oliver Keszöcze, Erling Rennemo Jellum:
Hardware Generators with Chisel. DSD 2024: 168-175 - [c31]Patrick Plagwitz, Frank Hannig, Jürgen Teich, Oliver Keszöcze:
DSL-Based SNN Accelerator Design Using Chisel. DSD 2024: 176-184 - [c30]Matthias Kergaßner, Oliver Keszöcze, Rolf Wanka:
Markov Chain-based Optimization Time Analysis of Bivalent Ant Colony Optimization for Sorting and LeadingOnes. GECCO 2024 - [i8]Matthias Kergaßner, Oliver Keszöcze, Rolf Wanka:
Markov Chain-based Optimization Time Analysis of Bivalent Ant Colony Optimization for Sorting and LeadingOnes. CoRR abs/2405.03353 (2024) - 2023
- [j14]Max Bartunik, Jens Kirchner, Oliver Keszöcze:
Artificial intelligence for molecular communication. it Inf. Technol. 65(4-5): 155-163 (2023) - [i7]Patrick Plagwitz, Frank Hannig, Jürgen Teich, Oliver Keszöcze:
To Spike or Not to Spike? A Quantitative Comparison of SNN and CNN FPGA Implementations. CoRR abs/2306.12742 (2023) - [i6]Max Bartunik, Jens Kirchner, Oliver Keszöcze:
Artificial Intelligence for Molecular Communication. CoRR abs/2308.02812 (2023) - 2022
- [j13]Oliver Keszöcze:
BDD-Based Error Metric Analysis, Computation and Optimization. IEEE Access 10: 14013-14028 (2022) - [j12]Oliver Keszöcze:
Approximate Computing. it Inf. Technol. 64(3): 77-78 (2022) - [j11]Jorge Echavarria, Stefan Wildermann, Oliver Keszöcze, Faramarz Khosravi, Andreas Becher, Jürgen Teich:
Design and error analysis of accuracy-configurable sequential multipliers via segmented carry chains. it Inf. Technol. 64(3): 89-98 (2022) - [j10]Jan Sommer, M. Akif Özkan, Oliver Keszöcze, Jürgen Teich:
Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 3767-3778 (2022) - [j9]Marcel Brand, Frank Hannig, Oliver Keszöcze, Jürgen Teich:
Precision- and Accuracy-Reconfigurable Processor Architectures - An Overview. IEEE Trans. Circuits Syst. II Express Briefs 69(6): 2661-2666 (2022) - [c29]Jan Sommer, M. Akif Özkan, Oliver Keszöcze, Jürgen Teich:
DSP-Packing: Squeezing Low-precision Arithmetic into FPGA DSP Blocks. FPL 2022: 160-166 - [c28]Max Bartunik, Oliver Keszöcze, Benjamin Schiller, Jens Kirchner:
Using Deep Learning to Demodulate Transmissions in Molecular Communication. ISMICT 2022: 1-6 - [i5]Jan Sommer, M. Akif Özkan, Oliver Keszöcze, Jürgen Teich:
DSP-Packing: Squeezing Low-precision Arithmetic into FPGA DSP Blocks. CoRR abs/2203.11028 (2022) - [i4]Jan Sommer, M. Akif Özkan, Oliver Keszöcze, Jürgen Teich:
Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks. CoRR abs/2203.12437 (2022) - [i3]Arved Friedemann, Oliver Keszöcze:
Towards Clause Learning à la Carte through VarMonads. CoRR abs/2208.10460 (2022) - 2021
- [j8]Naser Mohammadzadeh, Robert Wille, Oliver Keszöcze:
Efficient One-pass Synthesis for Digital Microfluidic Biochips. ACM Trans. Design Autom. Electr. Syst. 26(4): 27:1-27:21 (2021) - [c27]Oliver Keszöcze, Naser Mohammadzadeh, Robert Wille:
Exact Physical Design of Quantum Circuits for Ion-Trap-based Quantum Architectures. DATE 2021: 344-349 - [c26]Armin Schuster, Christian Heidorn, Marcel Brand, Oliver Keszöcze, Jürgen Teich:
Design Space Exploration of Time, Energy, and Error Rate Trade-offs for CNNs Using Accuracy-Programmable Instruction Set Processors. PKDD/ECML Workshops (1) 2021: 375-389 - [c25]Oliver Keszöcze, Marcel Brand, Michael Witterauf, Christian Heidorn, Jürgen Teich:
Aarith: an arbitrary precision number library. SAC 2021: 529-534 - [i2]Jorge Echavarria, Stefan Wildermann, Oliver Keszöcze, Faramarz Khosravi, Andreas Becher, Jürgen Teich:
On the Approximation of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains. CoRR abs/2105.05588 (2021) - 2020
- [c24]Jürgen Teich, Behnaz Pourmohseni, Oliver Keszöcze, Jan Spieck, Stefan Wildermann:
Run-Time Enforcement of Non-Functional Application Requirements in Heterogeneous Many-Core Systems. ASP-DAC 2020: 629-636 - [c23]Jorge Echavarria, Stefan Wildermann, Oliver Keszöcze, Jürgen Teich:
Probabilistic Error Propagation through Approximated Boolean Networks. DAC 2020: 1-6 - [c22]Andreas Wendler, Oliver Keszöcze:
A fast BDD Minimization Framework for Approximate Computing. DATE 2020: 1372-1377 - [c21]Martin Lukac, Saadat Nursultan, Georgiy Krylov, Oliver Keszöcze:
Geometric Refactoring of Quantum and Reversible Circuits: Quantum Layout. DSD 2020: 428-435 - [c20]Oliver Keszöcze, Robert Wille, Rolf Drechsler:
One-pass Synthesis for Digital Microfluidic Biochips: A Survey. ISDCS 2020: 1-6
2010 – 2019
- 2019
- [c19]Oliver Keszöcze, Ian G. Harris:
Chatbot-based assertion generation from natural language specifications. FDL 2019: 1-6 - 2018
- [j7]Oliver Keszöcze, Mathias Soeken, Rolf Drechsler:
The complexity of error metrics. Inf. Process. Lett. 139: 1-7 (2018) - [j6]Oliver Keszöcze, Philipp Niemann, Arved Friedemann, Rolf Drechsler:
On the complexity of design tasks for Digital Microfluidic Biochips. Microelectron. J. 78: 35-45 (2018) - [c18]Wouter Castryck, Jeroen Demeyer, Alexis De Vos, Oliver Keszöcze, Mathias Soeken:
Translating Between the Roots of the Identity in Quantum Computers. ISMVL 2018: 254-259 - [c17]Kenneth Schmitz, Oliver Keszöcze, Jurij Schmidt, Daniel Große, Rolf Drechsler:
Towards Dynamic Execution Environment for System Security Protection Against Hardware Flaws. ISVLSI 2018: 557-562 - [c16]Oliver Keszöcze, Mohamed Ibrahim, Robert Wille, Krishnendu Chakrabarty, Rolf Drechsler:
Exact Synthesis of Biomolecular Protocols for Multiple Sample Pathways on Digital Microfluidic Biochips. VLSID 2018: 121-126 - 2017
- [b1]Oliver Keszöcze:
Exact design of digital microfluidic biochips. University of Bremen, Germany, 2017, pp. 1-141 - [j5]Arighna Deb, Robert Wille, Oliver Keszöcze, Saeideh Shirinzadeh, Rolf Drechsler:
Synthesis of optical circuits using binary decision diagrams. Integr. 59: 42-51 (2017) - [j4]Robert Wille, Oliver Keszöcze, Lars Othmer, Michael Kirkedal Thomsen, Rolf Drechsler:
An Automated Approach for Generating and Checking Control Logic for Reversible Hardware Description Language-Based Designs. J. Low Power Electron. 13(4): 633-641 (2017) - [c15]Oliver Keszöcze, Zipeng Li, Andreas Grimmer, Robert Wille, Krishnendu Chakrabarty, Rolf Drechsler:
Exact routing for micro-electrode-dot-array digital microfluidic biochips. ASP-DAC 2017: 708-713 - [c14]Leonard Schneider, Oliver Keszöcze, Jannis Stoppe, Rolf Drechsler:
Effects of cell shapes on the routability of Digital Microfluidic Biochips. DATE 2017: 1627-1630 - [c13]Jannis Stoppe, Oliver Keszöcze, Maximilian Luenert, Robert Wille, Rolf Drechsler:
BioViz: An Interactive Visualization Engine for the Design of Digital Microfluidic Biochips. ISVLSI 2017: 170-175 - [c12]Leonard Schneider, Oliver Keszöcze, Jannis Stoppe, Rolf Drechsler:
Einfluss von Zellformen auf das Routing von Digital Microfluidic Biochips. MBMV 2017: 75-78 - [p1]Oliver Keszöcze:
Exakter Entwurf digitaler mikrofluidischer Biochips. Ausgezeichnete Informatikdissertationen 2017: 121-130 - 2016
- [j3]Mathias Soeken, Robert Wille, Oliver Keszöcze, D. Michael Miller, Rolf Drechsler:
Embedding of Large Boolean Functions for Reversible Logic. ACM J. Emerg. Technol. Comput. Syst. 12(4): 41:1-41:26 (2016) - [j2]Arighna Deb, Robert Wille, Oliver Keszöcze, Stefan Hillmich, Rolf Drechsler:
Gates vs. Splitters: Contradictory Optimization Objectives in the Synthesis of Optical Circuits. ACM J. Emerg. Technol. Comput. Syst. 13(1): 11:1-11:13 (2016) - [c11]Robert Wille, Oliver Keszöcze, Marcel Walter, Patrick Rohrs, Anupam Chattopadhyay, Rolf Drechsler:
Look-ahead schemes for nearest neighbor optimization of 1D and 2D quantum circuits. ASP-DAC 2016: 292-297 - [c10]Robert Wille, Oliver Keszöcze, Stefan Hillmich, Marcel Walter, Alberto García Ortiz:
Synthesis of approximate coders for on-chip interconnects using reversible logic. DATE 2016: 1140-1143 - [c9]Robert Wille, Oliver Keszöcze, Lars Othmer, Michael Kirkedal Thomsen, Rolf Drechsler:
Generating and checking control logic in the HDL-based design of reversible circuits. ISED 2016: 7-12 - [c8]Robert Wille, Oliver Keszöcze, Lars Othmer, Michael Kirkedal Thomsen, Rolf Drechsler:
Initial Ideas for Automatic Design and Verification of Control Logic in Reversible HDLs - Work in Progress Report. RC 2016: 160-166 - 2015
- [j1]Robert Wille, Oliver Keszöcze, Rolf Drechsler, Tobias Boehnisch, Alexander Kroker:
Scalable One-Pass Synthesis for Digital Microfluidic Biochips. IEEE Des. Test 32(6): 41-50 (2015) - [c7]Robert Wille, Oliver Keszöcze, Clemens Hopfmuller, Rolf Drechsler:
Reverse BDD-based synthesis for splitter-free optical circuits. ASP-DAC 2015: 172-177 - [c6]Oliver Keszöcze, Robert Wille, Krishnendu Chakrabarty, Rolf Drechsler:
A General and Exact Routing Methodology for Digital Microfluidic Biochips. ICCAD 2015: 874-881 - 2014
- [c5]Oliver Keszöcze, Robert Wille, Tsung-Yi Ho, Rolf Drechsler:
Exact One-pass Synthesis of Digital Microfluidic Biochips. DAC 2014: 142:1-142:6 - [c4]Oliver Keszöcze, Robert Wille, Rolf Drechsler:
Exact routing for digital microfluidic biochips with temporary blockages. ICCAD 2014: 405-410 - [c3]Heinz Riener, Oliver Keszöcze, Rolf Drechsler, Görschwin Fey:
A Logic for Cardinality Constraints (Extended Abstract). MBMV 2014: 217-220 - [i1]Mathias Soeken, Robert Wille, Oliver Keszöcze, D. Michael Miller, Rolf Drechsler:
Embedding of Large Boolean Functions for Reversible Logic. CoRR abs/1408.3586 (2014) - 2013
- [c2]Dave W. Binkley, Dawn J. Lawrie, Emily Hill, Janet E. Burge, Ian G. Harris, Regina Hebig, Oliver Keszöcze, Karl Reed, John Slankas:
Task-Driven Software Summarization. ICSM 2013: 432-435 - 2011
- [c1]Robert Wille, Oliver Keszöcze, Rolf Drechsler:
Determining the minimal number of lines for large reversible circuits. DATE 2011: 1204-1207
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-12-02 22:27 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
