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2010 – 2019
- 2019
[j37]Pei-Yu Chiang
, Paul C.-P. Chao, Tse-Yi Tu, Yung-Hua Kao, Chih-Yu Yang, Der-Cherng Tarng, Chin-Long Wey:
Machine Learning Classification for Assessing the Degree of Stenosis and Blood Flow Volume at Arteriovenous Fistulas of Hemodialysis Patients Using a New Photoplethysmography Sensor Device. Sensors 19(15): 3422 (2019)- [c89]Pei-Yu Chiang, Paul C.-P. Chao, Tse-Yi Tu, Yung-Hua Kao, Chih-Yu Yang, Der-Cherng Tarng, Chin-Long Wey, Duc Huy Nguyen:
Quality Evaluation via PPG on the AVFs of Hemodialysis Patients Based on Both Blood Flow Volume and Degree of Stenosis. IEEE SENSORS 2019: 1-4 - 2018
- [j36]Paul C.-P. Chao, Pei-Yu Chiang, Yung-Hua Kao, Tse-Yi Tu, Chih-Yu Yang, Der-Cherng Tarng, Chin-Long Wey:
A Portable, Wireless Photoplethysomography Sensor for Assessing Health of Arteriovenous Fistula Using Class-Weighted Support Vector Machine. Sensors 18(11): 3854 (2018) - [c88]Yi-Cheng Wu, Yung-Hua Kao, Paul C.-P. Chao, Chin-Long Wey, Thilo Sauter, Fitrah P. Eka, Rajeev Pandey:
Design and Implementation of OLED Driving and OPD Readout Circuitry for an Optical Vibration Sensor. IEEE SENSORS 2018: 1-4 - 2017
- [j35]Chien-Chih Huang, Jwu-E Chen, Chin-Long Wey:
PACES: A Partition-Centering-Based Symmetry Placement for Binary-Weighted Unit Capacitor Arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(1): 134-145 (2017) - [c87]Yen-Ting Lin, Wen-Hau Yang, Yu-Sheng Ma, Yan-Jiun Lai, Hung-Wei Chen, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai:
Unsymmetrical parallel switched-capacitor (UP-SC) regulator with fast searching optimum ratio technique. ESSCIRC 2017: 287-290 - [c86]Yu-Sheng Ma, Wen-Hau Yang, Yen-Ting Lin, Hsin Chen, Li-Chi Lin, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai, Jui-Lung Chen:
A low quiescent current and cross regulation single-inductor dual-output converter with stacking MOSFET driving technique. ESSCIRC 2017: 352-355 - [c85]Yung-Hua Kao, Paul C.-P. Chao, Yueh Hung, Chin-Long Wey:
Live demonstration: A novel cuffless photoplethysmography sensor for continuous blood pressure measurement. IEEE SENSORS 2017: 1 - [c84]Yung-Hua Kao, Paul C.-P. Chao, Yueh Hung, Chin-Long Wey:
A new reflective PPG LED-PD sensor module for cuffless blood pressure measurement at wrist artery. IEEE SENSORS 2017: 1-3 - [c83]Shang-Hsien Yang, Yen-Ting Lin, Yu-Sheng Ma, Hung-Wei Chen, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
2.3 A single-inductor dual-output converter with linear-amplifier-driven cross regulation for prioritized energy-distribution control of envelope-tracking supply modulator. ISSCC 2017: 36-37 - [c82]Li-Cheng Chu, Wen-Hau Yang, Xiao-Qing Zhang, Yan-Jiun Lai, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
10.5 A three-level single-inductor triple-output converter with an adjustable flying-capacitor technique for low output ripple and fast transient response. ISSCC 2017: 186-187 - [c81]Wen-Jie Tsou, Wen-Hau Yang, Jian-He Lin, Hsin Chen, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
20.2 Digital low-dropout regulator with anti PVT-variation technique for dynamic voltage scaling and adaptive voltage scaling multicore processor. ISSCC 2017: 338-339 - 2016
- [j34]Ping-Chang Jui, Chin-Long Wey, Muh-Tian Shiue:
Multiplication of a Constant (2k ± 1) and Its Fast Hardware Implementation. J. Signal Process. Syst. 82(1): 41-53 (2016) - [c80]Jian-He Lin, Wen-Jie Tsou, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Jian-Ru Lin, Lsung-Yen Lsai:
A digital low-dropout-regulator with steady-state load current (SLC) estimator and dynamic gain scaling (DGS) control. APCCAS 2016: 37-40 - [c79]Shao-Wei Chiu, Chun-Chieh Kuo, Kai-Cheng Chuang, Wen-Hau Yang, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Jian-Ru Lin, Lsung-Yen Lsai, Jui-Lung Chen:
93% Efficiency and 0.99 power factor in pseudo-linear LED driver. A-SSCC 2016: 53-56 - [c78]Shang-Hsien Yang, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai:
Lossless inductor current control in envelope tracking supply modulator with self-allocation of energy for optimzation of efficiency and EVM. A-SSCC 2016: 281-284 - [c77]Chen-Fan Tang, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai:
Ultra-low voltage ripple in DC-DC boost converter by the pumping capacitor and wire inductance technique. A-SSCC 2016: 301-304 - [c76]Yung-Hua Kao, Paul C.-P. Chao, Tse-Yi Tu, Keng-Yueh Chiang, Chin-Long Wey:
A new cuffless optical sensor for blood pressure measuring with self-adaptive signal processing. IEEE SENSORS 2016: 1-3 - [c75]Hsiang-An Yang, Wen-Hau Yang, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai, Shin-Chi Lai:
12.7 A 96%-efficiency and 0.5%-current-cross-regulation single-inductor multiple floating-output LED driver with 24b color resolution. ISSCC 2016: 230-231 - [c74]Wen-Hau Yang, Chiun-He Lin, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai, Jui-Lung Chen:
95% light-load efficiency single-inductor dual-output DC-DC buck converter with synthesized waveform control technique for USB type-C. VLSI Circuits 2016: 1-2 - 2015
- [j33]Chin-Long Wey, Ping-Chang Jui, Muh-Tian Shiue:
Efficient Algorithm and Fast Hardware Implementation for Multiply-by-(1+2k). IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 98-A(4): 966-974 (2015) - [j32]Chien-Chih Huang, Chin-Long Wey, Jwu-E Chen, Pei-Wen Luo:
Performance-Driven Unit-Capacitor Placement of Successive-Approximation-Register ADCs. ACM Trans. Design Autom. Electr. Syst. 21(1): 15:1-15:17 (2015) - [c73]Li-Cheng Chu, Te-Fu Yang, Ru-Yu Huang, Yi-Ping Su, Chiun-He Lin, Chin-Long Wey, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai:
200nA low quiescent current deep-standby mode in 28nm DC-DC buck converter for active implantable medical devices. A-SSCC 2015: 1-4 - [c72]Jui-Che Su, Wei-Chung Chen, Wei-Tin Lin, Ying-Wei Chou, Meng-Wei Chien, Chin-Long Wey, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Shian-Ru Lin, Tsung-Yen Tsai:
Pseudo AC current synthesizer and DC offset-corrected technique in constant-on-time control buck converter for werable electronics. A-SSCC 2015: 1-4 - [c71]Meng-Wei Chien, Wen-Hau Yang, Ying-Wei Chou, Hsin-Chieh Chen, Wei-Chung Chen, Ke-Horng Chen, Chin-Long Wey, Shin-Chi Lai, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai, Hsin-Yu Luo:
Suppressing output overshoot voltage technique with 47.1mW/μs power-recycling rate and 93% peak efficiency DC-DC converter for multi-core processors. ESSCIRC 2015: 188-191 - [c70]Hsiang-An Yang, Chao-Chang Chiu, Shin-Chi Lai, Jui-Lung Chen, Chih-Wei Chang, Che-Hao Meng, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai, Hsin-Yu Luo:
120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETs. ESSCIRC 2015: 291-294 - [c69]Yi-Ping Su, Chiun-He Lin, Shen-Yu Peng, Ru-Yu Huang, Te-Fu Yang, Shin-Hao Chen, Ting-Jung Lo, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai:
12.6 90% Peak efficiency single-inductor-multiple-output DC-DC buck converter with output independent gate drive control. ISSCC 2015: 1-3 - 2014
- [j31]Chin-Long Wey, Ping-Chang Jui, Gang-Neng Sung:
Efficient Multiply-by-3 and Divide-by-3 Algorithms and Their Fast Hardware Implementation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(2): 616-623 (2014) - [j30]Wei-Chung Chen, Su-Yi Ping, Tzu-Chi Huang, Yu-Huei Lee, Ke-Horng Chen, Chin-Long Wey:
A Switchable Digital-Analog Low-Dropout Regulator for Analog Dynamic Voltage Scaling Technique. IEEE J. Solid State Circuits 49(3): 740-750 (2014) - [j29]Tzu-Chi Huang, Ruei-Hong Peng, Tsu-Wei Tsai, Ke-Horng Chen, Chin-Long Wey:
Fast Charging and High Efficiency Switching-Based Charger With Continuous Built-In Resistance Detection and Automatic Energy Deliver Control for Portable Electronics. IEEE J. Solid State Circuits 49(7): 1580-1594 (2014) - [c68]Shang-Hsien Yang, Chin-Long Wey, Ke-Horng Chen, Ying-Hsi Lin, Jing-Jia Chen, Tsung-Yen Tsai, Chao-Cheng Lee:
A 20MS/s buck/boost supply modulator for envelope tracking applications with direct digital interface. A-SSCC 2014: 73-76 - [c67]Hsin-Chieh Chen, Wei-Chung Chen, Ying-Wei Chou, Meng-Wei Chien, Chin-Long Wey, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Chao-Cheng Lee:
Anti-ESL/ESR variation robust constant-on-time control for DC-DC buck converter in 28nm CMOS technology. CICC 2014: 1-4 - [c66]Wei-Chung Chen, Tzu-Chi Huang, Tsu-Wei Tsai, Ruei-Hong Peng, Kuei-Liang Lin, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee, Li-Ren Huang, Chao-Jen Huang, Chung-Chih Hung, Chin-Long Wey, Hsin-Yu Luo:
Single inductor quad output switching converter with priority-scheduled program for fast transient and unlimited-load range in 40nm CMOS technology. ESSCIRC 2014: 167-170 - [c65]Shin-Hao Chen, Kuei-Liang Lin, Shao Siang Ng, Ke-Horng Chen, Chin-Long Wey, Sheng Kang, Kevin Cheng, Li-Ren Huang, Chao-Jen Huang, Hsin-Yu Luo:
A Class-D amplifier powered by embedded single-inductor bipolar-output power module with low common noise and dynamic voltage boosting technique. ESSCIRC 2014: 315-318 - [c64]Shang-Hsien Yang, Yuan-Han Yang, Ke-Horng Chen, Chung-Chih Hung, Chin-Long Wey, Ying-Hsi Lin, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee, Zhih Han Tai, Yi Hsuan Cheng, Chi Chung Tsai, Hsin-Yu Luo, Shih-Ming Wang, Long-Der Chen, Cheng-Chen Yang, Huang Tian Hui:
A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR. ISCAS 2014: 2676-2679 - [c63]Wei-Chung Chen, Yi-Ping Su, Yu-Huei Lee, Chin-Long Wey, Ke-Horng Chen:
17.10 0.65V-input-voltage 0.6V-output-voltage 30ppm/°C low-dropout regulator with embedded voltage reference for low-power biomedical systems. ISSCC 2014: 304-305 - [c62]Wei-Chung Chen, Yung-Sheng Huang, Meng-Wei Chien, Ying-Wei Chou, Hsin-Chieh Chen, Yi-Ping Su, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee:
±3% voltage variation and 95% efficiency 28nm constant on-time controlled step-down switching regulator directly supplying to Wi-Fi systems. VLSIC 2014: 1-2 - [c61]Tzu-Chi Huang, Ming-Jhe Du, Kuei-Liang Lin, Shao Siang Ng, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee, Jui-Lung Chen, Hung-Wei Chen:
A direct AC-DC and DC-DC cross-source energy harvesting circuit with analog iterating-based MPPT technique with 72.5% conversion efficiency and 94.6% tracking efficiency. VLSIC 2014: 1-2 - 2013
- [j28]Chien-Chih Huang, Chin-Long Wey, Jwu-E Chen, Pei-Wen Luo:
Optimal common-centroid-based unit capacitor placements for yield enhancement of switched-capacitor circuits. ACM Trans. Design Autom. Electr. Syst. 19(1): 7:1-7:13 (2013) - [c60]Chin-Long Wey, Chung-Hsien Hsu, Kun-Chun Chang, Ping-Chang Jui:
Enhancement of Controller Area Network (CAN) bus arbitration mechanism. ICCVE 2013: 898-902 - [c59]Chin-Long Wey, Ping-Chang Jui:
A unitized charging and discharging smart battery management system. ICCVE 2013: 903-909 - [c58]Chin-Long Wey, Chung-Hsien Hsu, Gang-Neng Sung:
A single-inductor programmable-output (SIPO) DC-DC converter for low power applications. IECON 2013: 316-320 - [c57]Chin-Long Wey, Chung-Hsien Hsu, Tai-Wei Chang:
A voltage-mode boost DC-DC converter with a constant-duty-cycle pulse control. LASCAS 2013: 1-4 - [c56]Ping-Chang Jui, Chin-Long Wey, Muh-Tian Shiue:
Low-cost parallel FFT processors with conflict-free ROM-based twiddle factor generator for DVB-T2 applications. MWSCAS 2013: 1003-1006 - 2012
- [c55]Kuen-Long Leu, Jwu-E Chen, Chin-Long Wey, Yung-Yuan Chen:
Generic Reliability Analysis for Safety-Critical FlexRay Drive-By-Wire Systems. ICCVE 2012: 216-221 - [c54]Pei-Wen Luo, Tao Wang, Chin-Long Wey, Liang-Chia Cheng, Bih-Lan Sheu, Yiyu Shi:
Reliable Power Delivery System Design for Three-Dimensional Integrated Circuits (3D ICs). ISVLSI 2012: 356-361 - [c53]Shao-Kai Chang, Chin-Long Wey:
A Fast 64-bit hybrid adder design in 90nm CMOS process. MWSCAS 2012: 414-417 - [c52]Ping-Chang Jui, Gang-Neng Sung, Chin-Long Wey:
Efficient algorithm and hardware implementation of 3N for arithmetic and for Radix-8 encodings. MWSCAS 2012: 418-421 - [c51]Chin-Long Wey, Ze-Yan Li, Kun-Chun Chang, Gang-Neng Sung, Dennis K. Wey:
A fast hysteretic buck converter with adaptive ripple controller. MWSCAS 2012: 1156-1159 - 2011
- [j27]Chin-Long Wey, Shin-Yo Lin, Hsu-Sheng Wang, Hung-Lieh Chen, Chun-Ming Huang:
A Low-Cost Continuous-Flow Parallel Memory-Based FFT Processor for UWB Applications. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(1): 315-323 (2011) - [j26]Pei-Wen Luo, Jwu-E Chen, Chin-Long Wey:
Design Methodology for Yield Enhancement of Switched-Capacitor Analog Integrated Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(1): 352-361 (2011) - [j25]Chin-Long Wey, Shin-Yo Lin, Pei-Yun Tsai, Ming-Der Shieh:
Reconfigurable Homogenous Multi-Core FFT Processor Architectures for Hybrid SISO/MIMO OFDM Wireless Communications. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(7): 1530-1539 (2011) - [j24]Chi-Sheng Lin, Ting-Hsu Chien, Chin-Long Wey:
A 5.5-GHz 1-mW Full-Modulus-Range Programmable Frequency Divider in 90-nm CMOS Process. IEEE Trans. Circuits Syst. II Express Briefs 58-II(9): 550-554 (2011) - [j23]Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Shih-Lun Chen, Chi-Shi Chen, Jiann-Jenn Wang, Kuen-Jong Lee, Chin-Long Wey:
Programmable System-on-Chip for Silicon Prototyping. IEEE Trans. Ind. Electron. 58(3): 830-838 (2011) - [c50]Chin-Long Wey, Chan-I Chiu, Kun-Chun Chang, Chung-Hsien Hsu, Gang-Neng Sung:
Design of ultra-wide-load, high-efficient DC-DC buck converters. ICECS 2011: 297-300 - [c49]Chien-Chih Huang, Jwu-E Chen, Pei-Wen Luo, Chin-Long Wey:
Yield-award placement optimization for Switched-Capacitor analog integrated circuits. SoCC 2011: 170-173 - 2010
- [j22]Jwu-E Chen, Pei-Wen Luo, Chin-Long Wey:
Placement Optimization for Yield Improvement of Switched-Capacitor Analog Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(2): 313-318 (2010) - [j21]Chua-Chin Wang, Gang-Neng Sung, Po-Cheng Chen, Chin-Long Wey:
A Transceiver Front End for Electronic Control Units in FlexRay-Based Automotive Communication Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(2): 460-470 (2010) - [j20]Shin-Yo Lin, Chin-Long Wey, Ming-Der Shieh:
Low-cost FFT processor for DVB-T2 applications. IEEE Trans. Consumer Electron. 56(4): 2072-2079 (2010) - [c48]Chi-Sheng Lin, Ting-Hsu Chien, Chin-Long Wey:
An effective phase detector for phase-locked loops with wide capture range and fast acquisition time. ISCAS 2010: 1843-1846 - [c47]Ting-Hsu Chien, Chi-Sheng Lin, Chin-Long Wey, Ying-Zong Juang, Chun-Ming Huang:
High-speed and low-power programmable frequency divider. ISCAS 2010: 4301-4304
2000 – 2009
- 2009
- [j19]Chi-Sheng Lin, Ting-Hsu Chien, Chin-Long Wey, Chun-Ming Huang, Ying-Zong Juang:
An Edge Missing Compensator for Fast Settling Wide Locking Range Phase-Locked Loops. IEEE J. Solid State Circuits 44(11): 3102-3110 (2009) - [c46]Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Wei-De Chien, Shih-Lun Chen, Chi-Shi Chen, Jiann-Jenn Wang, Chin-Long Wey:
Implementation and Prototyping of a Complex Multi-project System-on-a-chip. ISCAS 2009: 2321-2324 - [c45]Jwu-E Chen, Pei-Wen Luo, Chin-Long Wey:
Yield evaluation of analog placement with arbitrary capacitor ratio. ISQED 2009: 179-184 - [c44]Ting-Hsu Chien, Chi-Sheng Lin, Ying-Zong Juang, Chun-Ming Huang, Chin-Long Wey:
An edge-missing compensator for fast-settling wide-locking-range PLLs. ISSCC 2009: 394-395 - [c43]Kuen-Long Leu, Chin-Long Wey, Jwu-E Chen, Yung-Yuan Chen:
Robustness investigation of the FlexRay system. SIES 2009: 148-151 - 2008
- [j18]Pei-Wen Luo, Jwu-E Chen, Chin-Long Wey, Liang-Chia Cheng, Ji-Jan Chen, Wen Ching Wu:
Impact of Capacitance Correlation on Yield Enhancement of Mixed-Signal/Analog Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(11): 2097-2101 (2008) - [j17]Chin-Long Wey, Ming-Der Shieh, Shin-Yo Lin:
Algorithms of Finding the First Two Minimum Values and Their Hardware Implementation. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(11): 3430-3437 (2008) - [c42]Wei-Chang Tsai, Ming-Der Shieh, Wen-Ching Lin, Chin-Long Wey:
Design of square generator with small look-up table. APCCAS 2008: 172-175 - [c41]Chin-Long Wey, Shin-Yo Lin, Hsu-Sheng Wang, Chun-Ming Huang:
A low-cost continuous flow parallel memory-based FFT processor for Ultra-Wideband (UWB) applications. APCCAS 2008: 1418-1421 - [c40]Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Chin-Long Wey:
PrSoC: Programmable System-on-chip (SoC) for silicon prototyping. ISCAS 2008: 3382-3385 - 2007
- [c39]Chin-Long Wey, Shin-Yo Lin, Wei-Chien Tang, Muh-Tien Shiue:
High-speed, Low Cost Parallel Memory-Based FFT Processors for OFDM Applications. ICECS 2007: 783-787 - [c38]Chin-Long Wey, Wei-Chien Tang, Shin-Yo Lin:
Efficient VLSI Implementation of Memory-Based FFT Processors for DVB-T Applications. ISVLSI 2007: 98-106 - [c37]Yao-Xian Yang, Jin-Fu Li, Hsiang-Ning Liu, Chin-Long Wey:
Design of cost-efficient memory-based FFT processors using single-port memories. SoCC 2007: 29-32 - [i1]Jin-Fu Li, Tsu-Wei Tseng, Chin-Long Wey:
An Efficient Transparent Test Scheme for Embedded Word-Oriented Memories. CoRR abs/0710.4747 (2007) - 2006
- [c36]Chin-Long Wey, Chi-Shu Huang, Shaolei Quan:
Design of Reliable CMOS Phase-Locked Loops. ICECS 2006: 371-374 - [c35]Tsung-Han Tsai, Yung-Tsung Wang, Jui Hong Hung, Chin-Long Wey:
Compressed domain content-based retrieval of MP3 audio example using quantization tree indexing and melody-line tracking method. ISCAS 2006 - 2005
- [c34]Shaolei Quan, Qiang Qiang, Chin-Long Wey:
Design of a CMOS Operational Amplifier for Extreme-Voltage Stress Test. Asian Test Symposium 2005: 70-75 - [c33]Jin-Fu Li, Tsu-Wei Tseng, Chin-Long Wey:
An Efficient Transparent Test Scheme for Embedded Word-Oriented Memories. DATE 2005: 574-579 - [c32]Shaolei Quan, Meng-Yao Liu, Chin-Long Wey:
Design of a CMOS Operational Amplifier Amenable to Extreme Voltage Stress. DFT 2005: 563-572 - [c31]Shaolei Quan, Qiang Qiang, Chin-Long Wey:
A novel reconfigurable architecture of low-power unsigned multiplier for digital signal processing. ISCAS (4) 2005: 3327-3330 - [c30]Chin-Long Wey, Meng-Yao Liu, Shaolei Quan:
Reliability enhancement of CMOS SRAMs. MTDT 2005: 146-151 - 2004
- [c29]Chin-Long Wey, Meng-Yao Liu:
Burn-In Stress Test of Analog CMOS ICs. Asian Test Symposium 2004: 360-365 - [c28]Shaolei Quan, Chin-Long Wey:
A noise optimization technique for codesign of CMOS radio-frequency low noise amplifiers and low-quality spiral inductors. ACM Great Lakes Symposium on VLSI 2004: 178-182 - [c27]Chin-Long Wey, Mohammad Athar Khalil, Jim Liu, Gregory Wierzba:
Hierarchical extreme-voltage stress test of analog CMOS ICs for gate-oxide reliability enhancement. ACM Great Lakes Symposium on VLSI 2004: 322-327 - 2001
- [c26]Mohammad Athar Khalil, Chin-Long Wey:
Extreme-voltage stress vector generation of analog CMOS ICs for gate-oxide reliability enhancement. ITC 2001: 348-357 - [c25]Mohammad Athar Khalil, Chin-Long Wey:
High-Voltage Stress Test Paradigms of Analog CMOS ICs for Gate-Oxide Reliability Enhancement. VTS 2001: 333-338 - 2000
- [j16]Ren-Yuan Huang, Jin-Sheng Wang, Chin-Long Wey:
A fully differential current copier for performance improvement. Int. J. Circuit Theory Appl. 28(2): 101-108 (2000) - [c24]Chin-Long Wey, Adam Osseiran, José Luis Huertas, Yeon-Chen Nieu:
Mixed-Signal SoC Testing: Is Mixed-Signal Design-for-Test on Its Way. Asian Test Symposium 2000: 15
1990 – 1999
- 1998
- [j15]Cheng-Ping Wang, Chin-Long Wey:
Fault macromodel for switches in switched-current circuits. Int. J. Circuit Theory Appl. 26(1): 93-102 (1998) - [j14]Wei-Hsing Huang, Chin-Long Wey:
Diagnosability analysis of analogue circuits. Int. J. Circuit Theory Appl. 26(5): 439-451 (1998) - [j13]Chin-Long Wey, Ming-Der Shieh:
Design of a High-Speed Square Generator. IEEE Trans. Computers 47(9): 1021-1026 (1998) - [j12]Wei-Hsing Huang, Chin-Long Wey:
ATPRG: an automatic test program generator using HDL-A for fault diagnosis of analog/mixed-signal integrated circuits. IEEE Trans. Instrum. Meas. 47(2): 426-431 (1998) - [c23]Manuel Jiménez, Chin-Long Wey, Michael A. Shanblatt:
Mapping Multiplication Algorithms into a Family of LUT-based FPGAs (Abstract). FPGA 1998: 259 - [c22]Wei-Hsing Huang, Chin-Long Wey:
Test points selection process and diagnosability analysis of analog integrated circuits. ICCD 1998: 582-587 - [c21]Jin-Sheng Wang, Chin-Long Wey:
High-speed CMOS switched-current D/A converters for low-power/low-voltage signal processing applications. ICECS 1998: 19-22 - 1997
- [c20]Cheng-Ping Wang, Chin-Long Wey:
Development of Hierarchical Testability Design Methodologies for Analog/Mixed-Signal Integrated Circuits. ICCD 1997: 468-473 - 1996
- [j11]Chin-Long Wey:
Built-in self-test (BIST) design of high-speed carry-free dividers. IEEE Trans. Very Large Scale Integr. Syst. 4(1): 141-145 (1996) - [c19]Cheng-Ping Wang, Chin-Long Wey:
Test Generation Of Analog Switched-Current Circuits. Asian Test Symposium 1996: 276-281 - [c18]Chin-Long Wey:
On Design of Efficient Square Generator. ICCD 1996: 506-511 - [c17]Chin-Long Wey:
Mixed-signal circuit testing-A review. ICECS 1996: 1064-1067 - 1995
- [j10]Ren-Yuan Huang, Chin-Long Wey:
Simple yet accurate current copiers for low-voltage current-mode signal-processing applications. Int. J. Circuit Theory Appl. 23(2): 137-145 (1995) - [j9]Jun-Woo Kang, Chin-Long Wey, P. David Fisher:
Application of Bipartite Graphs for Achieving Race-Free State Assignment. IEEE Trans. Computers 44(8): 1002-1011 (1995) - [j8]Chin-Long Wey, Shoba Krishnan, Sondes Sahli:
Test generation and concurrent error detection in current-mode A/D converters. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(10): 1291-1298 (1995) - [c16]Chin-Long Wey, Haiyan Wang, Cheng-Ping Wang:
A self-timed redundant-binary number to binary number converter for digital arithmetic processors. ICCD 1995: 386-391 - [c15]Tzu-Hsi Pan, Hyon-Sok Kay, Youngsun Chun, Chin-Long Wey:
High-radix SRT division with speculation of quotient digits . ICCD 1995: 479-484 - [c14]Chin-Long Wey:
Built-In Self Test (BIST) Design of High-Speed Carry-Free Dividers. ISCAS 1995: 1916-1919 - 1994
- [c13]Chin-Long Wey:
Concurrent Error Detection in High Speed Carry-free Division Using Alternative Input Data. ICCD 1994: 124-127 - 1993
- [j7]Shoba Krishnan, Chin-Long Wey:
An accurate reference-generating circuit for successive approximation current mode A/D converters. Int. J. Circuit Theory Appl. 21(4): 361-369 (1993) - [c12]Chin-Long Wey, Ming-Der Shieh, P. David Fisher:
ASLCScan: A Scan Design Technique for Asynchronous Sequential Logic Circuits. ICCD 1993: 159-162 - [c11]Jun-Woo Kang, Chin-Long Wey, P. David Fisher:
Race-free state assignments using bipartite graphs. ISCAS 1993: 2560-2563 - 1992
- [c10]Shoba Krishnan, Sondes Sahli, Chin-Long Wey:
Test Generation and Concurrent Error Detection in Current-Mode A/D Converters. ITC 1992: 312-320 - 1991
- [c9]Chin-Long Wey:
Concurrent Error Detection in Array Dividers by Alternating Input Data. ICCD 1991: 114-117 - 1990
- [j6]Chin-Long Wey, Tsin-Yuan Chang:
An efficient output phase assignment for PLA minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(1): 1-7 (1990) - [c8]Chin-Long Wey, Jyhyeung Ding, Tsin-Yuan Chang:
Design of Repairable and Fully Diagnosable Folded PLAs for Yield Enhancement. DAC 1990: 327-332 - [c7]Chin-Long Wey, Jyhyeung Ding:
Design of repairable and fully testable folded PLAs. ICCD 1990: 112-115
1980 – 1989
- 1989
- [j5]Tsin-Yuan Chang, Chin-Long Wey:
Design of fault diagnosable and repairable PLA's. IEEE J. Solid State Circuits 24(5): 1451-1454 (1989) - [c6]Chin-Long Wey, Sin-Min Chang, Jing-Yang Jou:
OPAM: an efficient output phase assignment for multilevel logic minimization. ICCD 1989: 270-273 - [c5]Chin-Long Wey:
Fault Location in Repairable Programmable Logic Arrays. ITC 1989: 679-685 - 1988
- [j4]Shek-Wayne Chan, Chin-Long Wey:
The design of concurrent error diagnosable systolic arrays for band matrix multiplications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(1): 21-37 (1988) - [j3]Chin-Long Wey:
On yield consideration for the design of redundant programmable logic arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(4): 528-535 (1988) - [c4]Chin-Long Wey, Tsin-Yuan Chang:
PLAYGROUND: Minimization of PLAs with Mixed Ground True Outputs. DAC 1988: 421-426 - [c3]Chin-Long Wey, Sin-Min Chang:
Test generation of C-testable array dividers. ICCD 1988: 140-144 - 1987
- [j2]Chin-Long Wey, Fabrizio Lombardi:
On a Novel Self-Test Approach to Digital Testing. Comput. J. 30(3): 258-267 (1987) - [j1]Chin-Long Wey, Fabrizio Lombardi:
On the Repair of Redundant RAM's. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(2): 222-231 (1987) - [c2]Chin-Long Wey:
On Yield Consideration for the Design of Redundant Programmable Logic Arrays. DAC 1987: 622-628 - 1985
- [c1]Fabrizio Lombardi, Chin-Long Wey:
On a Multiprocessor System with Dynamic Redundancy. RTSS 1985: 3-12
Coauthor Index
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