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2020 – today
- 2024
[j4]Yu-Hsuan Tsai
, Yi-Cheng Lin, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Shi-Hao Chen, Chi-Shi Chen, Chia-Hsiang Yang:
A 28-nm 1.3-mW Speech-to-Text Accelerator for Edge AI Devices. IEEE J. Solid State Circuits 59(11): 3816-3826 (2024)- [j3]Wen-Cong Huang, I-Ting Lin, Ying-Sheng Lin, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Chia-Hsiang Yang:
A 25.1-TOPS/W Sparsity-Aware Hybrid CNN-GCN Deep Learning SoC for Mobile Augmented Reality. IEEE J. Solid State Circuits 59(11): 3840-3852 (2024) - 2023
- [c16]Yen-Lung Chen, Chung-Hsuan Yang, Yi-Chung Wu, Chao-Hsi Lee, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Jui-Hung Hung, Chia-Hsiang Yang:
A Fully Integrated End-to-End Genome Analysis Accelerator for Next-Generation Sequencing. ISSCC 2023: 44-45 - [c15]I-Ting Lin, Zih-Sing Fu, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Chia-Hsiang Yang:
A 28nm 142mW Motion-Control SoC for Autonomous Mobile Robots. ISSCC 2023: 46-47 - [c14]Cheng-Yan Du, Chieh-Fu Tsai, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Chia-Hsiang Yang:
A 28nm 11.2TOPS/W Hardware-Utilization-Aware Neural-Network Accelerator with Dynamic Dataflow. ISSCC 2023: 332-333 - 2022
- [c13]Wen-Cong Huang, I-Ting Lin, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Chia-Hsiang Yang:
A 28-nm 25.1 TOPS/W Sparsity-Aware CNN-GCN Deep Learning SoC for Mobile Augmented Reality. VLSI Technology and Circuits 2022: 42-43 - 2021
- [j2]Yi-Chung Wu, Yen-Lung Chen, Chung-Hsuan Yang, Chao-Hsi Lee, Chao-Yang Yu, Nian-Shyang Chang, Ling-Chien Chen, Jia-Rong Chang, Chun-Pin Lin, Hung-Lieh Chen, Chi-Shi Chen, Jui-Hung Hung, Chia-Hsiang Yang:
A 975-mW Fully Integrated Genetic Variant Discovery System-on-Chip in 28 nm for Next-Generation Sequencing. IEEE J. Solid State Circuits 56(1): 123-135 (2021) - [c12]Ying-Cheng Lu, Ching-Wen Chen, Ching-Chun Pu, Yang-Tung Lin, Jyun-Kai Jhan, Shu-Ping Liang, Wei-Lun Tseng, Chi-Shi Chen, Chao-Yang Yu, Hsiu-Wen Wang, Hong-Han Shuai, Herming Chiueh:
An 176.3 GOPs Object Detection CNN Accelerator Emulated in a 28nm CMOS Technology. AICAS 2021: 1-4 - [c11]Ying-Cheng Lu, Ching-Wen Chen, Ching-Chun Pu, Yang-Tung Lin, Jyun-Kai Jhan, Shu-Ping Liang, Wei-Lun Tseng, Chi-Shi Chen, Chao-Yang Yu, Hsiu-Wen Wang, Hong-Han Shuai, Herming Chiueh:
Live Demo: An 176.3 GOPs Object Detection CNN Accelerator Emulated in a 28nm CMOS Technology. AICAS 2021: 1 - [c10]Yu-Tung Liu, ChuKing Kung, Ming-Hang Hsieh, Hsiu-Wen Wang, Chun-Pin Lin, Chao-Yang Yu, Chi-Shi Chen, Tzi-Dar Chiueh:
A 1.625 TOPS/W SOC for Deep CNN Training and Inference in 28nm CMOS. ESSCIRC 2021: 107-110 - [c9]Yu-Tung Liu, ChuKing Kung, Ming-Hang Hsieh, Hsiu-Wen Wang, Chun-Pin Lin, Chao-Yang Yu, Chi-Shi Chen, Tzi-Dar Chiueh:
A 1.625 TOPS/W SOC for Deep CNN Training and Inference in 28nm CMOS. ESSDERC 2021: 107-110 - 2020
- [c8]Yi-Chung Wu, Yen-Lung Chen, Chung-Hsuan Yang, Chao-Hsi Lee, Chao-Yang Yu, Nian-Shyang Chang, Ling-Chien Chen, Jia-Rong Chang, Chun-Pin Lin, Hung-Lieh Chen, Chi-Shi Chen, Jui-Hung Hung, Chia-Hsiang Yang:
21.1 A Fully Integrated Genetic Variant Discovery SoC for Next-Generation Sequencing. ISSCC 2020: 322-324
2010 – 2019
- 2019
- [c7]Hsiang-Ming Yen, Chia-Ling Wei, Chi-Shi Chen, Terng-Yin Hsu:
High-Efficiency Step-Down Multi-Mode Switching DC-DC Converter for IoT Devices. SoCC 2019: 449-454 - 2018
- [c6]Shun-Wen Cheng, Chun-Pin Lin, Chi-Shi Chen, Wei-Chang Tsai:
Universal CMOS Diamond-Graph Circuit for Embedded Computing. SoCC 2018: 206-212 - 2017
- [c5]Po-Tsang Huang, Yu-Chieh Huang, Shang-Lin Wu, Yu-Chen Hu, Ming-Wei Lu, Ting-Wei Sheng, Fung-Kai Chang, Chun-Pin Lin, Nien-Shang Chang, Hung-Lieh Chen, Chi-Shi Chen, Jeng-Ren Duann, Tzai-Wen Chiu, Wei Hwang, Kuan-Neng Chen, Ching-Te Chuang, Jin-Chern Chiou:
An implantable 128-channel wireless neural-sensing microsystem using TSV-embedded dissolvable μ-needle array and flexible interposer. ISCAS 2017: 1-4 - 2012
- [c4]Chien-Lin Huang, Nian-Shyang Chang, Chi-Shi Chen, Chun-Pin Lin, Chien-Ming Wu, Chun-Ming Huang:
A novel design methodology for hybrid process 3D-IC. VLSI-DAT 2012: 1-4 - 2011
- [j1]Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Shih-Lun Chen, Chi-Shi Chen, Jiann-Jenn Wang, Kuen-Jong Lee, Chin-Long Wey:
Programmable System-on-Chip for Silicon Prototyping. IEEE Trans. Ind. Electron. 58(3): 830-838 (2011) - [c3]Chih-Chyau Yang, Nien-Hsiang Chang, Shih-Lun Chen, Wei-De Chien, Chi-Shi Chen, Chien-Ming Wu, Chun-Ming Huang:
A novel methodology for Multi-Project System-on-a-Chip. SoCC 2011: 308-311
2000 – 2009
- 2009
- [c2]Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Wei-De Chien, Shih-Lun Chen, Chi-Shi Chen, Jiann-Jenn Wang, Chin-Long Wey:
Implementation and Prototyping of a Complex Multi-project System-on-a-chip. ISCAS 2009: 2321-2324 - 2006
- [c1]Chun-Ming Huang, Kuen-Jong Lee, Chih-Chyau Yang, Wen-Hsiang Hu, Shi-Shen Wang, Jeng-Bin Chen, Chi-Shi Chen, Lan-Da Van, Chien-Ming Wu, Wei-Chang Tsai, Jing-Yang Jou:
Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping. SoCC 2006: 137-140
Coauthor Index
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