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2010 – 2019
- 2016
[c29]Hsiang-An Yang, Wen-Hau Yang, Ke-Horng Chen
, Chin-Long Wey, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai, Shin-Chi Lai:
12.7 A 96%-efficiency and 0.5%-current-cross-regulation single-inductor multiple floating-output LED driver with 24b color resolution. ISSCC 2016: 230-231- 2015
- [j13]Jen-Huan Tsai, Hui-Huan Wang, Yang-Chi Yen, Chang-Ming Lai, Yen-Ju Chen, Po-Chiun Huang, Ping-Hsuan Hsieh, Hsin Chen, Chao-Cheng Lee:
A 0.003 mm2 10 b 240 MS/s 0.7 mW SAR ADC in 28 nm CMOS With Digital Error Correction and Correlated-Reversed Switching. IEEE J. Solid State Circuits 50(6): 1382-1398 (2015) - [j12]Wei-Chung Chen, Yi-Ping Su, Tzu-Chi Huang, Tsu-Wei Tsai, Ruei-Hong Peng, Kuei-Liang Lin, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Shian-Ru Lin, Tsung-Yen Tsai:
Single-Inductor Quad-Output Switching Converter With Priority-Scheduled Program for Fast Transient Response and Unlimited Load Range in 40 nm CMOS Technology. IEEE J. Solid State Circuits 50(7): 1525-1539 (2015) - [j11]Chao-Chang Chiu, Po-Hsien Huang, Moris Lin, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Chao-Cheng Lee:
A 0.6 V Resistance-Locked Loop Embedded Digital Low Dropout Regulator in 40 nm CMOS With 80.5% Power Supply Rejection Improvement. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(1): 59-69 (2015) - [j10]Ming-Chiuan Su, Wei-Zen Chen, Pei-Si Wu, Yu-Hsian Chen, Chao-Cheng Lee, Shyh-Jye Jou:
A 10-Gb/s, 1.24 pJ/bit, Burst-Mode Clock and Data Recovery With Jitter Suppression. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(3): 743-751 (2015) - [j9]Shang-Hsien Yang, Yuan-Han Yang, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Shian-Ru Lin, Chao-Cheng Lee:
A Low-THD Class-D Audio Amplifier With Dual-Level Dual-Phase Carrier Pulsewidth Modulation. IEEE Trans. Ind. Electron. 62(11): 7181-7190 (2015) - [c28]Li-Cheng Chu, Te-Fu Yang, Ru-Yu Huang, Yi-Ping Su, Chiun-He Lin, Chin-Long Wey, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai:
200nA low quiescent current deep-standby mode in 28nm DC-DC buck converter for active implantable medical devices. A-SSCC 2015: 1-4 - [c27]Yen-Ting Lin, Shin-Chi Lai, Shin-Hao Chen, Shen-Yu Peng, Ke-Horng Chen, Sheng Kang, Kevin Cheng, Ying-Hsi Lin, Chen-Chih Huang, Chao-Cheng Lee:
99.4% peak audio signal recovery rate and ultra-low 0.32dB matching error with 10Hz high resolution filter fitting wearable aided speech compensation system. A-SSCC 2015: 1-4 - [c26]Jui-Che Su, Wei-Chung Chen, Wei-Tin Lin, Ying-Wei Chou, Meng-Wei Chien, Chin-Long Wey, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Shian-Ru Lin, Tsung-Yen Tsai:
Pseudo AC current synthesizer and DC offset-corrected technique in constant-on-time control buck converter for werable electronics. A-SSCC 2015: 1-4 - [c25]Meng-Wei Chien, Wen-Hau Yang, Ying-Wei Chou, Hsin-Chieh Chen, Wei-Chung Chen, Ke-Horng Chen, Chin-Long Wey, Shin-Chi Lai, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai, Hsin-Yu Luo:
Suppressing output overshoot voltage technique with 47.1mW/μs power-recycling rate and 93% peak efficiency DC-DC converter for multi-core processors. ESSCIRC 2015: 188-191 - [c24]Hsiang-An Yang, Chao-Chang Chiu, Shin-Chi Lai, Jui-Lung Chen, Chih-Wei Chang, Che-Hao Meng, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai, Hsin-Yu Luo:
120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETs. ESSCIRC 2015: 291-294 - [c23]Te-Fu Yang, Ru-Yu Huang, Yi-Ping Su, Balakumar, Ke-Horng Chen, Tsung-Yen Tsai, Jian-Ru Lin, Ying-Hsi Lin, Chao-Cheng Lee, Pei-Ling Tseng:
Implantable biomedical device supplying by a 28nm CMOS self-calibration DC-DC buck converter with 97% output voltage accuracy. ISCAS 2015: 1366-1369 - [c22]Hsin Chen, Chi-Wei Chen, Hsueh-Yi Hsieh, Ke-Horng Chen, Tsung-Yen Tsai, Jian-Ru Lin, Ying-Hsi Lin, Chao-Cheng Lee, Pei-Ling Tseng:
Self-adjustable feed-forward control and auto-tracking off-time control techniques for 95% accuracy and 95% efficiency AC-DC non-isolated LED driver. ISCAS 2015: 1746-1749 - [c21]Tsung-Hsun Tsai, Ke-Horng Chen, Tsung-Yen Tsai, Jian-Ru Lin, Ying-Hsi Lin, Chao-Cheng Lee, Pei-Ling Tseng:
99% High accuracy knee voltage detection for primary-side control in flyback converter. ISCAS 2015: 1754-1757 - [c20]Yi-Ping Su, Chiun-He Lin, Shen-Yu Peng, Ru-Yu Huang, Te-Fu Yang, Shin-Hao Chen, Ting-Jung Lo, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai:
12.6 90% Peak efficiency single-inductor-multiple-output DC-DC buck converter with output independent gate drive control. ISSCC 2015: 1-3 - 2014
- [c19]Yi-Ping Su, Chiun-He Lin, Te-Fu Yang, Ru-Yu Huang, Wei-Chung Chen, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Chao-Cheng Lee:
CCM/GM relative skip energy control in single-inductor multiple-output DC-DC converter for wearable device power solution. A-SSCC 2014: 65-68 - [c18]Shang-Hsien Yang, Chin-Long Wey, Ke-Horng Chen, Ying-Hsi Lin, Jing-Jia Chen, Tsung-Yen Tsai, Chao-Cheng Lee:
A 20MS/s buck/boost supply modulator for envelope tracking applications with direct digital interface. A-SSCC 2014: 73-76 - [c17]Shin-Hao Chen, Shen-Yu Peng, Ke-Horng Chen, Shin-Chi Lai, Sheng Kang, Kevin Cheng, Ying-Hsi Lin, Chen-Chih Huang, Chao-Cheng Lee:
A 2.5W tablet speaker delivering 3.2W pseudo high power by psychoacoustic model based adaptive power management system. A-SSCC 2014: 221-224 - [c16]Hsin-Chieh Chen, Wei-Chung Chen, Ying-Wei Chou, Meng-Wei Chien, Chin-Long Wey, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Chao-Cheng Lee:
Anti-ESL/ESR variation robust constant-on-time control for DC-DC buck converter in 28nm CMOS technology. CICC 2014: 1-4 - [c15]Wei-Chung Chen, Tzu-Chi Huang, Tsu-Wei Tsai, Ruei-Hong Peng, Kuei-Liang Lin, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee, Li-Ren Huang, Chao-Jen Huang, Chung-Chih Hung, Chin-Long Wey, Hsin-Yu Luo:
Single inductor quad output switching converter with priority-scheduled program for fast transient and unlimited-load range in 40nm CMOS technology. ESSCIRC 2014: 167-170 - [c14]Wei-Chung Chen, Kuei-Liang Lin, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee, Zhih Han Tai, Yi Hsuan Cheng, Chi Chung Tsai, Hsin-Yu Luo, Shih-Ming Wang, Long-Der Chen, Cheng-Chen Yang:
A pseudo fixed switching frequency 2kHz/A in optimum on-time control buck converter with predicting correction technique for EMI solution. ISCAS 2014: 946-949 - [c13]Shang-Hsien Yang, Yuan-Han Yang, Ke-Horng Chen, Chung-Chih Hung, Chin-Long Wey, Ying-Hsi Lin, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee, Zhih Han Tai, Yi Hsuan Cheng, Chi Chung Tsai, Hsin-Yu Luo, Shih-Ming Wang, Long-Der Chen, Cheng-Chen Yang, Huang Tian Hui:
A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR. ISCAS 2014: 2676-2679 - [c12]Ying-Wei Chou, Meng-Wei Chien, Shin-Chieh Chen, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee, Zhih Han Tai, Yi Hsuan Cheng, Chi Chung Tsai, Hsin-Yu Luo, Shih-Ming Wang, Long-Der Chen, Cheng-Chen Yang, Huang Tian Hui:
A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique. ISCAS 2014: 2680-2683 - [c11]Wei-Chung Chen, Yung-Sheng Huang, Meng-Wei Chien, Ying-Wei Chou, Hsin-Chieh Chen, Yi-Ping Su, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee:
±3% voltage variation and 95% efficiency 28nm constant on-time controlled step-down switching regulator directly supplying to Wi-Fi systems. VLSIC 2014: 1-2 - [c10]Tzu-Chi Huang, Ming-Jhe Du, Kuei-Liang Lin, Shao Siang Ng, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee, Jui-Lung Chen, Hung-Wei Chen:
A direct AC-DC and DC-DC cross-source energy harvesting circuit with analog iterating-based MPPT technique with 72.5% conversion efficiency and 94.6% tracking efficiency. VLSIC 2014: 1-2 - 2013
- [j8]Yu-Huei Lee, Shen-Yu Peng, Chao-Chang Chiu, Alex Chun-Hsien Wu, Ke-Horng Chen, Ying-Hsi Lin, Shih-Wei Wang, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee:
A Low Quiescent Current Asynchronous Digital-LDO With PLL-Modulated Fast-DVS Power Management in 40 nm SoC for MIPS Performance Improvement. IEEE J. Solid State Circuits 48(4): 1018-1030 (2013) - [j7]Shen-Yu Peng, Tzu-Chi Huang, Yu-Huei Lee, Chao-Chang Chiu, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Tsung-Yen Tsai, Chen-Chih Huang, Long-Der Chen, Cheng-Chen Yang:
Instruction-Cycle-Based Dynamic Voltage Scaling Power Management for Low-Power Digital Signal Processor With 53% Power Savings. IEEE J. Solid State Circuits 48(11): 2649-2661 (2013) - [c9]Ming-Chiuan Su, Wei-Zen Chen, Pei-Si Wu, Yu-Hsian Chen, Chao-Cheng Lee, Shyh-Jye Jou:
A 10Gbps, 1.24pJ/bit, burst-mode clock and data recovery with jitter suppression. CICC 2013: 1-4 - 2012
- [j6]Wen-Shen Chou, Tzu-Chi Huang, Yu-Huei Lee, Yao-Yi Yang, Yi-Ping Su, Ke-Horng Chen, Chen-Chih Huang, Ying-Hsi Lin, Chao-Cheng Lee, Kuei-Ann Wen, Ying-Chih Hsu, Yung-Chow Peng, Fu-Lung Hsueh:
An Embedded Dynamic Voltage Scaling (DVS) System Through 55 nm Single-Inductor Dual-Output (SIDO) Switching Converter for 12-Bit Video Digital-to-Analog Converter. IEEE J. Solid State Circuits 47(7): 1568-1584 (2012) - [j5]Yu-Huei Lee, Chao-Chang Chiu, Shen-Yu Peng, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Chen-Chih Huang, Tsung-Yen Tsai:
A Near-Optimum Dynamic Voltage Scaling (DVS) in 65-nm Energy-Efficient Power Management With Frequency-Based Control (FBC) for SoC System. IEEE J. Solid State Circuits 47(11): 2563-2575 (2012) - [c8]Yu-Huei Lee, Tzu-Chi Huang, Kuan-Yu Chu, Chao-Chang Chiu, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Ching-Yuan Yeh, Chen-Chih Huang, Chao-Cheng Lee:
A single-inductor dual-output (SIDO) based power management with adaptive bus voltage modulation and zero cross-regulation in 40nm CMOS. ESSCIRC 2012: 161-164 - [c7]Yi-Ping Su, Shao-Wei Chiu, Chun-Chieh Kuo, Yu-Huei Lee, Ke-Horng Chen, Ying-Hsi Lin, Chen-Chih Huang, Chao-Cheng Lee, Yu-Wen Chen:
Inductorless and electrolytic capacitorless pseudo-sine current controller in LED lighting system with 1.1W/2.2W power reduction. ESSCIRC 2012: 442-445 - [c6]Yu-Huei Lee, Shen-Yu Peng, Alex Chun-Hsien Wu, Chao-Chang Chiu, Yao-Yi Yang, Ming-Hsin Huang, Ke-Horng Chen, Ying-Hsi Lin, Shih-Wei Wang, Ching-Yuan Yeh, Chen-Chih Huang, Chao-Cheng Lee:
A 50nA quiescent current asynchronous digital-LDO with PLL-modulated fast-DVS power management in 40nm CMOS for 5.6 times MIPS performance. VLSIC 2012: 178-179 - 2010
- [j4]Yi-Da Wu, Chang-Ming Lai, Chao-Cheng Lee, Po-Chiun Huang:
A Quantization Error Minimization Method Using DDS-DAC for Wideband Fractional-N Frequency Synthesizer. IEEE J. Solid State Circuits 45(11): 2283-2291 (2010)
2000 – 2009
- 2008
- [c5]Po-Chih Wang, Kai-Yi Huang, Yu-Fu Kuo, Ming-Chong Huang, Chao-Hua Lu, Tzung-Ming Chen, Chia-Jun Chang, Ka-Un Chan, Ta-Hsun Yeh, Wen-Shan Wang, Ying-Hsi Lin, Chao-Cheng Lee:
A 2.4-GHz +25dBm P-1dB linear power amplifier with dynamic bias control in a 65-nm CMOS process. ESSCIRC 2008: 490-493 - 2007
- [j3]Tzung-Ming Chen, Yung-Ming Chiu, Chun-Cheng Wang, Ka-Un Chan, Ying-Hsi Lin, Ming-Chong Huang, Chao-Hua Lu, Wen-Shan Wang, Che-Sheng Hu, Chao-Cheng Lee, Jiun-Zen Huang, Bin-I Chang, Shih-Chieh Yen, Ying-Yao Lin:
A Low-Power Fullband 802.11a/b/g WLAN Transceiver With On-Chip PA. IEEE J. Solid State Circuits 42(5): 983-991 (2007) - [c4]Cheng-Chung Hsu, Chen-Chih Huang, Ying-Hsi Lin, Chao-Cheng Lee:
A 10b 200MS/s pipelined folding ADC with offset calibration. ESSCIRC 2007: 151-154 - [c3]Cheng-Chung Hsu, Fong-Ching Huang, Chih-Yung Shih, Chen-Chih Huang, Ying-Hsi Lin, Chao-Cheng Lee, Behzad Razavi:
An 11b 800MS/s Time-Interleaved ADC with Digital Background Calibration. ISSCC 2007: 464-615 - 2006
- [j2]Yuan-Shuo Chang, Chia-Liang Lin, Wen-Shan Wang, Chao-Cheng Lee, Chih-Yung Shih:
An Analytical Approach for Quantifying Clock Jitter Effects in Continuous-Time Sigma-Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(9): 1861-1868 (2006) - [c2]Turgut Aytur, Han-Chang Kang, Ravishankar H. Mahadevappa, Mustafa Altintas, Stephan ten Brink, Thanh Diep, Cheng-Chung Hsu, Feng Shi, Fei-Ran Yang, Chao-Cheng Lee, Ran-Hong Yan, Behzad Razavi:
A Fully Integrated UWB PHY in 0.13µm CMOS. ISSCC 2006: 418-427 - 2005
- [j1]Behzad Razavi, Turgut Aytur, Christopher Lam, Fei-Ran Yang, Kuang-Yu (Jason) Li, Ran-Hong (Ran) Yan, Han-Chang Kang, Cheng-Chung Hsu, Chao-Cheng Lee:
A UWB CMOS transceiver. IEEE J. Solid State Circuits 40(12): 2555-2562 (2005) - [c1]Behzad Razavi, Turgut Aytur, Christopher Lam, Fei-Ran Yang, Ran-Hong Yan, Han-Chang Kang, Cheng-Chung Hsu, Chao-Cheng Lee:
Multiband UWB transceivers. CICC 2005: 141-148
Coauthor Index
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