default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID7th ICECS 2000: Jounieh, Lebanon
- Proceedings of the 2000 7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000, Jounieh, Lebanon, December 17-20, 2000. IEEE 2000, ISBN 0-7803-6542-9
- Hwang-Cherng Chow, Chen-Yi Huang, Chih-Hong Chang:
Novel output buffer designs for universal serial bus IC applications. 3-6 - Ivan Grech, Joseph Micallef, Tanya Vladimirova:
Low voltage, high speed fully differential CMOS op amp. 7-10 - Chatpong Suriyaammaranon, Kobchai Dejhan, Fusak Cheevasuvit, Chatcharin Soonyeekan:
A high speed and low voltage BiCMOS tristate buffer with positive and negative charge pump. 11-14 - Munir A. Abdallah, Christer Fröjdh, C. S. Petersson:
A new biasing method for CMOS preamplifier-shapers. 15-18 - Y. Tsiatouhas
, A. Chrisanthopoulos, George Kamoulakos, Th. Haniotakis:
New memory sense amplifier designs in CMOS technology. 19-22 - Zygmunt Ciota, Mariusz Jankowski, Andrzej Napieralski:
Design of A/D converters using current-mode standard cells. 24-27 - Mikko Waltari, Kari Halonen:
Reference voltage driver for low-voltage CMOS A/D converters. 28-31 - Lauri Sumanen, Mikko Waltari, Kari Halonen:
A mismatch insensitive CMOS dynamic comparator for pipeline A/D converters. 32-35 - Mark Vesterbacka, Mikael Rudberg, J. Jacob Wikner, Niklas U. Andersson:
Dynamic element matching in D/A converters with restricted scrambling. 36-39 - Ka Hing Chiang, K. V. Chiang, K. F. Lam, Wai-Wa Choi, Kam-Weng Tam, Rui Paulo Martins:
A modular approach for high Q microwave CMOS active inductor design. 41-44 - O. Rozeau, Sébastien Haendler, Jalal Jomaah, J. Boussey, Francis Balestra, C. Raynaud, J. L. Pelloie:
0.25 μm SOI technologies performance for low-power radio-frequency applications. 45-48 - Luís Nero Alves, José Luis Cura, Rui L. Aguiar, Dinis M. Santos:
An eight-sector wireless infrared receiver. 49-52 - Nada El-Zein, Mandar Deshpande, Gary Kramer, Jonathan Lewis, Vijay Nair, Marilyn Kyler, Herb Goronkin:
Quantum MMIC: future and applications in RF circuits. 53-56 - Lampros Dermentzoglou, Aristodimos Pneumatikakis, Angela Arapoyanni, Yiannis Moisiadis:
A multimode extra high IF1 image rejection receiver for TDMA applications. 57-60 - José-Gerardo Rosiles, Mark J. T. Smith:
Model-based coding of SAR and ultrasound images. 62-65 - Hassan Diab, Emad Abdennour, Nashat Mansour:
Spreadsheet model for MorphoSys RC array. 66-69 - Loay Sabry-Ismaïl:
An object oriented model for multimedia objects. 70-73 - Ghassan Fayad, Karim Khordoc:
An object-oriented approach to system modeling and codesign for multimedia applications. 74-77 - Hongbing Fan, Jiping Liu, Yu-Liang Wu:
A global routing model for universal switch box design. 78-81 - Ewa Hermanowicz, Marek Blok:
Iterative technique for approximate minimax design of complex digital FIR filters. 83-86 - Elizabeth Elias, Per Löwenborg, Håkan Johansson, Lars Wanhammar:
Design of m-channel tree-structured filter banks with very low-complexity analysis filters. 87-90 - Abbas Dandache, Fabrice Monteiro, Bernard Lepley:
Design of a selective digital filter for a DAVIC compliant modem. 91-94 - Mohammad Ali Masnadi-Shirazi, M. Safdar:
Laguerre network design in complex domain. 95-98 - Hassan Diab, Emad Abdennour, Fadi J. Kurdahi:
FIR filter mapping and performance analysis on MorphoSys. 99-102 - Chung-Hsien Tso, Jiin-Chuan Wu:
An integrated digital PWM DC/DC converter. 104-107 - Carl J. Debono, Franco Maloberti, Joseph Micallef:
A low-voltage CMOS multiplier and its application to a 900 MHz RF downconversion mixer. 108-111 - Ivan Grech, Joseph Micallef, Tanya Vladimirova:
Low voltage SC TDM correlator for the extraction of time delay. 112-115 - Abdelohahab Djemouai, Mohamad Sawan, Mustapha Slamani:
New CMOS integrated pulse width modulator for voltage conversion applications. 116-119 - Fabrizio Cortigiani, Corrado Petri, Santina Rocchi, Valerio Vignoli:
Very high-speed true random noise generator. 120-123 - Saska Lindfors:
A two-step quantization ΔΣ-modulator architecture with cascaded digital noise cancellation. 125-128 - Mansour A. Aldajani, Ali H. Sayed:
Stability analysis of an adaptive structure for sigma delta modulation. 129-132 - Robert Suszynski:
Experimental circuit with current mode ΣΔ modulators with switched transconductance. 133-136 - Hussam Kassem, Philippe Forster:
Improved demodulation using multichannel estimation under reduced rank constraint: experimental results. 138-141 - Mohamad M. Ayoub, Mohamed R. M. Rizk:
In-band microwave video distribution system (IB-MVDS): network architecture. 142-145 - Marcello Pesare, Agostino Giorgio, Anna Gina Perri:
Electrothermal model of multilayer structure for the design of GaAs integrated circuit devices. 146-151 - Laurent Ros, Joumana Farah, Marylin Arndt:
Joint linear multi-sensor reception in downlink TD/CDMA. 152-155 - Wassim El Falou, Mohamad Khalil, Jacques Duchêne:
AR-based method for change detection using dynamic cumulative sum. 157-160 - David M. Binkley, Matthias Bucher, Daniel Foty:
Design-oriented characterization of CMOS over the continuum of inversion level and channel length. 161-164 - P. Sun, A. J. Al-Khalili, Dhamin Al-Khalili:
A CAD tool for first hand CMOS circuit selection. 165-168 - Wadih Zaatar, George E. Nasr:
An implementation scheme for a microprocessor emulator. 169-172 - Maher Kayal, D. Cousinard, Riad Kanan:
Automatic design tool for submicron current steering logic libraries. 173-176 - Qi-Wen Yang, Feng Lin, Guo-Hong Zhang, Jing-Ping Jiang:
The application of computational intelligence to Fourier transformation. 178-181 - Abbes Amira, Ahmed Bouridane, Peter Milligan:
A novel architecture for Walsh Hadamard transforms using distributed arithmetic principles. 182-185 - Said Boussakta, Osama Alshibami, Ahmed Bouridane:
Vector radix algorithm for the 2-D NMNT. 186-188 - Charalambos S. Christou:
Fast computations on a low-cost DSP-based shared-memory multiprocessor system. 189-192 - Hossam M. A. Fahmy, Abu Bakr A. ElHefnawy:
A method for distributed unicast in hypercubes. 194-197 - Yang Xiao, Mangui Liang:
Finite frequency test for Hurwitz 2-D polynomials. 198-201 - Roland P. Malhamé:
Negative resistance oscillators revisited. 202-205 - Stephan J. G. Gift:
Novel precision full-wave rectifier. 206-209 - A. I. Bahnacy, S. M. Elhalafawy, Yahia M. M. Antar:
Stacked L-shaped probe fed microstrip antenna. 210-213 - Hassani Messaoud, Saber Maraoui:
Study and comparison of membership-set outer bounding. 214-217 - Hassani Messaoud, Zeineb Akoum:
An algorithm for computing parameter bounds using prior information on physical parameter bounds. 218-221 - Maja Sliskovic:
Signal processing algorithm for OFDM channel with impulse noise. 222-225 - Khaoula Allani:
An efficient multimodal variational analysis of cascaded asymmetric discontinuities. 226-229 - A. Mayouf, F. Djahli, S. Laib:
Full-wave characterization of open-end and gap discontinuities of coplanar striplines. 230-233 - Lukusa D. Kabulepa, Manfred Glesner:
Design of random number generators for the HIPERLAN/1 channel access mechanism. 234-237 - Rami Ahola, Kari Halonen:
A 4 GHz fractional-N frequency synthesizer. 239-242 - Ahmed Mostafa, Mourad N. El-Gamal:
A 12.5 GHz back-gate tuned CMOS voltage controlled oscillator. 243-247 - Anne Spataro, Yann Deval, Jean-Baptiste Bégueret, Pascal Fouillat:
Delay oriented design methodology: application to the design of a VHF low power VLSI polyphase oscillator. 248-251 - Youcef Fouzar, Mohamad Sawan, Yvon Savaria:
Very short locking time PLL based on controlled gain technique. 252-255 - Amir M. Sodagar, G. Roientan Lahiji, Ali Azarpeyvand:
A novel architecture for sine-output direct digital frequency synthesizers using parabolic approximation. 256-259 - Ali E. Abdallah, John Hawkins:
Calculational design of special purpose parallel algorithms. 261-267 - Ali E. Abdallah, G. Simiakakis, Theoharis Theoharis:
Formal development of a reconfigurable tool for parallel DNA matching. 268-272 - Shengchao Qin, Jifeng He:
An algebraic approach to hardware/software partitioning. 273-276 - Yannick Le Moullec, Jean-Philippe Diguet, Jean Luc Philippe:
A scheduling framework for system-level estimation. 277-280 - Adam Podhorski, Jerzy Sawicki, Andrzej Brykalski:
Speaker-dependent automatic helium speech normalisation. 282-285 - Hongmao Sun, Chunyan Wang, M. Omair Ahmad, M. N. S. Swamy:
An 8 Kb/s low-delay CELP speech coder. 286-289 - Shahram Etemadi Borujeni:
Speech encryption based on fast Fourier transform permutation. 290-293 - Juliana F. Camapum Wanderley, Mark H. Fisher:
Color texture invariants for natural image recognition based on human visual system. 295-298 - Ziad O. Abu-Faraj, Abdallah Atie, Kamal Chebaklo, Edouard Khoukaz:
Fingerprint identification software for forensic applications. 299-302 - Z. Alkachouh, M. Bellanger:
Efficient high quality restoration of missing blocks in images. 303-306 - Tami R. Randolph, Mark J. T. Smith:
A new approach to object classification in binary images. 307-310 - Mokhtar Nibouche, Ahmed Bouridane, Omar Nibouche, Danny Crookes, S. Boussekta:
Design and FPGA implementation of orthonormal discrete wavelet transforms. 312-315 - Ayman I. Kayssi, Louis Harik, Rony Ferzli, Mohammad Fawaz:
FPGA-based Internet protocol firewall chip. 316-319 - Kiseon Cho, Minkyu Song:
Design of novel macro-cells for next generation ASIC cell library. 320-323 - Stefan Johansson, Martin Nilsson, Peter Nilsson:
An OFDM timing synchronization ASIC. 324-327 - Eduardo de Vasconcelos, Rui L. Aguiar:
Frame detection in high bit-rate CMOS systems. 328-331 - Donglai Xu, Said Boussakta, John P. Bentley:
An FPGA-based low-cost frame grabber for image processing applications. 333-336 - Abdeldjalil Ouahabi, Denis Kouamé:
Fast techniques for time delay and Doppler estimation. 337-340 - Dalong Li:
Moving objects detection by block comparison. 341-344 - M. Bousselmi, Mohamed Salim Bouhlel, Nouri Masmoudi, Lotfi Kamoun:
New parallel architecture of the DCT and its inverse for image compression. 345-348 - Hadi Harb, Abdul Hassan Husseiny:
Isolated words recognition using neural networks. 349-351 - Ridha Hamila, Markku Renfors:
Nonlinear operator for multipath channel estimation in GPS receivers. 352-356 - Samer S. Saab, Dany S. Charbachy:
Differential GPS performance: ground versus geostationary satellite. 357-360 - Chii-Tung Liu, Pol-Lin Tai, Arlene Y.-J. Chen, Chen-Hsing Peng, Jia-Shung Wang:
A content-based medical teaching file assistant for CT lung image retrieval. 361-365 - Jean-Luc Danger, Adel Ghazel, Emmanuel Boutillon, Hédi Laamari:
Efficient FPGA implementation of Gaussian noise generator for communication channel emulation. 366-369 - Chokri Achour, Jean-Louis Houle, Jacob Davidson:
A VLSI architecture of 2D wavelet transforms. 370-373 - Jamil N. Ayoub, Wael H. Saafin, Bassam Z. Kahhaleh:
k-terminal reliability of communication networks. 374-377 - Shahram Minaei, Hakan Kuntman, Oguzhan Cicekoglu, Sait Turkoz, Nil Tarim:
A new high output impedance current-mode universal filter with single input and three outputs using dual output CCIIs. 379-382 - Hussain A. Alzaher, Mohammed Ismail:
Digitally tuned analog integrated filters using the R-2R ladder. 383-385 - Rabin Raut:
A new technique to stabilize frequency and Q-variations due to temperature changes in gm-C filters in CMOS technology. 386-389 - Bing Deng, Tao Tian, Junmin Pan:
DSP based sensorless control for induction motor using extended Kalman filter. 390-393 - Wei Li, Jan Vandewege:
Practical design considerations on lumped element filters for microwave applications. 394-397 - C. Ratzko, Jeff W. Sanders:
A calculus of signals. 399-402 - Babafemi O. Osoba, Fethi A. Rabhi, Mohamed Ould-Khaoua:
A BSP performance prediction model for parallel multigrid algorithms. 403-406 - Kevin Hammond:
Hume: a bounded time concurrent language. 407-411 - Jifeng He, Huibiao Zhu:
Formalising VERILOG. 412-415 - Sverre Wichlund, Einar J. Aas:
On efficient CPU-usage in a VLSI CAD-environment with application to circuit partitioning. 416-419 - Yang Xiao:
Robust stability test for state-space models with structured uncertainty. 421-424 - A. Chrisanthopoulos, George Kamoulakos, Y. Tsiatouhas, Angela Arapoyanni:
A test pattern generation unit for memory NPSF built-in self test. 425-428 - Côme Rozon, Dhamin Al-Khalili, Saman Adham, Douglas Racz:
Comparing defect coverage for current-mode logic and CMOS VLSI cells. 429-432 - Fiorenzo Filippetti, Marcello Artioli:
Single and multiple fault diagnosis based on symbolic analysis and reduced set of observable points for linear analog circuits. 433-436 - Stelios Krinidis, Nikos Nikolaidis, Ioannis Pitas:
Shape based alignment of 3-D volume slices. 438-441 - Youcef Chibani, Amrane Houacine:
On the use of the redundant wavelet transform for multisensor image fusion. 442-445 - Mohamad Adnan Al-Alaoui, Rami Farran, Claudia Lakkis, Ralph Rabbat:
Ballistic oracle at military borders (B.O.M.B). 446-449 - Reiko Osada, Terumasa Aoki, Hiroshi Yasuda:
A vector coding with a compressive algorithm for natural images. 452-455 - Kostas Masselos, Yorgos A. Karayiannis, I. Andreopoulos, Thanos Stouraitis:
Development of a power efficient image coding algorithm based on integer wavelet transform. 457-460 - Faouzi Alaya Cheikh, Azhar Quddus, Moncef Gabbouj:
Shape recognition based on wavelet-transform modulus maxima. 461-464 - Pol-Lin Tai, Chii-Tung Liu, Jia-Shung Wang:
A unified systolic array design for wavelet-based video codec. 465-468 - Mathieu Hazouard, Eric Kerhervé, Pierre Jarry:
An alternative process for solid state power amplifiers using large S parameters. 470-473 - Per Asbeck, Carsten Fallesen:
A 29 dBm 1.9 GHz class B power amplifier in a digital CMOS process. 474-477 - Per Asbeck, Carsten Fallesen:
A polar linearisation system for RF power amplifiers. 478-481 - Ernesto G. Jeckeln, Fadhel M. Ghannouchi, Mohamad Sawan, François Beauregard:
Amplifier's predistortion-based linearizers for forward-channel link broadband applications. 482-485 - Shao-li Kang, Yang Xiao, Zhengding Qiu:
A novel adaptive noise canceller with master-slave structure. 487-490 - Hanan A. Mahmoud, Magdy A. Bayoumi:
An efficient low-bit rate adaptive mesh-based motion compensation technique. 491-494 - Hamed Shah-Hosseini, Reza Safabakhsh:
Pattern classification by the time adaptive self-organizing map. 495-498 - Fouad Mrad, Zafer Wazzan:
Adaptive robot contact planning and control. 499-504 - Joe Costello, Dhamin Al-Khalili:
Behavioural synthesis of low power floating point CORDIC processors. 506-509 - François-Raymond Boyer, El Mostapha Aboulhamid, Yvon Savaria:
An efficient verification method for a class of multi-phase sequential circuits. 510-515 - Ioannis Poulakis, Petros Economakos, George Economakos, Ioannis Panagopoulos, George K. Papakonstantinou:
A top-down interactive behavioral synthesis environment. 516-519 - George Economakos, Ioannis Drositis, George K. Papakonstantinou:
A complete specification and implementation methodology for high-level hardware transformations. 520-523 - Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe:
Area time power estimation for FPGA based designs at a behavioral level. 524-527 - John E. Kleider, Glen P. Abousleman:
Robust image transmission using source adaptive modulation with diversity. 529-532 - Zhen Liu, Lina J. Karam, Glen P. Abousleman, Thomas Key, Bassem Razzouk:
Error-resilient video coding and application to telemedicine. 533-536 - Dalong Li, Hanqing Lu:
Shot detection with multi-measures. 537-540 - Dalong Li, Hanqing Lu:
Lighting change problem in shot detection. 541-544 - I. F. El-Arabawy, Mohamed R. M. Rizk, H. S. Khaddam:
The effect of membership functions in fuzzy systems on the stability region. 546-549 - Noureddine Goléa, Amar Goléa, Khier Benmahammed:
Fuzzy adaptive control: a hyperstability approach. 550-553 - Jean J. Saade, Mohannad Al-Khatib:
Efficient representation of non-linear functions by fuzzy controllers design algorithms. 554-557 - Ahmed Sultan, Mohamed El-Sayed:
Analog VLSI implementation of adaptive neuro-fuzzy inference systems. 558-561 - Marko Kosunen, Kari Halonen:
A programmable FIR filter using serial-in-time multiplication and canonic signed digit coefficients. 563-566 - Kostas Adaos, George Alexiou, Nick Kanopoulos:
Development of reusable serial FIR filters with reprogrammable coefficients designed for serial dataflow architectures. 567-570 - Marek Jaskula, Roman Kaszynski:
Using a parametric filter to average brainstem auditory evoked potentials. 571-574 - Naser Mollaverdi, Mohammad Modarres Yazdi:
A nonlinear optimization by Lagrangian relaxations. 575-578 - Jasvir Singh, Davinder Pal Sharma, S. S. Bhatti, K. Kaur, Amanpreet Singh:
Information processing in digital domain. 579-582 - Osama Alshibami, Said Boussakta, Mohammed Aziz, D. Xu:
Split-radix algorithm for the new Mersenne number transform. 583-586 - Esam Abdel-Raheem, Fayez El Guibaly:
A tool for two's complement, bit-level, fixed-point simulation of digital filters. 587-590 - Mohammed Aziz, Said Boussakta:
A hybrid parallel algorithm for digital image filtering applications. 591-594 - Adnene Cherif:
Pitch and formants extraction algorithm for speech processing. 595-598 - Mohammed Abo-Zahhad, Sabah M. Ahmed, A. Al-Shrouf:
Electrocardiogram data compression algorithm based on the linear prediction of the wavelet coefficients. 599-603 - Ireneusz Brzozowski, Andrzej Kos:
Energy consumption minimisation with new synthesis method. 605-608 - Shanq-Jang Ruan, Jen-Chiun Lin, Po-Hung Chen, Feipei Lai, Kun-Lin Tsai, Chung-Wei Yu:
An effective output-oriented algorithm for low power multipartition architecture. 609-612 - Mohammad M. Mansour, Makram M. Mansour, Ibrahim N. Hajj, Naresh R. Shanbhag:
Instruction scheduling for low power on dynamically variable voltage processors. 613-618 - Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni:
High performance level restoration circuits for low-power reduced-swing interconnect schemes. 619-622 - Fiorenzo Filippetti, Marcello Artioli:
Symbolic linear Mathematica based technique for piecewise linear circuits. 625-628 - M. A. Suhail, Mohammad S. Obaidat:
A robust digital watermarking technique. 629-632 - Mohammad S. Obaidat, Georgios I. Papadimitriou, Andreas S. Pomportsis:
Fast learning automata for high-speed real-time applications. 633-636 - Costas Efstathiou, Haridimos T. Vergos:
Modified Booth 1's complement and modulo 2n-1 multipliers. 637-640 - Ahmed R. Abdelaziz:
Genetic algorithm-based power transmission expansion planning. 642-645 - María José Gil Larrea, José Miguel Urquijo Aramburu, José Luis Gutiérrez Temiño:
Minimum area in wheels [VLSI floorplanning]. 646-649 - Hiba Tabbara, Tarek Dana, Nashat Mansour:
Heuristics for graph decomposition. 650-653 - Yu-Liang Wu, Chin Ngai Sze, Chak-Chung Cheung, Hongbing Fan:
On improved graph-based alternative wiring scheme for multi-level logic optimization. 654-657 - Ayman Mohamed Wahba:
BDD/AOG-based algorithm for multiple error rectification in combinational circuits. 658-661 - Wael M. Badawy, Magdy A. Bayoumi:
A scalable affine core for mesh-based video object motion compensation. 663-666 - Berna Erol, Faouzi Kossentini:
Retrieval of video objects by compressed domain shape features. 667-670 - Carolina Blanch-Pérez del Notario, Armando Malanda-Trigueros:
Kohonen-GLA algorithms for efficient vector quantization. 671-674 - Andrew E. J. Ng, John I. Sewell:
Switched-current bilinear ladder group-delay equalisers. 676-679 - Xuan Li, Wen-tao Song, Han-wen Luo:
Design and analysis of Turbo decoder for China 3rd generation mobile communication system. 680-683 - Biljana Stojanovic, Miodrag Gmitrovic, Zlatoljub Milosavljevic:
Optimal multiplier coefficient values in cascade realized discrete networks. 684-687 - A. Tawfik, Esam Abdel-Raheem, Pan Agathoklis:
A modified dithered signed-error constant-modulus algorithm for blind adaptive equalizer. 688-691 - Ahmed R. Abdelaziz:
A new approach for enumerating minimal cut-sets in a network. 693-696 - Issam W. Damaj, Jean J. Saade, Hassan B. Diab:
Performance testing of refrigerators using fuzzy inference methodology under Labview(R). 697-700 - Vasile Dragos, Vasile Dan, Adriana Florescu, Dan Alexandru Stoichescu:
Fuzzy and neuro-fuzzy designs of boost converter supplying DC motors. 701-704 - Hesham Hallal, Radu Negulescu, Alexandre Petrenko:
Design of divergence-free protocol converters using supervisory control techniques. 705-708 - Ute Diemar, Roland Suesse:
The synthesis of a configuration to create a special potential distribution. 709-712 - Mohamad Saad, Lahcen Saydy, Ouassima Akhrif:
Robust noncollocated passive models of a flexible link with uncertain payload and joint inertia. 713-716 - Bruno Heckmann, Lahcen Saydy:
Control modeling of a FACTS device connected to a synchronous generator. 717-720 - Lahcen Saydy, Ouassima Akhrif, Guchuan Zhu:
Handling quality characterization of flight systems controller gains. 721-724 - Seyed Hossein Hosseini, Mehrdad Tarafdar Haque, Sohrab Khanmohammadi:
Neural network based programmed pulse width modulation usable on voltage source inverters (VSIs). 725-728 - Raymond F. Ghajar, Karim Saikali:
A user-friendly and fast program for the simulation of power system faults. 729-732 - Felix A. Himmelstoss, Peter H. Wurm:
Low-loss converters with high step-up conversion ratio working at the border between continuous and discontinuous mode. 734-737 - Hadi Youssef Kanaan, Kamal Al-Haddad, Rachid Chaffai, Louis Duguay:
Susceptibility and input impedance evaluation of a single phase unity power factor rectifier. 738-741 - Karl H. Edelmoser, Felix A. Himmelstoss:
Improved wide input voltage range 1 kW solar inverter. 742-745 - Seyed Hossein Hosseini, Sohrab Khanmohammadi, H. Javidnia:
Comparison of different voltage control strategies for current regulated PWM inverters supplying an induction motor. 746-749 - Stefano Gregori, Pietro Ferrari, Rino Micheloni, Guido Torelli:
Construction of polyvalent error control codes for multilevel memories. 751-754 - Sébastien Laberge, Radu Negulescu:
An asynchronous FIFO with fights: case study in speed optimization. 755-758 - Andrea Pierin, Stefano Gregori, Osama Khouri, Rino Micheloni, Guido Torelli:
High-speed low-power sense comparator for multilevel flash memories. 759-762 - Arturo Sarmiento-Reyes, Luis Hernández-Martínez, Héctor Vázquez-Leal, A. Bocanegra-Haro, Rafael Vargas-Bernal:
An optimal reordering schema of homotopy equations for the analysis of nonlinear resistive circuits. 764-767 - Arturo Sarmiento-Reyes, Luis Hernández-Martínez, Rafael Vargas-Bernal:
Matrix-based search of a pair of compatible i-v orientations for the uniqueness analysis of nonlinear resistive circuits. 768-771 - Thomas Mohr, F. Hermann Uhlmann:
Detecting thresholds by means of jump-phenomena. 772-775 - Aysegül Uçar, Serdar Ethem Hamamci:
A controller based on coefficient diagram method for the robotic manipulators. 777-780 - Tarek M. M. Nasab:
A new approach for designing a PI controller via variable structure system theory. 781-784 - Tarek M. M. Nasab:
A new variable structure control design with stability analysis for MIMO systems. 785-788 - Gyeong-Hae Han, Bum-Suk Ko:
All-digital logic control PWM/PFC for inverter system. 789-792 - Mohamed R. M. Rizk, M. Abdel Rahim:
Robust stochastic controller for a missile guidance system. 793-796 - Samer S. Saab, Abdul Aziz Hajjar:
Changeover of counters in pulse generator with a numerical count discriminator. 798-801 - A. Maouad, J. P. Charles, A. Khoury, A. Hoffmann:
New design method for controlling power stages based on IGBT switching ferrite transformers: applied to an 8 kW small size light weight electric welding machine. 802-804 - Tadeusz Piotrowski:
Instantaneous components of power and actual physical phenomena in sinusoidal circuits. 805-808 - M. Faouzi-Mimouni, Rachid Dhifaoui:
Robust speed identification for speed sensorless vector control of current-fed double-star induction machine. 809-813 - Fabrice Aubépart, Philippe Poure, Francis Braun:
VLSI design approach of complex motor control, case of direct torque control of AC machine. 814-817 - Rui L. Aguiar, Dinis M. Santos:
Highly efficient multi-point clock distribution networks. 819-822 - Dionisis Skias, Th. Haniotakis, Y. Tsiatouhas, Angela Arapoyanni:
A state assignment algorithm for finite state machines. 823-826 - Grégory Servel, Denis Deschacht:
On-chip crosstalk evaluation between adjacent interconnections. 827-834 - Murat R. Becer, Ibrahim N. Hajj:
An analytical model for delay and crosstalk estimation in interconnects under general switching conditions. 831-834 - Burkart Voss, Manfred Glesner:
Adiabatic charging of long interconnects. 835-838 - A. Alliche, K. Mokrani:
Detection of cardiac late potentials using higher order time-frequency. 840-843 - Abdelghani Djebbari, Fethi Bereksi-Reguig:
Short-time Fourier transform analysis of the phonocardiogram signal. 844-847 - George K. Gregoriou:
An observer performance study of the effect of using the body contour in reconstructing cardiac SPECT images from truncated projection data. 848-852 - Zohir Dibi, Ali Boukabache, Patrick Pons:
Effect of the silicon membrane flatness defect on the piezoresistive pressure sensor response. 853-856 - Vassilis Paliouras, Thanos Stouraitis:
High-radix residue number system forward and inverse converters. 858-861 - Süleyman Sirri Demirsoy, Andrew G. Dempster, Izzet Kale:
Transition analysis on FPGA for multiplier-block based FIR filter structures. 862-865 - Michael J. Corinthios:
Pole-zero estimation of continuous and discrete time systems. 866-869 - Mark Vesterbacka:
A static CMOS master-slave flip-flop experiment. 870-873 - Wagdy R. Anis:
FM and FSK detection using a subtractor filter. 875-878 - Victor Kureichik, Lyudmila Zinchenko:
Evolutionary design of electronic devices. 879-882 - Lu Chen, Bingxue Shi, Chun Lu:
A high speed/power ratio continuous-time CMOS current comparator. 883-886 - Hossein Zarei, Omid Shoaei, Sied Mehdi Fakhraie, M. M. Zakeri:
A 1.4 GHz/2.7 V programmable frequency divider for DRRS standard in 0.6 μm CMOS process. 887-890 - Davide Maschera, Andrea Simoni, Lorenzo Gonzo, Massimo Gottardi, Stefano Gregori, Valentino Liberali, Guido Torelli:
CMOS front-end for optical rotary encoders. 891-894 - Francisco del Águìla-López, Pere Palà-Schönwälder, Jordi Bonet-Dalmau, M. Rosa Giralt-Mas:
Steady state analysis of class-E amplifier with non-linear capacitor by means of discrete-time techniques. 895-898 - Mikael Karlsson Rudberg, Mark Vesterbacka, Niklas U. Andersson, J. Jacob Wikner:
Glitch minimization and dynamic element matching in D/A converters. 899-902 - Abdoul Rjoub, Odysseas G. Koufopavlou:
Multiple low swing voltage values for CPL, CVSL and domino logic families. 903-906 - Chung-Yu Wu, Yu-Yee Liow:
High-speed CMOS current-mode wave-pipelined analog-to-digital converter. 907-910 - Adnan Harb, Mohamad Sawan:
Low-power CMOS implantable nerve signal analog processing circuit. 911-914 - S. H. Hosseini, M. Tarafdar Hague:
A parallel loaded DC/DC resonant converter with a new power and control circuit. 915-918 - H. M. Hamed, M. E. Zaghloul, Aly E. Salama, El-Sayed A. Talkhan:
Mixed signal decoder for audio frequency applications. 919-922 - Michal Tadeusiewicz, Stanislaw Halgas:
An algorithm for finding all the DC solutions of short-channel MOS transistor circuits. 924-927 - Rafael Vargas-Bernal, Arturo Sarmiento-Reyes, Luis Hernández-Martínez:
On the maximum number of DC solutions of general transistor networks. 928-931 - Peter Celinski, Said F. Al-Sarawi, Derek Abbott:
Delay analysis of neuron-MOS and capacitive threshold-logic. 932-935 - N. Guenifi, F. Djahli, A. Mayouf:
Relation between MOSFET degradation and interface-states generation. 936-939 - M. Fadlallah, Gérard Ghibaudo, Jalal Jomaah, M. Zoaeter:
Numerical simulation and modeling of static characteristics and electrical noise in submicron MOS transistors. 940-943 - Ali Öztürk, Salih Günes, Yüksel Özbay:
Multifont Ottoman character recognition. 945-949 - Mohamad Adnan Al-Alaoui, Rodolphe Mouci, Mohamad Mansour:
A redundancy approach to classifier training. 950-953 - S. Cherif, Ch. Khélifi:
Neural network modeling of land mobile radio channels with nonlinear transmit amplifiers. 954-957 - Chun Lu, Bingxue Shi, Lu Chen:
Hybrid BP-GA for multilayer feedforward neural networks. 958-961 - Amine Bermak, Farid Boussaïd, Abdesselam Bouzerdoum:
A digitally programmable current mode analog shunting inhibition cellular neural network. 962-965 - Ignacio Gracia-Lozano, Armando Malanda-Trigueros:
Sparse deconvolution by means of genetic algorithms. 967-970 - Yaser M. A. Khalifa:
Design centering of analog circuit's component values using parallel genetic algorithms. 971-974 - Jianxin Liao, Min'an Li, Xi Chen, Jiandong Hu:
The use of genetic algorithms for statistical circuit design. 975-978 - Feng Lin, Qi-Wen Yang:
Application of allied genetic algorithms in sensorless speed adjustment control for induction motor drive system. 979-982 - Takefumi Suzuki, Shigenori Tomiyama:
Extrapolation for band-pass delay time characteristics by using genetic algorithm on DCT. 983-986 - Lihong Zhang, Ulrich Kleine, Tobias Rudolph, Markus Wolf:
A new design rule description for automated layout tools. 988-992 - Mohamed Benmohammed, Abdelatif Rahmoune, Polen Kission:
The application of high-level synthesis techniques for the generation of pipelined reprogrammable microcontrollers. 993-998 - Alok Barua, Mahendra K. Chandrakar:
SYSCUF: automated synthesis of switched current filter. 999-1003 - Hussein Chible:
Analog circuit for synapse neural networks VLSI implementation. 1004-1007 - Mohamed Taher, Ashraf Salem, Hani Mahdi, A. Wahdan:
An oscillating algorithm for variable ordering in binary decision diagram. 1008-1011 - Ninglong Lu, Ibrahim N. Hajj:
A hierarchical based approach for coupling aware delay analysis of combinational logic blocks. 1012-1015 - Haidar Harmanani, Salam Harfoush:
Test insertion at the RT level using functional test metrics. 1016-1020 - K. F. Chang, Pedro Cheong, Sio Weng Ting, Kam-Weng Tam:
Novel speech spectra all-pole modelling based upon selective even-samples linear prediction. 1022-1025 - Mahmoud Al-Qutayri:
System level testing of analog functions in a mixed-signal circuit. 1026-1029 - Osama Khouri, Rino Micheloni, Andrea Sacco, Giovanni Campardo, Guido Torelli:
Program word-line voltage generator for multilevel flash memories. 1030-1033
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-12-02 21:34 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
