default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDChung-Yu Wu
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
[j59]Yi-Hui Wu
, Hsiao-Chun Lin, Chi-Wei Huang, Chung-Yu Wu, Ming-Dou Ker:
Stimulation-Induced Artifact Removal of the Local Field Potential Through Hardware Design: Toward the Implantable Closed-Loop Deep Brain Stimulation. IEEE Access 12: 171488-171499 (2024)- [j58]Chung-Yu Wu, Chi-Wei Huang, Yu-Wei Chen, Chin-Kai Lai, Chung-Chih Hung, Ming-Dou Ker:
Design of CMOS Analog Front-End Local-Field Potential Chopper Amplifier With Stimulation Artifact Tolerance for Real-Time Closed-Loop Deep Brain Stimulation SoC Applications. IEEE Trans. Biomed. Circuits Syst. 18(3): 539-551 (2024) - 2023
- [j57]Chi-Wei Huang, Chin-Kai Lai, Chung-Chih Hung, Chung-Yu Wu, Ming-Dou Ker:
A CMOS Synchronized Sample-and-Hold Artifact Blanking Analog Front-End Local Field Potential Acquisition Unit With ±3.6-V Stimulation Artifact Tolerance and Monopolar Electrode-Tissue Impedance Measurement Circuit for Closed-Loop Deep Brain Stimulation SoCs. IEEE Trans. Circuits Syst. I Regul. Pap. 70(6): 2257-2270 (2023) - 2022
- [j56]Chung-Yu Wu, Hsuan-Hung Liu, Po-Hung Chen, Chuan-Chin Chiao, Fang-Liang Chu, Yueh-Chun Tsai, Po-Chun Chen, Wen-Yuan Tsai, Ying-Hsuen Wu, Chi-Kuan Tseng:
Design and Ex Vivo Experimental Validations of the CMOS 256-Pixel Photovoltaic-Powered Subretinal Prosthetic Chip With Auto-Adaptive Pixels for a Wide Image Illuminance Range. IEEE Trans. Biomed. Eng. 69(1): 482-493 (2022) - [c90]Chi-Wei Huang, Jian-Jun Wang, Chung-Chih Hung, Chung-Yu Wu:
Design of CMOS Analog Front-End Electroencephalography (EEG) Amplifier with ±1-V Common-mode and ±10-mV Differential-mode Artifact Removal. BioCAS 2022: 714-717 - 2021
- [j55]Sung-Hao Wang, Yu-Kai Huang, Ching-Yuan Chen, Li-Yang Tang, Yen-Fu Tu, Po-Chih Chang, Chia-Fone Lee, Chia-Hsiang Yang, Chung-Chih Hung, Chien-Hao Liu, Ming-Dou Ker, Chung-Yu Wu:
Design of a Bone-Guided Cochlear Implant Microsystem With Monopolar Biphasic Multiple Stimulations and Evoked Compound Action Potential Acquisition and Its In Vivo Verification. IEEE J. Solid State Circuits 56(10): 3062-3076 (2021) - 2020
- [j54]Po-Han Kuo, Oi-Ying Wong, Chi-Kuan Tzeng, Pu-Wei Wu, Chuan-Chin Chiao, Po-Hung Chen, Po-Chun Chen, Yueh-Chun Tsai, Fang-Liang Chu, Jun Ohta, Takashi Tokuda, Toshihiko Noda, Chung-Yu Wu:
Improved Charge Pump Design and Ex Vivo Experimental Validation of CMOS 256-Pixel Photovoltaic-Powered Subretinal Prosthetic Chip. IEEE Trans. Biomed. Eng. 67(5): 1490-1504 (2020) - [j53]Chung-Yu Wu, Chi-Kuan Tseng, Jung-Hsing Liao, Chuan-Chin Chiao, Fang-Liang Chu, Yueh-Chun Tsai, Jun Ohta, Toshihiko Noda:
CMOS 256-Pixel/480-Pixel Photovoltaic-Powered Subretinal Prosthetic Chips With Wide Image Dynamic Range and Bi/Four-Directional Sharing Electrodes and Their Ex Vivo Experimental Validations With Mice. IEEE Trans. Circuits Syst. 67-I(10): 3273-3283 (2020) - [j52]Chung-Yu Wu, Sung-Hao Wang, Li-Yang Tang:
CMOS High-Efficiency Wireless Battery Charging System With Global Power Control Through Backward Data Telemetry for Implantable Medical Devices. IEEE Trans. Circuits Syst. 67-I(12): 5624-5635 (2020) - [c89]Sung-Hao Wang, Yu-Kai Huang, Ching-Yuan Chen, Chia-Fone Lee, Chia-Hsiang Yang, Chung-Chih Hung, Chien-Hao Liu, Ming-Dou Ker, Chung-Yu Wu:
Improved Design and In Vivo Animal Tests of Bone-Guided Cochlear Implant Microsystem with Monopolar Biphasic Multiple Stimulation and Neural Action Potential Acquisition. A-SSCC 2020: 1-4 - [c88]Yi-Hui Wu, Yi-Huan Ou-Yang, Chiung-Chu Chen, Chen-Yi Lee, Chung-Yu Wu, Ming-Dou Ker:
Miniaturized Intracerebral Potential Recorder for Long-Term Local Field Potential of Deep Brain Signals. EMBC 2020: 5188-5191
2010 – 2019
- 2019
- [j51]Xin-Hong Qian, Yi-Chung Wu, Tzu-Yi Yang, Cheng-Hsiang Cheng, Hsing-Chien Chu, Wan-Hsueh Cheng, Ting-Yang Yen, Tzu-Han Lin, Yung-Jen Lin, Yu-Chi Lee, Jia-Heng Chang, Shih-Ting Lin, Shang-Hsuan Li, Tsung-Chen Wu, Chien-Chang Huang, Sung-Hao Wang, Chia-Fone Lee, Chia-Hsiang Yang, Chung-Chih Hung, Tai-Shih Chi, Chien-Hao Liu, Ming-Dou Ker, Chung-Yu Wu:
Design and In Vivo Verification of a CMOS Bone-Guided Cochlear Implant Microsystem. IEEE Trans. Biomed. Eng. 66(11): 3156-3167 (2019) - [j50]Chi-Wei Liu, Yi-Lun Chen, Pei-Chun Liao, Shiau-Pin Lin, Ting-Wei Wang, Ming-Jie Chung, Po-Hung Chen, Ming-Dou Ker, Chung-Yu Wu:
An 82.9%-Efficiency Triple-Output Battery Management Unit for Implantable Neuron Stimulator in 180-nm Standard CMOS. IEEE Trans. Circuits Syst. II Express Briefs 66-II(5): 788-792 (2019) - [c87]Chi-Wei Huang, Chi-Heng Chung, Ruei-Syuan Syu, Chung-Yu Wu:
The Design of CMOS Electrode-Tissue Impedance Measurement Circuit Using Differential Current Switch with CMFB Bias for Implantable Neuro-Modulation SoCs. BioCAS 2019: 1-4 - [c86]Chung-Yu Wu, Chi-Wei Huang, Tzung-Lin Tsai:
A 2.36μW/Ch CMOS 8-Channel EEG Acquisition Unit with Input Protection Circuits for Applications Under Transcranial Direct Current Stimulation. BioCAS 2019: 1-4 - [c85]Chung-Yu Wu, Chi-Kuan Tzeng, Shih-Yun Huang, Fang-Liang Chu, Chuan-Chin Chiao, Yueh-Chun Tsai, Jun Ohta, Toshihiko Noda:
A CMOS 256-Pixel Self-Photovoltaics-Powered Subretinal Prosthetic Chip with Wide Image Dynamic Range and Shared Electrodes and Its In Vitro Experimental Results on Rd1 Mice. MWSCAS 2019: 29-32 - 2018
- [j49]Chung-Yu Wu, Patrick P. Mercier:
Introduction to the Special Issue on the 2018 IEEE International Solid-State Circuits Conference (ISSCC). IEEE J. Solid State Circuits 53(11): 3015-3016 (2018) - [j48]Cheng-Hsiang Cheng, Ping-Yuan Tsai, Tzu-Yi Yang, Wan-Hsueh Cheng, Ting-Yang Yen, Zhicong Luo, Xin-Hong Qian, Zhi-Xin Chen, Tzu-Han Lin, Wei-Hong Chen, Wei-Ming Chen, Sheng-Fu Liang, Fu-Zen Shaw, Cheng-Siu Chang, Yue-Loong Hsin, Chen-Yi Lee, Ming-Dou Ker, Chung-Yu Wu:
A Fully Integrated 16-Channel Closed-Loop Neural-Prosthetic CMOS SoC With Wireless Power and Bidirectional Data Telemetry for Real-Time Efficient Human Epileptic Seizure Control. IEEE J. Solid State Circuits 53(11): 3314-3326 (2018) - [j47]Chung-Yu Wu, Cheng-Hsiang Cheng, Zhi-Xin Chen:
A 16-Channel CMOS Chopper-Stabilized Analog Front-End ECoG Acquisition Circuit for a Closed-Loop Epileptic Seizure Control System. IEEE Trans. Biomed. Circuits Syst. 12(3): 543-553 (2018) - [c84]Kevin C. Tseng, Alice M. K. Wong, Chung-Yu Wu, Tian-Sheuan Chang, Yu-Cheng Pei, Jean-Lon Chen:
A Scoping Study on the Development of an Interactive Upper-Limb Rehabilitation System Framework for Patients with Stroke. HCI (8) 2018: 386-393 - [c83]Pin-Wen Chen, Chi-Wei Huang, Chung-Yu Wu:
An 1.97μ, W/Ch 65nm-CMOS 8-Channel Analog Front-End Acquisition Circuit with Fast-Settling Hybrid DC Servo Loop for EEG Monitoring. ISCAS 2018: 1-5 - [c82]Sung-Hao Wang, Yueh-Hsuan Lee, Xin-Hong Qian, Chung-Yu Wu:
The Design of CMOS 13.56-MHz High Efficiency 1×/3× 1.99V/6.29V Active Rectifier for Implantable Neuromodulation Systems. ISCAS 2018: 1-4 - 2017
- [c81]Chung-Yu Wu, Cheng-Hsiang Cheng, Yi-Huan Ou-Yang, Chiung-Ghu Chen, Wei-Ming Chen, Ming-Dou Ker, Chen-Yi Lee, Sheng-Fu Liang, Fu-Zen Shaw:
Design considerations and clinical applications of closed-loop neural disorder control SoCs. ASP-DAC 2017: 295-298 - [c80]Masaharu Imai, Yoshinori Takeuchi, Jun Ohta, Gregg Jørgen Suaning, Chung-Yu Wu, Napoleon Torres-Martinez:
Emerging technologies for biomedical applications: Artificial vision systems and brain machine interface. ASP-DAC 2017: 299 - [c79]Chao-Cheng Wu, You-Lun Wu, Chung-Yu Wu, Chinsu Lin:
A gradient vector flow snake based multi-level morphological active contour algorithm. IGARSS 2017: 5806-5809 - [c78]Cheng-Hsiang Cheng, Zhi-Xin Chen, Chung-Yu Wu:
A 16-channel CMOS chopper-stabilized analog front-end acquisition circuits for ECoG detection. ISCAS 2017: 1-4 - 2016
- [c77]Ya-Syuan Sung, Wei-Ming Chen, Chung-Yu Wu:
The design of 8-channel CMOS area-efficient low-power current-mode analog front-end amplifier for EEG signal recording. ISCAS 2016: 530-533 - 2015
- [j46]Yan-Jun Huang, Chung-Yu Wu, Alice May-Kuen Wong, Bor-Shyh Lin:
Novel Active Comb-Shaped Dry Electrode for EEG Measurement in Hairy Site. IEEE Trans. Biomed. Eng. 62(1): 256-263 (2015) - [c76]Chung-Yu Wu, Chia-Shiung Ho:
An 8-channel chopper-stabilized analog front-end amplifier for EEG acquisition in 65-nm CMOS. A-SSCC 2015: 1-4 - [c75]Chung-Yu Wu, Wei-Jie Sung, Po-Han Kuo, Chi-Kuan Tzeng, Chuan-Chin Chiao, Yueh-Chun Tsai:
The design of CMOS self-powered 256-pixel implantable chip with on-chip photovoltaic cells and active pixel sensors for subretinal prostheses. BioCAS 2015: 1-4 - [c74]Yu-Min Fu, Che-Yu Chen, Xin-Hong Qian, Yu-Ting Cheng, Chung-Yu Wu, Jui-Sheng Sun, Chien-Chun Huang, Chao-Kai Hu:
A microfabricated coil for implantable applications of magnetic spinal cord stimulation. EMBC 2015: 6912-6915 - [c73]Jung-Chen Chung, Wei-Ming Chen, Chung-Yu Wu:
An 8-channel power-efficient time-constant-enhanced analog front-end amplifier for neural signal acquisition. ISCAS 2015: 1234-1237 - 2014
- [j45]Wei-Ming Chen, Herming Chiueh, Tsan-Jieh Chen, Chia-Lun Ho, Chi Jeng, Ming-Dou Ker, Chun-Yu Lin, Ya-Chun Huang, Chia-Wei Chou, Tsun-Yuan Fan, Ming-Seng Cheng, Yue-Loong Hsin, Sheng-Fu Liang, Yu-Lin Wang, Fu-Zen Shaw, Yu-Hsing Huang, Chia-Hsiang Yang, Chung-Yu Wu:
A Fully Integrated 8-Channel Closed-Loop Neural-Prosthetic CMOS SoC for Real-Time Epileptic Seizure Control. IEEE J. Solid State Circuits 49(1): 232-247 (2014) - [j44]Chung-Yu Wu, Xin-Hong Qian, Ming-Seng Cheng, Yu-An Liang, Wei-Ming Chen:
A 13.56 MHz 40 mW CMOS High-Efficiency Inductive Link Power Supply Utilizing On-Chip Delay-Compensated Voltage Doubler Rectifier and Multiple LDOs for Implantable Medical Devices. IEEE J. Solid State Circuits 49(11): 2397-2407 (2014) - [c72]Yi-Xiao Wang, Wei-Ming Chen, Chung-Yu Wu:
A 65nm CMOS low-power MedRadio-band integer-N cascaded phase-locked loop for implantable medical systems. EMBC 2014: 642-645 - 2013
- [j43]Chung-Yu Wu, Wei-Ming Chen, Liang-Ting Kuo:
A CMOS Power-Efficient Low-Noise Current-Mode Front-End Amplifier for Neural Signal Recording. IEEE Trans. Biomed. Circuits Syst. 7(2): 107-114 (2013) - [j42]Tai-You Lu, Chi-Yao Yu, Wei-Zen Chen, Chung-Yu Wu:
Wide Tunning Range 60 GHz VCO and 40 GHz DCO Using Single Variable Inductor. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(2): 257-267 (2013) - [c71]Yu-Yu Liao, Wei-Ming Chen, Chung-Yu Wu:
A CMOS MedRadio-band low-power integer-N cascaded phase-locked loop for implantable medical SOCs. BioCAS 2013: 286-289 - [c70]Chia-Wei Chou, Li-Chen Liu, Chung-Yu Wu:
A MedRadio-band low-energy-per-bit 4-Mbps CMOS OOK receiver for implantable medical devices. EMBC 2013: 5171-5174 - [c69]Yuan-Fu Lyu, Chung-Yu Wu, Li-Chen Liu, Wei-Ming Chen:
A Low power 10bit 500kS/s delta-modulated SAR ADC (DMSAR ADC) for implantable medical devices. ISCAS 2013: 2046-2049 - [c68]Wei-Ming Chen, Herming Chiueh, Tsan-Jieh Chen, Chia-Lun Ho, Chi Jeng, Shun-Ting Chang, Ming-Dou Ker, Chun-Yu Lin, Ya-Chun Huang, Chia-Wei Chou, Tsun-Yuan Fan, Ming-Seng Cheng, Sheng-Fu Liang, Tzu-Chieh Chien, Sih-Yen Wu, Yu-Lin Wang, Fu-Zen Shaw, Yu-Hsing Huang, Chia-Hsiang Yang, Jin-Chern Chiou, Chih-Wei Chang, Lei-Chun Chou, Chung-Yu Wu:
A fully integrated 8-channel closed-loop neural-prosthetic SoC for real-time epileptic seizure control. ISSCC 2013: 286-287 - 2012
- [c67]Wei-Ming Chen, Chung-Yu Wu:
Live demonstration: The implementation of CMOS biopotential signal recording systems. BioCAS 2012: 83 - [c66]Wei-Ming Chen, Liang-Ting Kuo, Chung-Yu Wu:
A low-power current-mode front-end acquisition system for biopotential signal recording. ISCAS 2012: 842-845 - 2011
- [j41]Zue-Der Huang, Chung-Yu Wu:
The Design of a K-Band 0.8-V 9.2-mW Phase-Locked Loop. IEICE Trans. Electron. 94-C(8): 1289-1294 (2011) - [c65]Wei-Ming Chen, Wen-Chia Yang, Tzung-Yun Tsai, Herming Chiueh, Chung-Yu Wu:
The design of CMOS general-purpose analog front-end circuit with tunable gain and bandwidth for biopotential signal recording systems. EMBC 2011: 4784-4787 - 2010
- [j40]Po-Hung Chen, Min-Chiao Chen, Chun-Lin Ko, Chung-Yu Wu:
An Integrated CMOS Front-End Receiver with a Frequency Tripler for V-Band Applications. IEICE Trans. Electron. 93-C(6): 877-883 (2010) - [j39]Chung-Yu Wu, Sheng-Hao Chen, Yu Wu:
Design and Analysis of a CMOS Ratio-Memory Cellular Nonlinear Network (RMCNN) Requiring No Elapsed Time. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(6): 1348-1357 (2010) - [j38]Su-Yung Tsai, Chi-Hsu Wang, Chung-Yu Wu:
Stability Analysis of Autonomous Ratio-Memory Cellular Nonlinear Networks for Pattern Recognition. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 2156-2167 (2010) - [c64]Wen-Chieh Wang, Zue-Der Huang, Geert Carchon, Abdelkarim Mercha, Stefaan Decoutere, Walter De Raedt, Chung-Yu Wu:
45-nm Planar bulk-CMOS 23-GHz LNAs with high-Q above-IC inductors. ISCAS 2010: 741-744
2000 – 2009
- 2009
- [j37]Wen-Chieh Wang, Chung-Yu Wu:
A Low-Power K-Band CMOS Current-Mode Up-Conversion Mixer Integrated with VCO. IEICE Trans. Electron. 92-C(10): 1291-1298 (2009) - [j36]Fadi Riad Shahroury, Chung-Yu Wu:
A 1-V RF-CMOS LNA design utilizing the technique of capacitive feedback matching network. Integr. 42(1): 83-88 (2009) - [j35]Chung-Yu Wu, Sheng-Hao Chen:
The Design and Analysis of a CMOS Low-Power Large-Neighborhood CNN With Propagating Connections. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(2): 440-452 (2009) - [c63]Chih-Cheng Hsieh, Wei-Yu Chen, Chung-Yu Wu:
A High Performance Linear Current Mode Image Sensor. ISCAS 2009: 1273-1276 - 2008
- [c62]Wen-Chieh Wang, Chang-Ping Liao, Yi-Kai Lo, Zue-Der Huang, Fadi Riad Shahroury, Chung-Yu Wu:
The design of integrated 3-GHz to 11-GHz CMOS transmitter for full-band ultra-wideband (UWB) applications. ISCAS 2008: 2709-2712 - 2007
- [c61]Ming-Jong Tsai, Chao-Hsiang Feng, Chung-Yu Wu, Chang-Jung Juan:
An efficient Compensation Method for Improving Luminance Uniformity of Organic Light Emitting Diode Panels. CSC 2007: 177-182 - [c60]Po-Hung Chen, Min-Chiao Chen, Chung-Yu Wu:
An Integrated 60-GHz Front-end Receiver with a Frequency Tripler Using 0.13-μm CMOS Technology. ICECS 2007: 829-832 - [c59]Chung-Yu Wu, Po-Hung Chen:
A Low Power V-band Low Noise Amplifier Using 0.13-μm CMOS Technology. ICECS 2007: 1328-1331 - [c58]Chung-Yu Wu, Shun-Wei Hsu, Wen-Chieh Wang:
A 24-GHz CMOS Current-Mode Power Amplifier with High PAE and Output Power. ISCAS 2007: 2866-2869 - [c57]Chung-Yu Wu, Chien-Ta Huang:
A CMOS Expansion/Contraction Motion Sensor with a Retinal Processing Circuit for Z-motion Detection Applications. ISCAS 2007: 3087-3090 - 2006
- [c56]Chung-Yu Wu, Fadi Riad Shahroury:
A Low-Voltage CMOS LNA Design Utilizing the Technique of Capacitive Feedback Matching Network. ICECS 2006: 78-81 - [c55]Chung-Yu Wu, Yi-Kai Lo, Min-Chiao Chen:
A 3.110.6 GHz CMOS Direct-Conversion Receiver for UWB Applications. ICECS 2006: 1328-1331 - 2005
- [j34]Chung-Yun Chou, Chung-Yu Wu:
The design of wideband and low-power CMOS active polyphase filter and its application in RF double-quadrature receivers. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(5): 825-833 (2005) - [c54]Chung-Yu Wu, Ismail I. Nabhan:
A Novel low power high dynamic range all CMOS Current-mode AGC. ICECS 2005: 1-4 - [c53]Chung-Yu Wu, Chi-Yao Yu:
A 0.8 V 5.9 GHz wide tuning range CMOS VCO using inversion-mode bandswitching varactors. ISCAS (5) 2005: 5079-5082 - 2004
- [j33]Chung-Yu Wu, Chung-Yun Chou:
A 5-GHz CMOS double-quadrature receiver front-end with single-stage quadrature generator. IEEE J. Solid State Circuits 39(3): 519-521 (2004) - [j32]Chung-Yu Wu, Yu-Yee Liow:
New current-mode wave-pipelined architectures for high-speed analog-to-digital converters. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(1): 25-37 (2004) - [j31]Yu-Chuan Shih, Chung-Yu Wu:
A new CMOS pixel structure for low-dark-current and large-array-size still imager applications. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(11): 2204-2214 (2004) - [c52]Chung-Yu Wu, Wen-Chin Hsieh, Cheng-Ta Chiang:
A CMOS focal-plane retinal sensor designed for shear motion detection. ICECS 2004: 141-144 - [c51]Sheng-Hao Chen, Chung-Yu Wu:
A low power design on diffusive interconnection large-neighborhood cellular nonlinear network for giga-scale system application. ICECS 2004: 179-182 - [c50]Jui-Lin Lai, Chung-Yu Wu:
A learnable self-feedback ratio-memory cellular nonlinear network (SRMCNN) for associative memory applications. ICECS 2004: 183-186 - [c49]Chung-Yu Wu, Jen-Chieh Wang:
Optimal structure of interconnection lines for GHz giga-scale nano-CMOS system-on-chip design. ICECS 2004: 191-194 - [c48]Chung-Yu Wu, Felice Cheng, Cheng-Ta Chiang, Po-Kang Lin:
A low-power implantable Pseudo-BJT-based silicon retina with solar cells for artificial retinal prostheses. ISCAS (4) 2004: 37-40 - 2003
- [c47]Kuan-Hsun Huang, Li-Ju Lin, Chung-Yu Wu:
A CMOS focal-plane rotation sensor with retinal processing circuit. ESSCIRC 2003: 129-132 - [c46]Yu-Chuan Shih, Chung-Yu Wu:
An optimized CMOS pseudo-active-pixel-sensor structure for low-dark-current imager applications. ISCAS (1) 2003: 809-812 - 2002
- [c45]Hong-Sing Kao, Chung-Yu Wu:
An improved low-power CMOS direct-conversion transmitter for GHz wireless communication applications. APCCAS (1) 2002: 5-8 - [c44]Chung-Yun Chou, Chung-Yu Wu:
The design of a new wideband and low-power CMOS active polyphase filter for low-IF receiver applications. APCCAS (1) 2002: 241-244 - [c43]Chung-Yu Wu, Wen-Chieh Wang, Tzung-Ming Chen:
A new high-performance CMOS GHz power amplifier design with common-mode signal cancellation technique. APCCAS (2) 2002: 395-398 - [c42]Yu-Yee Liow, Chung-Yu Wu:
The design of high-speed pipelined analog-to-digital converters using voltage-mode sampling and current mode processing techniques. ISCAS (3) 2002: 117-120 - [c41]Chung-Yu Wu, Jui-Lin Lai:
Improvement of pattern learning and recognition capability in ratio-memory cellular neural networks with non-discrete-type Hebbian learning algorithm. ISCAS (1) 2002: 629-632 - 2001
- [j30]Ming-Dou Ker, Tung-Yang Chen, Tai-Ho Wang, Chung-Yu Wu:
On-chip ESD protection design by using polysilicon diodes in CMOS process. IEEE J. Solid State Circuits 36(4): 676-686 (2001) - [c40]Chung-Yu Wu, Kuan-Hsun Huang, Li-Ju Lin:
The design of CMOS real-time motion-direction detection chip with BJT-based silicon-retina sensors and correlation-based motion detection algorithm. ICECS 2001: 125-128 - [c39]Chung-Yu Wu, Li-Ju Lin, Kuan-Hsun Huang:
A new light-activated CMOS retinal-pulse generation circuit without external power supply for artificial retinal prostheses. ICECS 2001: 619-622 - [c38]Chung-Yu Wu, Chung-Yun Chou:
The design of a CMOS IF bandpass amplifier with low sensitivity to process and temperature variations. ISCAS (1) 2001: 121-124 - 2000
- [j29]Ming-Dou Ker, Tung-Yang Chen, Chung-Yu Wu, Hun-Hsien Chang:
ESD protection design on analog pin with very low input capacitance for high-frequency or current-mode applications. IEEE J. Solid State Circuits 35(8): 1194-1199 (2000) - [c37]Chung-Yu Wu, Yu-Yee Liow:
High-speed CMOS current-mode wave-pipelined analog-to-digital converter. ICECS 2000: 907-910 - [c36]Ming-Dou Ker, Tung-Yang Chen, Chung-Yu Wu, Hun-Hsien Chang:
Design and analysis of the on-chip ESD protection circuit with a constant input capacitance for high-precision analog applications. ISCAS 2000: 61-64 - [c35]Tsung-Hsin Yu, Chung-Yu Wu, Pei-Yen Chen, Fa-Wen Chi, Jiunn-Jye Luo, Cheng Der Chiang, Ya-Tung Cherng:
A new CMOS readout circuit for uncooled bolometric infrared focal plane arrays. ISCAS 2000: 493-496 - [c34]Chung-Yu Wu, Yu Cheng, Jeng Gong:
The new CMOS 2 V low-power IF fully differential Rm-C bandpass amplifier for RF wireless receivers. ISCAS 2000: 633-636 - [c33]Hong-Sing Kao, Chung-Yu Wu:
A compact CMOS 2 V low-power direct-conversion quadrature modulator merged with quadrature voltage-controlled oscillator and RF amplifier for 1.9 GHz RF transmitter applications. ISCAS 2000: 765-768
1990 – 1999
- 1999
- [j28]Yuh-Kuang Tseng, Chung-Yu Wu:
A new true-single-phase-clocking BiCMOS dynamic pipelined logic family for high-speed, low-voltage pipelined system applications. IEEE J. Solid State Circuits 34(1): 68-79 (1999) - [j27]Chung-Yu Wu, Hsin-Chin Jiang:
An improved BJT-based silicon retina with tunable image smoothing capability. IEEE Trans. Very Large Scale Integr. Syst. 7(2): 241-248 (1999) - [c32]Ming-Dou Ker, Wen-Yu Lo, Chung-Yu Wu:
New experimental methodology to extract compact layout rules for latchup prevention in bulk CMOS IC's. CICC 1999: 143-146 - [c31]Wen-Cheng Yen, Chung-Yu Wu:
A new compact programmable νBJT cellular neural network structure with adjustable neighborhood layers for image processing. ICECS 1999: 713-716 - [c30]Chung-Yu Wu, Zhong-Yun Zhou:
The design of 2 V 2.4 GHz CMOS low-noise low-power bandpass amplifier with parallel spiral inductors. ICECS 1999: 769-772 - [c29]Chung-Yu Wu, Hong-Sing Kao:
A 3 V 1.9 GHz CMOS low-distortion direct-conversion quadrature modulator with a RF amplifier. ICECS 1999: 777-780 - [c28]Chiou-Ling Yeh, Chung-Yu Wu:
The design of CMOS cellular neural network (CNN) using the neuron-bipolar junction transistor (νBJT). IJCNN 1999: 2337-2342 - [c27]Chung-Yu Wu, Yu-Yee Liow:
A new dynamic ternary sense amplifier for 1.5-bit/cell multi-level low-voltage CMOS DRAMs. ISCAS (1) 1999: 47-50 - [c26]Yu-Chuan Shih, Chung-Yu Wu:
The design of high-performance 128×128 CMOS image sensors using new current-readout techniques. ISCAS (5) 1999: 168-171 - [c25]Wen-Cheng Yen, Chung-Yu Wu:
A new compact neuron-bipolar cellular neural network structure with adjustable neighborhood layers and high integration level. ISCAS (6) 1999: 505-508 - [r1]Chung-Yu Wu:
Embedded Memory. The VLSI Handbook 1999 - 1998
- [j26]Shuo-Yuan Hsiao, Chung-Yu Wu:
A parallel structure for CMOS four-quadrant analog multipliers and its application to a 2-GHz RF downconversion mixer. IEEE J. Solid State Circuits 33(6): 859-869 (1998) - [j25]Chih-Cheng Hsieh, Chung-Yu Wu, Tai-Ping Sun, Far-Wen Jih, Ya-Tung Cherng:
High-performance CMOS buffered gate modulation input (BGMI) readout circuits for IR FPA. IEEE J. Solid State Circuits 33(8): 1188-1198 (1998) - [j24]Yuh-Kuang Tseng, Chung-Yu Wu:
A 1.5-V differential cross-coupled bootstrapped BiCMOS logic for low-voltage applications. IEEE J. Solid State Circuits 33(10): 1576-1579 (1998) - [c24]Chung-Yu Wu, Jeng Gong, Yu Cheng:
The design of 2 V 1 GHz CMOS low-noise bandpass amplifier with good temperature stability and low power dissipation. ICECS 1998: 153-156 - [c23]Ming-Dou Ker, Tung-Yang Chen, Chung-Yu Wu:
CMOS on-chip ESD protection design with substrate-triggering technique. ICECS 1998: 273-276 - [c22]Chung-Yu Wu, Wen-Cheng Yen:
The neuron-bipolar junction transistor (v-BJT)-a new device structure for VLSI neural network implementation. ICECS 1998: 277-280 - 1997
- [j23]Ming-Dou Ker, Hun-Hsien Chang, Chung-Yu Wu:
A gate-coupled PTLSCR/NTLSCR ESD protection circuit for deep-submicron low-voltage CMOS ICs. IEEE J. Solid State Circuits 32(1): 38-51 (1997) - [j22]Chung-Yu Wu, Shuo-Yuan Hsiao:
The design of a 3-V 900-MHz CMOS bandpass amplifier. IEEE J. Solid State Circuits 32(2): 159-168 (1997) - [j21]Chin-Fong Chiu, Chung-Yu Wu:
The design of rotation-invariant pattern recognition using the silicon retina. IEEE J. Solid State Circuits 32(4): 526-534 (1997) - [j20]Chih-Cheng Hsieh, Chung-Yu Wu, Tai-Ping Sun:
A new cryogenic CMOS readout structure for infrared focal plane array. IEEE J. Solid State Circuits 32(8): 1192-1199 (1997) - [j19]Bing J. Sheu, Mohammed Ghanbari, Horng-Dar Lin, Chung-Yu Wu:
Guest Editorial. IEEE Trans. Circuits Syst. Video Technol. 7(4): 571-574 (1997) - [j18]Chih-Cheng Hsieh, Chung-Yu Wu, Far-Wen Jih, Tai-Ping Sun:
Focal-plane-arrays and CMOS readout techniques of infrared imaging systems. IEEE Trans. Circuits Syst. Video Technol. 7(4): 594-605 (1997) - 1996
- [j17]Chung-Yu Wu, Heng-Shou Hsu:
The design of CMOS continuous-time VHF current and voltage-mode lowpass filters with Q-enhancement circuits. IEEE J. Solid State Circuits 31(5): 614-624 (1996) - [j16]Ping-Hsing Lu, Chung-Yu Wu, Ming-Kai Tsai:
Design techniques for VHF/UHF high-Q tunable bandpass filters using simple CMOS inverter-based transresistance amplifiers. IEEE J. Solid State Circuits 31(5): 719-725 (1996) - [j15]Shu-Yuan Chin, Chung-Yu Wu:
A CMOS ratio-independent and gain-insensitive algorithmic analog-to-digital converter. IEEE J. Solid State Circuits 31(8): 1201-1207 (1996) - [j14]Jenn-Chyou Bor, Chung-Yu Wu:
Analog electronic cochlea design using multiplexing switched-capacitor circuits. IEEE Trans. Neural Networks 7(1): 155-166 (1996) - [j13]Chung-Yu Wu, Jeng-Feng Lan:
CMOS current-mode neural associative memory design with on-chip learning. IEEE Trans. Neural Networks 7(1): 167-181 (1996) - [j12]Ming-Dou Ker, Chung-Yu Wu, Tao Cheng, Hun-Hsien Chang:
Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC. IEEE Trans. Very Large Scale Integr. Syst. 4(3): 307-321 (1996) - [c21]Chung-Yu Wu, Heng-Shou Hsu:
A new design technique of CMOS continuous-time VHF current-mode bandpass ladder filters using VHF bandpass biquads. ICECS 1996: 219-222 - [c20]Chung-Yu Wu, Yuh-Kuang Tseng:
Bipolar bootstrapped multi-emitter BiCMOS (B2M-BiCMOS) logic for low-voltage applications. ICECS 1996: 1174-1177 - 1995
- [j11]Tien-Yu Wu, Ching-Tsing Jih, Jueh-Chi Chen, Chung-Yu Wu:
A low glitch 10-bit 75-MHz CMOS video D/A converter. IEEE J. Solid State Circuits 30(1): 68-72 (1995) - [j10]Chung-Yu Wu, Chih-Cheng Chen, Jyh-Jer Cho:
Precise CMOS current sample/hold circuits using differential clock feedthrough attenuation techniques. IEEE J. Solid State Circuits 30(1): 76-80 (1995) - [j9]Chung-Yu Wu, Chih-Cheng Chen, Jyh-Jer Cho:
A CMOS transistor-only 8-b 4.5-Ms/s pipelined analog-to-digital converter using fully-differential current-mode circuit techniques. IEEE J. Solid State Circuits 30(5): 522-532 (1995) - [j8]Chung-Yu Wu, Chin-Fong Chiu:
A new structure of the 2-D silicon retina. IEEE J. Solid State Circuits 30(8): 890-897 (1995) - [j7]Chung-Yu Wu, Ron-Yi Liu:
CMOS current-mode implementation of spatiotemporal probabilistic neural networks for speech recognition. J. VLSI Signal Process. 10(1): 67-84 (1995) - [c19]Jeng-Feng Lan, Chung-Yu Wu:
Analog CMOS current-mode implementation of the feedforward neural network with on-chip learning and storage. ICNN 1995: 645-650 - [c18]Chung-Yu Wu, Jr-Houng Lu, Kuo-Hsing Cheng:
A New CMOS Current-Sensing Complementary Pass-Transistor Logic (CSCPTL) for High-Speed Low-Voltage Applications. ISCAS 1995: 25-28 - [c17]Chung-Yu Wu, Heng-Shou Hsu:
The Design of New Low-Voltage CMOS VHF Continuous-Time Lowpass Biquaud Filters. ISCAS 1995: 295-298 - [c16]Chih-Cheng Chen, Chung-Yu Wu, Jyh-Jer Cho:
A 1.5 V CMOS Current-Mode Cyclic Analog-to-Digital Converter with Digital Error Correction. ISCAS 1995: 537-540 - [c15]Ming-Dou Ker, Chung-Yu Wu, Hun-Hsien Chang, Tao Cheng, Tain-Shun Wu:
Complementary-LVTSCR ESD Protection Scheme for Submicron CMOS IC's. ISCAS 1995: 833-836 - [c14]Chung-Yu Wu, Wei-Shinn Wey, Tsai-Chung Yu:
A 1.5V CMOS Balanced Differential Switched-Capacitor Filter with Internal Clock Boosters. ISCAS 1995: 1025-1028 - [c13]Hong-Yi Huang, Jinn-Shyan Wang, Yuan-Hua Chu, Tain-Shun Wu, Kuo-Hsing Cheng, Chung-Yu Wu:
Low-Voltage Low-Power CMOS True-Single-Phase Clocking Scheme with Locally Asynchronous Logic Circuits. ISCAS 1995: 1572-1575 - [c12]Jeng-Feng Lan, Chung-Yu Wu:
CMOS Current-Mode Outstar Neural Networks with Long-Period Analog Ratio Memory. ISCAS 1995: 1676-1679 - [c11]Chung-Yu Wu, Shuo-Yuan Hsiao, Ron-Yi Liu:
A 3-V 1-GHz Low-Noise Bandpass Amplifier. ISCAS 1995: 1964-1967 - 1994
- [j6]Ping-Hsing Lu, Chung-Yu Wu, Ming-Kai Tsai:
Design techniques for tunable transresistance-C VHF bandpass filters. IEEE J. Solid State Circuits 29(9): 1058-1067 (1994) - [j5]Shu-Yuan Chin, Chung-Yu Wu:
A 10-b 125-MHz CMOS digital-to-analog converter (DAC) with threshold-voltage compensated current sources. IEEE J. Solid State Circuits 29(11): 1374-1380 (1994) - [c10]Hong-Yi Huang, Chung-Yu Wu:
New CMOS Differential Logic Circuits for True-Single-Phase Pipelined Systems. ISCAS 1994: 15-18 - [c9]Yuh-Kuang Tseng, Kuo-Hsing Cheng, Chung-Yu Wu:
Feedback-Controlled Enhance-Pull-Down BiCMOS for Sub-3-V Digital Circuit. ISCAS 1994: 23-26 - [c8]Shu-Yuan Chin, Chung-Yu Wu:
An Alorithmic Analog-to-Digital Converter with low Ratio-and Gain-Sensitivities and 4N-Clock Conversion Cycle. ISCAS 1994: 325-328 - [c7]Liang-Hung Lu, Chung-Yu Wu:
The Design of the CMOS Current-Mode General-Purpose Analog Processor. ISCAS 1994: 549-552 - [c6]Ping-Hsing Lu, Chung-Yu Wu, Ming-Kai Tsai:
VHF/UHF High-Q Bandpass Tunable Filters Design Using CMOS Inverter-Based Transresistnace Amplifiers. ISCAS 1994: 649-652 - [c5]Chung-Yu Wu, Heng-Shou Hsu:
The Continuous-Time VHF Lowpass Filter Design Using Finite-Gain Current and Voltage Amplifiers and Special Q-Enhancement Circuit. ISCAS 1994: 771-774 - 1993
- [c4]Ping-Hsing Lu, Chung-Yu Wu, Ming-Kai Tsai:
VHF Bandpass Filter Design Using CMOS Transresistance Amplifiers. ISCAS 1993: 990-993 - [c3]Shu-Yuan Chin, Chung-Yu Wu:
A Ratio-independent and Gain-insensitive Algorithmic Analog-to-digital Converter. ISCAS 1993: 1200-1203 - [c2]Ying-Hwi Chang, Chung-Yu Wu, Tsai-Chung Yu:
Chopper-stabilized Sigma-delta Modulator. ISCAS 1993: 1286-1289 - [c1]Hong-Yi Huang, Chung-Yu Wu:
Redundant Algebra and Integrated Circuit Implementation of Ternary Logic and Their Applications. ISCAS 1993: 1905-1908 - 1990
- [j4]Chung-Yu Wu, Ming-Chuen Shiau:
Efficient physical timing models for CMOS AND-OR-inverter and OR-AND-inverter gates and their applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(9): 1002-1009 (1990)
1980 – 1989
- 1989
- [j3]Chung-Yu Wu, Tsai-Chung Yu, Shin-Shi Chang:
New monolithic switched-capacitor differentiators with good noise rejection. IEEE J. Solid State Circuits 24(1): 177-180 (1989) - [j2]Jinn-Shyan Wang, Chung-Yu Wu, Ming-Kai Tsai:
CMOS nonthreshold logic (NTL) and cascode nonthreshold logic (CNTL) for high-speed applications. IEEE J. Solid State Circuits 24(3): 779-786 (1989) - 1985
- [j1]Chung-Yu Wu, Jen-Sheng Hwang, Chin Chang, Ching-Chu Chang:
An Efficient Timing Model for CMOS Combinational Logic Gates. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 4(4): 636-650 (1985)
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-12-02 22:30 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
