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2020 – today
- 2023
[j16]Teng-Shen Yang
, Huai-Yuan Hsieh, Liang-Hung Lu:
A 2.4-GHz Ring-VCO-Based Sub-Sampling PLL With a -70-dBc Reference Spur by Adopting a Capacitor-Multiplier-Based Sub-Sampling DLL. IEEE Trans. Circuits Syst. I Regul. Pap. 70(9): 3545-3556 (2023)
2010 – 2019
- 2019
- [j15]Lin-Sen Wang, Po-Chih Ku, Po-Ting Ko, Chi-Jung Chung, Liang-Hung Lu:
A 40.4-dB Range, 0.73-dB Step, and 0.07-dB Error Programmable Gain Amplifier Using Gain Error Shifting Technique. IEEE Trans. Circuits Syst. II Express Briefs 66-II(7): 1109-1113 (2019) - 2018
- [j14]Po-Chih Ku, Kuan-Yu Shih, Liang-Hung Lu:
A High-Voltage DAC-Based Transmitter for Coded Signals in High Frequency Ultrasound Imaging Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(9): 2797-2809 (2018) - [j13]Yu-Kai Tsai, Yi-Keng Hsieh, Hung-Yu Tsai, Huan-Sheng Chen, Liang-Hung Lu:
A Concurrent Dual-Band and Dual-Mode Frequency Synthesizer for Radar Systems. IEEE Trans. Very Large Scale Integr. Syst. 26(5): 945-957 (2018) - 2017
- [j12]Yu-Kai Tsai, Liang-Hung Lu:
A 51.3-MHz 21.8-ppm/°C CMOS Relaxation Oscillator With Temperature Compensation. IEEE Trans. Circuits Syst. II Express Briefs 64-II(5): 490-494 (2017) - [c14]Chih-Kai Chang, Yu-Kai Tsai, Kai-Han Cheng, Liang-Hung Lu:
A 0.3-V 7.6-fJ/conv-step delta-sigma time-to-digital converter with a gated-free ring oscillator. NEWCAS 2017: 221-224 - [c13]Wei-Lun Ou, Yu-Kai Tsai, Po-Yen Tseng, Liang-Hung Lu:
A 2.4-GHz dual-mode resizing power amplifier with a constant conductance output matching. SoCC 2017: 258-261 - 2015
- [j11]Yi-Keng Hsieh, Ya-Ru Wu, Po-Chih Ku, Liang-Hung Lu:
An Analog On-Line Gain Calibration Loop for RF Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(8): 2003-2012 (2015) - [c12]Huan-Sheng Chen, Hung-Yu Tsai, Li-Xuan Chuo, Yu-Kai Tsai, Liang-Hung Lu:
A 5.2-GHz full-integrated RF front-end by T/R switch, LNA, and PA co-design with 3.2-dB NF and +25.9-dBm output power. A-SSCC 2015: 1-4 - 2014
- [c11]Ya-Ru Wu, Yi-Keng Hsieh, Po-Chih Ku, Liang-Hung Lu:
A built-in gain calibration technique for RF low-noise amplifiers. VTS 2014: 1-6 - 2013
- [j10]Po-Shuan Weng, Hao-Yen Tang, Po-Chih Ku, Liang-Hung Lu:
50 mV-Input Batteryless Boost Converter for Thermal Energy Harvesting. IEEE J. Solid State Circuits 48(4): 1031-1041 (2013) - [c10]Yi-Keng Hsieh, Hsieh-Hung Hsieh, Liang-Hung Lu:
A wideband programmable-gain amplifier for 60GHz applications in 65nm CMOS. VLSI-DAT 2013: 1-4 - 2012
- [c9]Hao-Yen Tang, Po-Shuan Weng, Po-Chih Ku, Liang-Hung Lu:
A fully electrical startup batteryless boost converter with 50mV input voltage for thermoelectric energy harvesting. VLSIC 2012: 196-197 - 2011
- [j9]Hsieh-Hung Hsieh, Huan-Sheng Chen, Ping-Hsi Hung, Liang-Hung Lu:
Experimental 5-GHz RF Frontends for Ultra-Low-Voltage and Ultra-Low-Power Operations. IEEE Trans. Very Large Scale Integr. Syst. 19(4): 705-709 (2011) - 2010
- [j8]Yi-Chuan Tarn, Po-Chih Ku, Hsieh-Hung Hsieh, Liang-Hung Lu:
An Amorphous-Silicon Operational Amplifier and Its Application to a 4-Bit Digital-to-Analog Converter. IEEE J. Solid State Circuits 45(5): 1028-1035 (2010) - [j7]Chung-Ting Lu, Hsieh-Hung Hsieh, Liang-Hung Lu:
A Low-Power Quadrature VCO and Its Application to a 0.6-V 2.4-GHz PLL. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(4): 793-802 (2010)
2000 – 2009
- 2009
- [j6]Hsieh-Hung Hsieh, Liang-Hung Lu:
A V-Band CMOS VCO With an Admittance-Transforming Cross-Coupled Pair. IEEE J. Solid State Circuits 44(6): 1689-1696 (2009) - 2007
- [j5]Huei-Yan Huang, Jun-Chau Chien, Liang-Hung Lu:
A 10-Gb/s Inductorless CMOS Limiting Amplifier With Third-Order Interleaving Active Feedback. IEEE J. Solid State Circuits 42(5): 1111-1120 (2007) - [j4]Jun-Chau Chien, Liang-Hung Lu:
Analysis and Design of Wideband Injection-Locked Ring Oscillators With Multiple-Input Injection. IEEE J. Solid State Circuits 42(9): 1906-1915 (2007) - [j3]Jun-Chau Chien, Liang-Hung Lu:
Design of Wide-Tuning-Range Millimeter-Wave CMOS VCO With a Standing-Wave Architecture. IEEE J. Solid State Circuits 42(9): 1942-1952 (2007) - [j2]Jun-Chau Chien, Liang-Hung Lu:
40-Gb/s High-Gain Distributed Amplifiers With Cascaded Gain Stages in 0.18-µm CMOS. IEEE J. Solid State Circuits 42(12): 2715-2725 (2007) - [c8]Hsieh-Hung Hsieh, Yen-Chih Huang, Liang-Hung Lu, Guo-Wei Huang:
A BIST Technique for RF Voltage-Controlled Oscillators. ATS 2007: 143-148 - [c7]Jun-Chau Chien, Liang-Hung Lu:
40Gb/s High-Gain Distributed Amplifiers with Cascaded Gain Stages in 0.18μm CMOS. ISSCC 2007: 538-620 - [c6]Jun-Chau Chien, Liang-Hung Lu:
40GHz Wide-Locking-Range Regenerative Frequency Divider and Low-Phase-Noise Balanced VCO in 0.18μm CMOS. ISSCC 2007: 544-621 - [c5]Yen-Chih Huang, Hsieh-Hung Hsieh, Liang-Hung Lu:
A Low-Noise Amplifier with Integrated Current and Power Sensors for RF BIST Applications. VTS 2007: 401-408 - 2006
- [c4]Hsieh-Hung Hsieh, Liang-Hung Lu:
Integrated CMOS Power Sensors for RF BIST Applications. VTS 2006: 234-239 - 2005
- [c3]Tai-Yuan Chen, Jun-Chau Chien, Liang-Hung Lu:
A 45.6-GHz matrix distributed amplifier in 0.18-nm CMOS. CICC 2005: 119-122 - 2004
- [j1]Jean-Olivier Plouchart, Jonghae Kim, Noah Zamdmer, Liang-Hung Lu, Melanie Sherony, Yue Tan, Robert A. Groves, Robert Trzcinski, Mohamed Talbi, Asit Ray, Lawrence F. Wagner:
A 4-91-GHz traveling-wave amplifier in a standard 0.12-μm SOI CMOS microprocessor technology. IEEE J. Solid State Circuits 39(9): 1455-1461 (2004) - 2003
- [c2]Jean-Olivier Plouchart, Jonghae Kim, Noah Zamdmer, Liang-Hung Lu, Melanie Sherony, Yue Tan, Robert A. Groves, Robert Trzcinski, Mohamed Talbi, Asit Ray, Lawrence F. Wagner:
A 4-91 GHz distributed amplifier in a standard 0.12 μm SOI CMOS microprocessor technology. CICC 2003: 159-162
1990 – 1999
- 1994
- [c1]Liang-Hung Lu, Chung-Yu Wu:
The Design of the CMOS Current-Mode General-Purpose Analog Processor. ISCAS 1994: 549-552
Coauthor Index
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