"The design of high-speed pipelined analog-to-digital converters using ..."

Yu-Yee Liow, Chung-Yu Wu (2002)

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DOI: 10.1109/ISCAS.2002.1010174

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Yu-Yee Liow, Chung-Yu Wu:
The design of high-speed pipelined analog-to-digital converters using voltage-mode sampling and current mode processing techniques. ISCAS (3) 2002: 117-120

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