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Michal Tadeusiewicz
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2020 – today
- 2023
- [j23]Michal Tadeusiewicz, Stanislaw Halgas:
Integer Algorithm: A Useful Tool for Fault Diagnosis of Analog Circuits. Circuits Syst. Signal Process. 42(9): 5121-5141 (2023) - 2022
- [j22]Michal Tadeusiewicz, Stanislaw Halgas:
A Method for Parametric and Catastrophic Fault Diagnosis of Analog Linear Circuits. IEEE Access 10: 27002-27013 (2022) - 2020
- [j21]Michal Tadeusiewicz, Stanislaw Halgas:
Soft fault diagnosis of non-linear circuits having multiple DC solutions. IET Circuits Devices Syst. 14(8): 1220-1227 (2020) - [j20]Michal Tadeusiewicz, Marek Ossowski:
Modeling Analysis and Diagnosis of Analog Circuits in z-Domain. J. Circuits Syst. Comput. 29(2): 2050028:1-2050028:19 (2020)
2010 – 2019
- 2018
- [j19]Michal Tadeusiewicz, Stanislaw Halgas:
A Method for Local Parametric Fault Diagnosis of a Broad Class of Analog Integrated Circuits. IEEE Trans. Instrum. Meas. 67(2): 328-337 (2018) - 2017
- [j18]Michal Tadeusiewicz, Stanislaw Halgas:
A Systematic Method for Arranging Diagnostic Tests in Linear Analog DC and AC Circuits. J. Electron. Test. 33(2): 147-156 (2017) - [j17]Michal Tadeusiewicz, Stanislaw Halgas:
Diagnosis of a soft short and local variations of parameters occurring simultaneously in analog CMOS circuits. Microelectron. Reliab. 72: 90-97 (2017) - 2016
- [c13]Stanislaw Halgas, Michal Tadeusiewicz:
Improvement of the search method for parametric fault diagnosis of analog integrated circuits. MIXDES 2016: 359-362 - 2015
- [j16]Michal Tadeusiewicz, Andrzej Kuczynski, Stanislaw Halgas:
Catastrophic Fault Diagnosis of a Certain Class of Nonlinear Analog Circuits. Circuits Syst. Signal Process. 34(2): 353-375 (2015) - [j15]Michal Tadeusiewicz, Andrzej Kuczynski, Stanislaw Halgas:
Spot Defect Diagnosis in Analog Nonlinear Circuits with Possible Multiple Operating Points. J. Electron. Test. 31(5-6): 491-502 (2015) - [j14]Michal Tadeusiewicz, Stanislaw Halgas:
A New Approach to Multiple Soft Fault Diagnosis of Analog BJT and CMOS Circuits. IEEE Trans. Instrum. Meas. 64(10): 2688-2695 (2015) - 2014
- [j13]Michal Tadeusiewicz, Stanislaw Halgas:
Global and local parametric diagnosis of analog short-channel CMOS circuits using homotopy-simplicial algorithm. Int. J. Circuit Theory Appl. 42(10): 1051-1068 (2014) - 2013
- [j12]Michal Tadeusiewicz, Andrzej Kuczynski:
A Very Fast Method for the DC Analysis of Diode-Transistor Circuits. Circuits Syst. Signal Process. 32(2): 433-451 (2013) - [j11]Michal Tadeusiewicz, Stanislaw Halgas:
A Method for Finding Multiple DC Operating Points of Short Channel CMOS Circuits. Circuits Syst. Signal Process. 32(5): 2457-2468 (2013) - 2012
- [j10]Michal Tadeusiewicz, Stanislaw Halgas:
A Contraction Method for Locating All the DC Solutions of Circuits Containing Bipolar Transistors. Circuits Syst. Signal Process. 31(3): 1159-1166 (2012) - [j9]Michal Tadeusiewicz, Stanislaw Halgas:
Multiple Soft Fault Diagnosis of Nonlinear Circuits Using the Continuation Method. J. Electron. Test. 28(4): 487-493 (2012) - [j8]Michal Tadeusiewicz, Stanislaw Halgas, Marek Korzybski:
Multiple catastrophic fault diagnosis of analog circuits considering the component tolerances. Int. J. Circuit Theory Appl. 40(10): 1041-1052 (2012) - 2010
- [j7]Michal Tadeusiewicz, Stanislaw Halgas:
A method for fast simulation of multiple catastrophic faults in analogue circuits. Int. J. Circuit Theory Appl. 38(3): 275-290 (2010)
2000 – 2009
- 2009
- [c12]Michal Tadeusiewicz, Stanislaw Halgas:
Improved algorithm for computing all the DC operating points of diode-transistor circuits. ECCTD 2009: 489-492 - [c11]Michal Tadeusiewicz, Stanislaw Halgas:
Multiple catastrophic fault diagnosis of linear circuits considering the component tolerances. ECCTD 2009: 647-650 - 2008
- [c10]Michal Tadeusiewicz, Stanislaw Halgas:
Tracing some temperature characteristics in diode-transistor circuits having multiple DC solutions. ICECS 2008: 247-250 - [c9]Michal Tadeusiewicz, Stanislaw Halgas:
An efficient method for simulation of multiple catastrophic faults. ICECS 2008: 356-359 - 2007
- [c8]Michal Tadeusiewicz, Piotr Sidyk, Stanislaw Halgas:
A method for multiple fault diagnosis in dynamic analogue circuits. ECCTD 2007: 834-837 - [c7]Michal Tadeusiewicz, Stanislaw Halgas:
Finding all the DC solutions of transistor circuits with the thermal constraint. ECCTD 2007: 982-985 - 2006
- [j6]Michal Tadeusiewicz, Stanislaw Halgas:
An algorithm for multiple fault diagnosis in analogue circuits. Int. J. Circuit Theory Appl. 34(6): 607-615 (2006) - 2005
- [c6]Michal Tadeusiewicz, Stanislaw Halgas:
Analysis of diode-transistor circuits having multiple DC solutions. ECCTD 2005: 39-42 - [c5]Michal Tadeusiewicz, Stanislaw Halgas:
Multiple fault diagnosis in analogue circuits. ECCTD 2005: 205-208 - 2004
- [j5]Michal Tadeusiewicz, Stanislaw Halgas:
Computing multivalued input-output Characteristics in the circuits containing bipolar transistors. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(9): 1859-1867 (2004) - 2002
- [c4]Michal Tadeusiewicz, Stanislaw Halgas:
Determining multi-valued input-output characteristics in the circuits containing bipolar transistors. ICECS 2002: 987-990 - 2000
- [j4]Michal Tadeusiewicz, Marek Korzybski:
A method for fault diagnosis in linear electronic circuits. Int. J. Circuit Theory Appl. 28(3): 245-262 (2000) - [c3]Michal Tadeusiewicz, Stanislaw Halgas:
An algorithm for finding all the DC solutions of short-channel MOS transistor circuits. ICECS 2000: 924-927 - [c2]Michal Tadeusiewicz:
Proving asymptotic stability of equilibrium points of MOS transistor circuits. ISCAS 2000: 204-207
1990 – 1999
- 1998
- [j3]Michal Tadeusiewicz, M. Jagocki, Stanislaw Halgas:
Improvement of the sign test for finding all the DC solutions of piecewise-linear circuits. Int. J. Circuit Theory Appl. 26(5): 531-538 (1998) - [c1]Michal Tadeusiewicz:
Modeling and stability in MOS transistor circuits. ICECS 1998: 71-74 - 1994
- [j2]Michal Tadeusiewicz, Krzysztof Glowienka:
A Contraction Algorithm for Finding All the DC solutions of piecewise-Linear Circuits. J. Circuits Syst. Comput. 4(3): 319-336 (1994) - 1990
- [j1]Michal Tadeusiewicz:
A method for finding bounds on the location of all the solutions of dc piecewise-linear circuits. Int. J. Circuit Theory Appl. 18(2): 165-174 (1990)
Coauthor Index
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