• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 39 matches

• 2000
• 
  Virgil Andronache, Edwin Hsing-Mean Sha, Nelson L. Passos:
  Design and analysis of efficient application-specific on-line page replacement techniques. ACM Great Lakes Symposium on VLSI 2000: 123-128
• 
  Kia Bazargan, Abhishek Ranjan, Majid Sarrafzadeh:
  Fast and accurate estimation of floorplans in logic/high-level synthesis. ACM Great Lakes Symposium on VLSI 2000: 95-100
• 
  Craig Beebe, Jo Dale Carothers, Alfonso Ortega:
  MCM placement using a realistic thermal model. ACM Great Lakes Symposium on VLSI 2000: 189-192
• 
  Luca Benini, Alessandro Bogliolo, Enrico Macii, Massimo Poncino, Mihai Surmei:
  Regression-based RTL power models for controllers. ACM Great Lakes Symposium on VLSI 2000: 147-152
• 
  Luca Benini, Marco Ferrero, Alberto Macii, Enrico Macii, Massimo Poncino:
  Supporting system-level power exploration for DSP applications. ACM Great Lakes Symposium on VLSI 2000: 17-22
• 
  Azeez J. Bhavnagarwala, Blanca Austin, Ashok Kapoor, James D. Meindl:
  CMOS system-on-a-chip voltage scaling beyond 50nm. ACM Great Lakes Symposium on VLSI 2000: 7-12
• 
  Benjamin Bishop, Thomas P. Kelliher, Mary Jane Irwin:
  SPARTA: Simulation of Physics on a Real-Time Architecture. ACM Great Lakes Symposium on VLSI 2000: 177-182
• 
  David T. Blaauw, Kaushik Gala, Vladimir Zolotov, Rajendran Panda, Junfeng Wang:
  On-chip inductance modeling. ACM Great Lakes Symposium on VLSI 2000: 75-80
• 
  Sudhakar Bobba, Ibrahim N. Hajj:
  High-performance bidirectional repeaters. ACM Great Lakes Symposium on VLSI 2000: 53-58
• 
  Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Xiaobo Hu:
  Efficient algorithms for acceptable design exploration. ACM Great Lakes Symposium on VLSI 2000: 139-142
• 
  Tom W. Chen, Alkan Cengiz:
  Measuring routing congestion for multi-layer global routing. ACM Great Lakes Symposium on VLSI 2000: 59-62
• 
  Hung-Jung Chen, Bradley S. Carlson:
  Power estimation for a submicron CMOS inverter driving a CRC interconnect load. ACM Great Lakes Symposium on VLSI 2000: 162-166
• 
  Ki-Seok Chung, Taewhan Kim, Chien-Liang Liu:
  Behavioral-level partitioning for low power design in control-dominated application. ACM Great Lakes Symposium on VLSI 2000: 156-161
• 
  Gary L. Dare, Charles A. Zukowski:
  Accuracy management for mixed-mode digital VLSI simulation. ACM Great Lakes Symposium on VLSI 2000: 167-170
• 
  Vivek De, Shekhar Borkar:
  Low power and high performance design challenges in future technologies. ACM Great Lakes Symposium on VLSI 2000: 1-6
• 
  José G. Delgado-Frias, Jabulani Nyathi, Laxmi N. Bhuyan:
  A wave-pipelined router architecture using ternary associative memory. ACM Great Lakes Symposium on VLSI 2000: 67-70
• 
  George Gristede, Wei Hwang:
  A comparison of dual-rail pass transistor logic families in 1.5V, 0.18µm CMOS technology for low power applications. ACM Great Lakes Symposium on VLSI 2000: 101-106
• 
  Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee:
  Parallel algorithms for FPGA placement. ACM Great Lakes Symposium on VLSI 2000: 86-94
• 
  Bill Halpin, C. Y. Roger Chen, Naresh Sehgal:
  A sensitivity based placer for standard cells. ACM Great Lakes Symposium on VLSI 2000: 193-196
• 
  Jeyran Hezavei, Narayanan Vijaykrishnan, Mary Jane Irwin:
  A comparative study of power efficient SRAM designs. ACM Great Lakes Symposium on VLSI 2000: 117-122
• 
  A. E. Hussein, Mohamed I. Elmasry:
  Low power high speed analog-to-digital converter for wireless communications. ACM Great Lakes Symposium on VLSI 2000: 113-116
• 
  Bo-Sung Kim, Jun Dong Cho:
  Maximizing memory data reuse for lower power motion estimation. ACM Great Lakes Symposium on VLSI 2000: 133-138
• 
  Cheng-Kok Koh, Patrick H. Madden:
  Manhattan or non-Manhattan?: a study of alternative VLSI routing architectures. ACM Great Lakes Symposium on VLSI 2000: 47-52
• 
  Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal:
  A novel technique for sea of gates global routing. ACM Great Lakes Symposium on VLSI 2000: 71-74
• 
  Qiao Li, Sung-Mo Kang:
  Technology independent arbitrary device extractor. ACM Great Lakes Symposium on VLSI 2000: 143-146
• 
  Qiao Li, Sung-Mo Kang:
  Efficient algorithms for polygon to trapezoid decomposition and trapezoid corner stitching. ACM Great Lakes Symposium on VLSI 2000: 183-188
• 
  Christoph Meinel, Christian Stangier:
  Speeding up symbolic model checking by accelerating dynamic variable reordering. ACM Great Lakes Symposium on VLSI 2000: 39-42
• 
  Salvador Mir, Benoît Charlot, Gabriela Nicolescu, Philippe Coste, Fabien Parrain, Nacer-Eddine Zergainoh, Bernard Courtois, Ahmed Amine Jerraya, Márta Rencz:
  Towards design and validation of mixed-technology SOCs. ACM Great Lakes Symposium on VLSI 2000: 29-33
• 
  Helvio P. Peixoto, Margarida F. Jacome:
  A new technique for estimating lower bounds on latency for high level synthesis. ACM Great Lakes Symposium on VLSI 2000: 129-132
• 
  V. K. Pisini, Sofiène Tahar, Paul Curzon, Otmane Aït Mohamed, Xiaoyu Song:
  Formal hardware verification by integrating HOL and MDG. ACM Great Lakes Symposium on VLSI 2000: 23-28

skipping 9 more matches