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@inproceedings{DBLP:conf/glvlsi/AndronacheSP00,
author = {Virgil Andronache and
Edwin Hsing{-}Mean Sha and
Nelson L. Passos},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Design and analysis of efficient application-specific on-line page
replacement techniques},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {123--128},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331019},
doi = {10.1145/330855.331019},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AndronacheSP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BazarganRS00,
author = {Kia Bazargan and
Abhishek Ranjan and
Majid Sarrafzadeh},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Fast and accurate estimation of floorplans in logic/high-level synthesis},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {95--100},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330990},
doi = {10.1145/330855.330990},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BazarganRS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BeebeCO00,
author = {Craig Beebe and
Jo Dale Carothers and
Alfonso Ortega},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {{MCM} placement using a realistic thermal model},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {189--192},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331039},
doi = {10.1145/330855.331039},
timestamp = {Thu, 11 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BeebeCO00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BeniniBMPS00,
author = {Luca Benini and
Alessandro Bogliolo and
Enrico Macii and
Massimo Poncino and
Mihai Surmei},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Regression-based {RTL} power models for controllers},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {147--152},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331025},
doi = {10.1145/330855.331025},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BeniniBMPS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BeniniFMMP00,
author = {Luca Benini and
Marco Ferrero and
Alberto Macii and
Enrico Macii and
Massimo Poncino},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Supporting system-level power exploration for {DSP} applications},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {17--22},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330945},
doi = {10.1145/330855.330945},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BeniniFMMP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BhavnagarwalaAKM00,
author = {Azeez J. Bhavnagarwala and
Blanca Austin and
Ashok Kapoor and
James D. Meindl},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {{CMOS} system-on-a-chip voltage scaling beyond 50nm},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {7--12},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.332574},
doi = {10.1145/330855.332574},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BhavnagarwalaAKM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BishopKI00,
author = {Benjamin Bishop and
Thomas P. Kelliher and
Mary Jane Irwin},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {{SPARTA:} Simulation of Physics on a Real-Time Architecture},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {177--182},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331037},
doi = {10.1145/330855.331037},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BishopKI00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BlaauwGZPW00,
author = {David T. Blaauw and
Kaushik Gala and
Vladimir Zolotov and
Rajendran Panda and
Junfeng Wang},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {On-chip inductance modeling},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {75--80},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330980},
doi = {10.1145/330855.330980},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BlaauwGZPW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BobbaH00,
author = {Sudhakar Bobba and
Ibrahim N. Hajj},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {High-performance bidirectional repeaters},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {53--58},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330964},
doi = {10.1145/330855.330964},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BobbaH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChantrapornchaiSH00,
author = {Chantana Chantrapornchai and
Edwin Hsing{-}Mean Sha and
Xiaobo Hu},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Efficient algorithms for acceptable design exploration},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {139--142},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331022},
doi = {10.1145/330855.331022},
timestamp = {Tue, 13 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChantrapornchaiSH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenC00,
author = {Tom W. Chen and
Alkan Cengiz},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Measuring routing congestion for multi-layer global routing},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {59--62},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330968},
doi = {10.1145/330855.330968},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenC00a,
author = {Hung{-}Jung Chen and
Bradley S. Carlson},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Power estimation for a submicron {CMOS} inverter driving a {CRC} interconnect
load},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {162--166},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331030},
doi = {10.1145/330855.331030},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenC00a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChungKL00,
author = {Ki{-}Seok Chung and
Taewhan Kim and
Chien{-}Liang Liu},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Behavioral-level partitioning for low power design in control-dominated
application},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {156--161},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331028},
doi = {10.1145/330855.331028},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChungKL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DareZ00,
author = {Gary L. Dare and
Charles A. Zukowski},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Accuracy management for mixed-mode digital {VLSI} simulation},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {167--170},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331033},
doi = {10.1145/330855.331033},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DareZ00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DeB00,
author = {Vivek De and
Shekhar Borkar},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Low power and high performance design challenges in future technologies},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {1--6},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330929},
doi = {10.1145/330855.330929},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DeB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Delgado-FriasNB00,
author = {Jos{\'{e}} G. Delgado{-}Frias and
Jabulani Nyathi and
Laxmi N. Bhuyan},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {A wave-pipelined router architecture using ternary associative memory},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {67--70},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330971},
doi = {10.1145/330855.330971},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Delgado-FriasNB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GristedeH00,
author = {George Gristede and
Wei Hwang},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {A comparison of dual-rail pass transistor logic families in 1.5V,
0.18{\(\mathrm{\mu}\)}m {CMOS} technology for low power applications},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {101--106},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331012},
doi = {10.1145/330855.331012},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/GristedeH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HaldarNCB00,
author = {Malay Haldar and
Anshuman Nayak and
Alok N. Choudhary and
Prithviraj Banerjee},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Parallel algorithms for {FPGA} placement},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {86--94},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330988},
doi = {10.1145/330855.330988},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HaldarNCB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HalpinCS00,
author = {Bill Halpin and
C. Y. Roger Chen and
Naresh Sehgal},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {A sensitivity based placer for standard cells},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {193--196},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331040},
doi = {10.1145/330855.331040},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HalpinCS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HezaveiVI00,
author = {Jeyran Hezavei and
Narayanan Vijaykrishnan and
Mary Jane Irwin},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {A comparative study of power efficient {SRAM} designs},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {117--122},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331018},
doi = {10.1145/330855.331018},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HezaveiVI00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HusseinE00,
author = {A. E. Hussein and
Mohamed I. Elmasry},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Low power high speed analog-to-digital converter for wireless communications},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {113--116},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331016},
doi = {10.1145/330855.331016},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HusseinE00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KimC00,
author = {Bo{-}Sung Kim and
Jun Dong Cho},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Maximizing memory data reuse for lower power motion estimation},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {133--138},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331021},
doi = {10.1145/330855.331021},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KimC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KohM00,
author = {Cheng{-}Kok Koh and
Patrick H. Madden},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Manhattan or non-Manhattan?: a study of alternative {VLSI} routing
architectures},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {47--52},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330961},
doi = {10.1145/330855.330961},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KohM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KrishnaCS00,
author = {Bharat Krishna and
C. Y. Roger Chen and
Naresh Sehgal},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {A novel technique for sea of gates global routing},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {71--74},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330976},
doi = {10.1145/330855.330976},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KrishnaCS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiK00,
author = {Qiao Li and
Sung{-}Mo Kang},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Technology independent arbitrary device extractor},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {143--146},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331023},
doi = {10.1145/330855.331023},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiK00a,
author = {Qiao Li and
Sung{-}Mo Kang},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Efficient algorithms for polygon to trapezoid decomposition and trapezoid
corner stitching},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {183--188},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331038},
doi = {10.1145/330855.331038},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiK00a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MeinelS00,
author = {Christoph Meinel and
Christian Stangier},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Speeding up symbolic model checking by accelerating dynamic variable
reordering},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {39--42},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330954},
doi = {10.1145/330855.330954},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MeinelS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MirCNCPZCJR00,
author = {Salvador Mir and
Beno{\^{\i}}t Charlot and
Gabriela Nicolescu and
Philippe Coste and
Fabien Parrain and
Nacer{-}Eddine Zergainoh and
Bernard Courtois and
Ahmed Amine Jerraya and
M{\'{a}}rta Rencz},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Towards design and validation of mixed-technology SOCs},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {29--33},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330950},
doi = {10.1145/330855.330950},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MirCNCPZCJR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PeixotoJ00,
author = {Helvio P. Peixoto and
Margarida F. Jacome},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {A new technique for estimating lower bounds on latency for high level
synthesis},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {129--132},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331020},
doi = {10.1145/330855.331020},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PeixotoJ00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PisiniTCMS00,
author = {V. K. Pisini and
Sofi{\`{e}}ne Tahar and
Paul Curzon and
Otmane A{\"{\i}}t Mohamed and
Xiaoyu Song},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Formal hardware verification by integrating {HOL} and {MDG}},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {23--28},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330947},
doi = {10.1145/330855.330947},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PisiniTCMS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SahooKP00,
author = {Bibhudatta Sahoo and
Martin Kuhlmann and
Keshab K. Parhi},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {A low-power correlator},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {153--155},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331026},
doi = {10.1145/330855.331026},
timestamp = {Thu, 22 Aug 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SahooKP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SecareanuF00,
author = {Radu M. Secareanu and
Eby G. Friedman},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Transparent repeaters},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {63--66},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.332576},
doi = {10.1145/330855.332576},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SecareanuF00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SoelemanR00,
author = {Hendrawan Soeleman and
Kaushik Roy},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Digital {CMOS} logic operation in the sub-threshold region},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {107--112},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331014},
doi = {10.1145/330855.331014},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SoelemanR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SundararajanP00,
author = {Vijay Sundararajan and
Keshab K. Parhi},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Reducing bus transition activity by limited weight coding with codeword
slimming},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {13--16},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330933},
doi = {10.1145/330855.330933},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SundararajanP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TangF00,
author = {Kevin T. Tang and
Eby G. Friedman},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Noise estimation due to signal activity for capacitively coupled {CMOS}
logic gates},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {171--176},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.331035},
doi = {10.1145/330855.331035},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/TangF00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/VenkatramanP00,
author = {R. Venkatraman and
Lalit M. Patnaik},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {An evolutionary approach to timing driven {FPGA} placement},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {81--85},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330986},
doi = {10.1145/330855.330986},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/VenkatramanP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WefelM00,
author = {Sandro Wefel and
Paul Molitor},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Prove that a faulty multiplier is faulty!?},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {43--46},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.330957},
doi = {10.1145/330855.330957},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WefelM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WhiteWCD00,
author = {Jennifer L. White and
Anthony S. Wojcik and
Moon{-}Jung Chung and
Travis E. Doom},
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Candidate subcircuits for functional module identification in logic
circuits},
booktitle = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
pages = {34--38},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855.332575},
doi = {10.1145/330855.332575},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WhiteWCD00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2000,
editor = {Majid Sarrafzadeh and
Prithviraj Banerjee and
Kaushik Roy},
title = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
Chicago, Illinois, USA, March 2-4, 2000},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/330855},
doi = {10.1145/330855},
isbn = {1-58113-251-4},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/2000.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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