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Publication search results
found 12 matches
- 2008
- Liangwei Ge, Song Chen, Yuichi Nakamura, Takeshi Yoshimura:
A Synthesis Method of General Floating-Point Arithmetic Units by Aligned Partition. IPSJ Trans. Syst. LSI Des. Methodol. 1: 67-77 (2008) - Seiji Kajihara, Shohei Morishima, Masahiro Yamamoto, Xiaoqing Wen, Masayasu Fukunaga, Kazumi Hatayama, Takashi Aikyo:
Estimation of Delay Test Quality and Its Application to Test Generation. IPSJ Trans. Syst. LSI Des. Methodol. 1: 104-115 (2008) - Kentaroh Katoh, Kazuteru Namba, Hideo Ito:
Two-Stage Stuck-at Fault Test Data Compression Using Scan Flip-Flops with Delay Fault Testability. IPSJ Trans. Syst. LSI Des. Methodol. 1: 91-103 (2008) - Hiroshi Nakashima, Masahiro Konishi, Takashi Nakada:
A Simulation-Based Analysis for Worst Case Delay of Single and Multiple Interruptions. IPSJ Trans. Syst. LSI Des. Methodol. 1: 33-47 (2008) - Akira Ohchi, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki:
Floorplan-Driven High-Level Synthesis for Distributed/Shared-Register Architectures. IPSJ Trans. Syst. LSI Des. Methodol. 1: 78-90 (2008) - Hidetoshi Onodera:
Welcome to TSLDM - A New Open-Access Online Journal from IPSJ. IPSJ Trans. Syst. LSI Des. Methodol. 1: 1 (2008) - Sudeep Pasricha, Nikil D. Dutt:
Trends in Emerging On-Chip Interconnect Technologies. IPSJ Trans. Syst. LSI Des. Methodol. 1: 2-17 (2008) - Sachin S. Sapatnekar:
Variability and Statistical Design. IPSJ Trans. Syst. LSI Des. Methodol. 1: 18-32 (2008) - Seiya Shibata, Shinya Honda, Yuko Hara, Hiroyuki Tomiyama, Hiroaki Takada:
Embedded System Covalidation with RTOS Model and FPGA. IPSJ Trans. Syst. LSI Des. Methodol. 1: 126-130 (2008) - Katsunori Tanaka, Yuichi Nakamura, Atsushi Atarashi:
A Study of Multi-core Processor Design with Asynchronous Interconnect Using Synchronous Design Tools. IPSJ Trans. Syst. LSI Des. Methodol. 1: 58-66 (2008) - Haruhiko Terada, Takayuki Fukuoka, Akira Tsuchiya, Hidetoshi Onodera:
Accurate Estimation of the Worst-case Delay in Statistical Static Timing Analysis. IPSJ Trans. Syst. LSI Des. Methodol. 1: 116-125 (2008) - Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada:
Dynamic Power Management for Embedded System Idle State in the Presence of Periodic Interrupt Services. IPSJ Trans. Syst. LSI Des. Methodol. 1: 48-57 (2008)
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