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2020 – today
- 2024
[c7]Yoshikazu Watanabe, Seiya Shibata, Takashi Takenaka:
PREDEA: Predicted-RoI based Resource-Efficient Object Detection with Aggregation. SMARTCOMP 2024: 141-149- 2022
- [c6]Youki Sada, Seiya Shibata, Yuki Kobayashi, Takashi Takenaka:
RegionDrop: Fast Human Pose Estimation Using Annotation-Aware Spatial Sparsity. ICANN (4) 2022: 756-768
2010 – 2019
- 2019
- [j7]Salita Sombatsiri, Seiya Shibata, Yuki Kobayashi, Hiroaki Inoue, Takashi Takenaka, Takeo Hosomi, Jaehoon Yu
, Yoshinori Takeuchi:
Parallelism-flexible Convolution Core for Sparse Convolutional Neural Networks on FPGA. IPSJ Trans. Syst. LSI Des. Methodol. 12: 22-37 (2019) - [c5]Liang Feng, Hiroaki Igarashi, Seiya Shibata, Yuki Kobayashi, Takashi Takenaka, Wei Zhang:
Real-Time Detection and Tracking Using Hybrid DNNs and Space-Aware Color Feature: From Algorithm to System. ACPR (1) 2019: 61-75 - 2014
- [c4]Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
Fast Design-Space Exploration Method for SW/HW Codesign on FPGAs. FCCM 2014: 235 - 2013
- [c3]Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
Automated Identification of Performance Bottleneck on Embedded Systems for Design Space Exploration. IESS 2013: 171-180 - 2012
- [j6]Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
A Fast Performance Estimation Framework for System-Level Design Space Exploration. IPSJ Trans. Syst. LSI Des. Methodol. 5: 44-54 (2012) - 2011
- [c2]Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
Fast design space exploration for mixed hardware-software embedded systems. ISOCC 2011: 92-95 - 2010
- [j5]Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(12): 2509-2516 (2010) - [j4]Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
Efficient Design Space Exploration at System Level with Automatic Profiler Instrumentation. Inf. Media Technol. 5(4): 1082-1096 (2010) - [j3]Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
Efficient Design Space Exploration at System Level with Automatic Profiler Instrumentation. IPSJ Trans. Syst. LSI Des. Methodol. 3: 179-193 (2010) - [c1]Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
Automatic communication synthesis with hardware sharing for design space exploration. ISCAS 2010: 1863-1866
2000 – 2009
- 2008
- [j2]Seiya Shibata, Shinya Honda, Yuko Hara, Hiroyuki Tomiyama, Hiroaki Takada:
Embedded System Covalidation with RTOS Model and FPGA. Inf. Media Technol. 3(4): 739-743 (2008) - [j1]Seiya Shibata, Shinya Honda, Yuko Hara, Hiroyuki Tomiyama, Hiroaki Takada:
Embedded System Covalidation with RTOS Model and FPGA. IPSJ Trans. Syst. LSI Des. Methodol. 1: 126-130 (2008)
Coauthor Index
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