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ORCIDIPSJ Transactions on System LSI Design Methodology, Volume 12
Volume 12, 2019
- Nozomu Togawa:
Message from the Editor-in-Chief. 1 - A. K. M. Mahfuzul Islam
, Hidetoshi Onodera:
Circuit Techniques for Device-Circuit Interaction toward Minimum Energy Operation. 2-12 - Kenshu Seto:
Scalar Replacement with Circular Buffers. 13-21 - Salita Sombatsiri, Seiya Shibata, Yuki Kobayashi, Hiroaki Inoue, Takashi Takenaka, Takeo Hosomi, Jaehoon Yu, Yoshinori Takeuchi:
Parallelism-flexible Convolution Core for Sparse Convolutional Neural Networks on FPGA. 22-37 - Koichi Fujiwara, Kazushi Kawamura, Masao Yanagisawa, Nozomu Togawa:
An FPGA Implementation Method based on Distributed-register Architectures. 38-41 - Seiya Shirakuni, Ittetsu Taniguchi, Hiroyuki Tomiyama:
Design and Evaluation of Asymmetric and Symmetric 32-core Architectures on FPGA. 42-45 - Takafumi Miyazaki, Shunsuke Takai, Ittetsu Taniguchi, Hiroyuki Tomiyama:
An OpenCL-based Software Framework for a Heterogeneous Multicore Architecture on Zynq-7000 SoC. 46-49 - Hiroki Koyasu, Yasuhiro Takahashi:
Current Pass Optimized Symmetric Pass Gate Adiabatic Logic for Cryptographic Circuits. 50-52 - Chaofei Yang, Ximing Qiao, Yiran Chen:
Neuromorphic Computing Systems: From CMOS To Emerging Nonvolatile Memory. 53-64 - Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama:
Communication-Aware Scheduling of Data-Parallel Tasks on Multicore Architectures. 65-73 - Yang Liu, Lin Meng, Hiroyuki Tomiyama:
A Genetic Algorithm for Scheduling of Data-parallel Tasks on Multicore Architectures. 74-77 - Nobutaka Kito, Kazuyoshi Takagi, Naofumi Takagi:
Conversion of Logic Gates in Netlists for Rapid Single Flux Quantum Circuits Utilizing Confluence of Pulses. 78-80
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