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Seiya Shirakuni

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2010 – 2019

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2019
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Seiya Shirakuni, Ittetsu Taniguchi, Hiroyuki Tomiyama:
Design and Evaluation of Asymmetric and Symmetric 32-core Architectures on FPGA. IPSJ Trans. Syst. LSI Des. Methodol. 12: 42-45 (2019)
2018
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Seiya Shirakuni, Ittetsu Taniguchi, Hiroyuki Tomiyama:
A Case Study on Memory Architecture Exploration for Manycores on an FPGA. CANDAR Workshops 2018: 132-137

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