- 2000
- Shail Aditya, Scott A. Mahlke, B. Ramakrishna Rau:
Code size minimization and retargetable assembly for custom EPIC and VLIW instruction formats. ACM Trans. Design Autom. Electr. Syst. 5(4): 752-773 (2000) - R. Iris Bahar, Ernest T. Lampe, Enrico Macii:
Power optimization of technology-dependent circuits based on symbolic computation of logic implications. ACM Trans. Design Autom. Electr. Syst. 5(3): 267-293 (2000) - M. Balakrishnan, Heman Khanna:
Allocation of FIFO structures in RTL data paths. ACM Trans. Design Autom. Electr. Syst. 5(3): 294-310 (2000) - Luca Benini, Giovanni De Micheli:
System-level power optimization: techniques and tools. ACM Trans. Design Autom. Electr. Syst. 5(2): 115-192 (2000) - Luca Benini, Giovanni De Micheli:
Synthesis of low-power selectively-clocked systems from high-level specification. ACM Trans. Design Autom. Electr. Syst. 5(3): 311-321 (2000) - Stephen A. Blythe, Robert A. Walker:
Efficient optimal design space characterization methodologies. ACM Trans. Design Autom. Electr. Syst. 5(3): 322-336 (2000) - Alessandro Bogliolo, Luca Benini, Giovanni De Micheli:
Regression-based RTL power modeling. ACM Trans. Design Autom. Electr. Syst. 5(3): 337-372 (2000) - Surendra Bommu, Niall O'Neill, Maciej J. Ciesielski:
Retiming-based factorization for sequential logic optimization. ACM Trans. Design Autom. Electr. Syst. 5(3): 373-398 (2000) - Vincenza Carchiolo, Michele Malgeri, Giuseppe Mangioni:
Hardware/software synthesis of formal specifications in codesign of embedded systems. ACM Trans. Design Autom. Electr. Syst. 5(3): 399-432 (2000) - Yao-Wen Chang, Kai Zhu, D. F. Wong:
Timing-driven routing for symmetrical array-based FPGAs. ACM Trans. Design Autom. Electr. Syst. 5(3): 433-450 (2000) - Jason Cong, Yean-Yow Hwang:
Structural gate decomposition for depth-optimal technology mapping in LUT-based FPGA designs. ACM Trans. Design Autom. Electr. Syst. 5(2): 193-225 (2000) - Koen van Eijk, Bart Mesman, Carlos A. Alba Pinto, Qin Zhao, Marco Bekooij, Jef L. van Meerbergen, Jochen A. G. Jess:
Constraint analysis for code generation: basic techniques and applications in FACTS. ACM Trans. Design Autom. Electr. Syst. 5(4): 774-793 (2000) - Wen-Jong Fang, Allen C.-H. Wu:
Multiway FPGA partitioning by fully exploiting design hierarchy. ACM Trans. Design Autom. Electr. Syst. 5(1): 34-50 (2000) - Donald S. Gelosh, Dorothy E. Setliff:
Modeling layout tools to derive forward estimates of area and delay at the RTL level. ACM Trans. Design Autom. Electr. Syst. 5(3): 451-491 (2000) - Guy Gogniat, Michel Auguin, Luc Bianco, Alain Pegatoquet:
A codesign back-end approach for embedded system design. ACM Trans. Design Autom. Electr. Syst. 5(3): 492-509 (2000) - Avaneendra Gupta, John P. Hayes:
CLIP: integer-programming-based optimal layout synthesis of 2D CMOS cells. ACM Trans. Design Autom. Electr. Syst. 5(3): 510-547 (2000) - Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel:
Dynamic state traversal for sequential circuit test generation. ACM Trans. Design Autom. Electr. Syst. 5(3): 548-565 (2000) - Pao-Ann Hsiung:
CMAPS: a cosynthesis methodology for application-oriented parallel systems. ACM Trans. Design Autom. Electr. Syst. 5(1): 51-81 (2000) - Chi-Hong Hwang, Allen C.-H. Wu:
A predictive system shutdown method for energy saving of event-driven computation. ACM Trans. Design Autom. Electr. Syst. 5(2): 226-241 (2000) - Mary Jane Irwin:
Editorial. ACM Trans. Design Autom. Electr. Syst. 5(3): 265-266 (2000) - Pradip K. Jha, Nikil D. Dutt:
High-level library mapping for memories. ACM Trans. Design Autom. Electr. Syst. 5(3): 566-603 (2000) - Kumar N. Lalgudi, Marios C. Papaefthymiou, Miodrag Potkonjak:
Optimizing computations for effective block-processing. ACM Trans. Design Autom. Electr. Syst. 5(3): 604-630 (2000) - Rainer Leupers, Steven Bashford:
Graph-based code selection techniques for embedded processors. ACM Trans. Design Autom. Electr. Syst. 5(4): 794-814 (2000) - David E. Long, Mahesh A. Iyer, Miron Abramovici:
FILL and FUNI: algorithms to identify illegal states and sequentially untestable faults. ACM Trans. Design Autom. Electr. Syst. 5(3): 631-657 (2000) - Diana Marculescu, Radu Marculescu, Massoud Pedram:
Stochastic sequential machine synthesis with application to constrained sequence generation. ACM Trans. Design Autom. Electr. Syst. 5(3): 658-681 (2000) - Peter Marwedel:
Guest Editorial. ACM Trans. Design Autom. Electr. Syst. 5(4): 749-751 (2000) - Dinesh P. Mehta, Naveed A. Sherwani:
On the use of flexible, rectilinear blocks to obtain minimum-area floorplans in mixed block and cell designs. ACM Trans. Design Autom. Electr. Syst. 5(1): 82-97 (2000) - Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau:
On-chip vs. off-chip memory: the data partitioning problem in embedded processor-based systems. ACM Trans. Design Autom. Electr. Syst. 5(3): 682-704 (2000) - Stefan Pees, Andreas Hoffmann, Heinrich Meyr:
Retargetable compiled simulation of embedded processors using a machine description language. ACM Trans. Design Autom. Electr. Syst. 5(4): 815-834 (2000) - Richard Raimi, Ramin Hojati, Kedar S. Namjoshi:
Environment modeling and language universality. ACM Trans. Design Autom. Electr. Syst. 5(3): 705-725 (2000)