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ORCIDYue Lu 0007
Person information
- affiliation: Qualcomm Atheros Inc., San Jose, CA, USA
- affiliation (Ph.D.): University of California, Berkeley, CA, USA
Other persons with the same name
- Yue Lu — disambiguation page
- Yue Lu 0001
![[0000-0002-8784-4657]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-8784-4657")
— East China Normal University, School of Communications and Electronic Engineering, Shanghai Key Laboratory of Multidimensional Information Processing, China - Yue Lu 0002 — Twitter (and 1 more)
- Yue Lu 0003 — University of California, Riverside, CA, USA
- Yue Lu 0004 — South China University of Technology, Guangzhou, China
- Yue Lu 0005 — INRIA Nancy Grand Est, Nancy, France (and 1 more)
- Yue Lu 0006 — Delft University of Technology, The Netherlands
- Yue Lu 0008 — Northwestern Polytechnical University, National Engineering Laboratory for Integrated Aero-Space-Ground-Ocean Big Data Application Technology, ASGO, School of Computer Science, Xi'an, China (and 1 more)
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2010 – 2019
- 2017
[j4]Jaeduk Han, Nicholas Sutardja, Yue Lu, Elad Alon:
Design Techniques for a 60-Gb/s 288-mW NRZ Transceiver With Adaptive Equalization and Baud-Rate Clock and Data Recovery in 65-nm CMOS Technology. IEEE J. Solid State Circuits 52(12): 3474-3485 (2017)- [c6]Jaeduk Han, Yue Lu, Nicholas Sutardja, Elad Alon:
6.2 A 60Gb/s 288mW NRZ transceiver with adaptive equalization and baud-rate clock and data recovery in 65nm CMOS technology. ISSCC 2017: 112-113 - 2016
- [j3]Jaeduk Han, Yue Lu, Nicholas Sutardja, Kwangmo Jung, Elad Alon:
Design Techniques for a 60 Gb/s 173 mW Wireline Receiver Frontend in 65 nm CMOS Technology. IEEE J. Solid State Circuits 51(4): 871-880 (2016) - 2015
- [c5]Jaeduk Han, Yue Lu, Nicholas Sutardja, Kwangmo Jung, Elad Alon:
A 60Gb/s 173mW receiver frontend in 65nm CMOS technology. VLSIC 2015: 230- - 2013
- [j2]Yue Lu, Kwangmo Jung, Yasuo Hidaka, Elad Alon:
Design and Analysis of Energy-Efficient Reconfigurable Pre-Emphasis Voltage-Mode Transmitters. IEEE J. Solid State Circuits 48(8): 1898-1909 (2013) - [j1]Yue Lu, Elad Alon:
Design Techniques for a 66 Gb/s 46 mW 3-Tap Decision Feedback Equalizer in 65 nm CMOS. IEEE J. Solid State Circuits 48(12): 3243-3257 (2013) - [c4]John Crossley, Alberto Puggelli, Hanh-Phuc Le, B. Yang, R. Nancollas, Kwangmo Jung, Lingkai Kong, Nathan Narevsky, Yue Lu, Nicholas Sutardja, E. J. An, Alberto L. Sangiovanni-Vincentelli, Elad Alon:
BAG: a designer-oriented integrated framework for the development of AMS circuit generators. ICCAD 2013: 74-81 - [c3]Yue Lu, Elad Alon:
A 66Gb/s 46mW 3-tap decision-feedback equalizer in 65nm CMOS. ISSCC 2013: 30-31 - 2012
- [c2]Yue Lu, Kwangmo Jung, Yasuo Hidaka, Elad Alon:
A 10Gb/s 10mW 2-tap reconfigurable pre-emphasis transmitter in 65nm LP CMOS. CICC 2012: 1-4 - 2011
- [c1]Lingkai Kong, Yue Lu, Elad Alon:
A multi-GHz area-efficient comparator with dynamic offset cancellation. CICC 2011: 1-4
Coauthor Index
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