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2020 – today
- 2024
[c75]Hanna Iva Busse, Taimur Gibran Rabuske, Mário Silva, Gonçalo Rodrigues, Diogo Miguel Caetano, Marcelino B. Santos, Jorge R. Fernandes:
A Small-Area Current-Mode Input ΣΔ Modulator for Under-the-Sensors ADC Arrays. DCIS 2024: 1-5- [c74]Hanna Iva Busse, Gonçalo Rodrigues, Diogo Miguel Caetano, Marcelino B. Santos, Jorge R. Fernandes:
Integrated Demodulator for Manchester-Coded AM Signals with Clock Retrieval in US Applications. MWSCAS 2024: 946-950 - 2023
- [c73]Amin Rashidi, Hassan Rivandi, Milos Grubor, André Agostinho, Valter Sádio, Marcelino B. Santos, Wouter A. Serdijn, Vasiliki Giagka
:
Delta-Sigma Control Loop For Energy-Efficient Electrical Stimulation with Arbitrary-Shape Stimuli. BioCAS 2023: 1-5 - [c72]Carlos Santos, Jorge R. Fernandes, Marcelino B. Santos, Ricardo Martins:
Paving the Way for the Electronic Design Automation of Power Management Units. SMACD 2023: 1-4 - 2022
- [c71]Carlos Santos, Jorge R. Fernandes, Marcelino B. Santos:
Load Optimized Gate Driving for Charge Pumps. DCIS 2022: 1-5 - [c70]Jorge Semião, Luís Santos, Marcelino B. Santos:
DRAM Performance Sensor. HCI (7) 2022: 510-521 - 2021
- [c69]Jorge Semião, Luís Santos, Marcelino B. Santos:
SRAM Performance Sensor. DCIS 2021: 1-6 - 2020
- [p1]Jorge Semião, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Internet of Things and Artificial Intelligence - A Wining Partnership? Convergence of Artificial Intelligence and the Internet of Things 2020: 369-390
2010 – 2019
- 2019
- [c68]José M. Leitão, Ricardo Chaves, Marcelino B. Santos:
Applying Model Checking in the Verification of a Clock Masking Unit. DCIS 2019: 1-5 - 2018
- [c67]Rodrigo B. Capeleiro, José M. Leitão, Ricardo Chaves, Marcelino B. Santos:
Low-power frequency monitoring circuit for clock failure detection. DCIS 2018: 1-6 - [c66]Rodrigo B. Capeleiro, Marcelino B. Santos:
Low noise, high efficiency, segmented LCD drivers for ultra-low power applications in 22 nm FD-SOI. DCIS 2018: 1-6 - [c65]Jorge Semião, Ruben Cabral, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Performance Sensor for Reliable Operation. HCI (8) 2018: 347-365 - 2015
- [j24]Carlos Leong, Jorge Semião, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Fault-Tolerance in Field Programmable Gate Array with Dynamic Voltage and Frequency Scaling. J. Low Power Electron. 11(4): 517-527 (2015) - [c64]Carlos Leong, Jorge Semião, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Fault-tolerance in FPGA focusing power reduction or performance enhancement. LATS 2015: 1-6 - 2014
- [j23]Abilio Parreira, Floriberto A. Lima, Marcelino B. Santos:
Digital modular control of high frequency DC-DC converters. Microelectron. J. 45(10): 1254-1260 (2014) - [c63]Jorge Semião, David Saraiva, Carlos Leong, André Romão, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Performance sensor for tolerance and predictive detection of delay-faults. DFT 2014: 110-115 - [c62]Carlos Moreira, Marcelino B. Santos:
Implicit current DC-DC Digital Voltage-Mode Control. ISIE 2014: 1378-1383 - 2013
- [j22]Julio César Vázquez, Víctor H. Champac, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira:
Process Variations-Aware Statistical Analysis Framework for Aging Sensors Insertion. J. Electron. Test. 29(3): 289-299 (2013) - [j21]Tiago H. Moita, Carlos B. Almeida, Marcelino Bicho Dos Santos:
ActivIC: Design-Based Automatic Characterization of Mixed-Signal Integrated Circuits. J. Low Power Electron. 9(1): 73-88 (2013) - [j20]Jorge O. M. Esteves, João Pereira, Júlio Paisana, Marcelino B. Santos:
Ultra low power capless LDO with dynamic biasing of derivative feedback. Microelectron. J. 44(2): 94-102 (2013) - [c61]Carlos Leong, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira, María Dolores Valdés, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas:
Aging monitoring with local sensors in FPGA-based designs. FPL 2013: 1-4 - [c60]Taimur Gibran Rabuske, Jorge R. Fernandes, Fabio Gibran Rabuske, Cesar Ramos Rodrigues, Marcelino Bicho Dos Santos:
A self-calibrated 10-bit 1 MSps SAR ADC with reduced-voltage charge-sharing DAC. ISCAS 2013: 2452-2455 - 2012
- [j19]Jackson Pachito, Celestino V. Martins, Bruno Jacinto, Jorge Semião, Julio César Vázquez, Víctor H. Champac, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Aging-Aware Power or Frequency Tuning With Predictive Fault Detection. IEEE Des. Test Comput. 29(5): 27-36 (2012) - [j18]Valter Sádio, Fabian Rein, Christian Münker, Marcelino B. Santos:
Modeling of Inherent Losses of Fully Integrated Switched Capacitor DC-DC Converters. J. Low Power Electron. 8(5): 667-673 (2012) - [c59]Tiago L. Costa, Moisés Simões Piedade, Marcelino B. Santos:
An ultra-low noise current source for magnetoresistive biosensors biasing. BioCAS 2012: 73-76 - [c58]Jackson Pachito, Celestino V. Martins, Jorge Semião, Marcelino Bicho Dos Santos, Isabel C. Teixeira, João Paulo Teixeira:
The influence of clock-gating on NBTI-induced delay degradation. IOLTS 2012: 61-66 - 2011
- [j17]Bruno Jacinto, Carlos Moreira, Marcelino B. Santos:
Digital Sliding Mode Control of DC-DC Buck Converters. J. Low Power Electron. 7(2): 218-233 (2011) - [j16]José F. da Rocha, Marcelino Bicho Dos Santos, José M. Dores Costa:
Smart Control of Internal Supply Voltage Spikes in a Low Voltage DC-DC Buck Converter. J. Low Power Electron. 7(3): 426-443 (2011) - [j15]R. S. Oliveira, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira:
On-Line BIST for Performance Failure Prediction Under NBTI-Induced Aging in Safety-Critical Applications. J. Low Power Electron. 7(4): 562-572 (2011) - [c57]Nuno Guerreiro, Marcelino B. Santos:
Mixed-Signal Fault Equivalence: Search and Evaluation. Asian Test Symposium 2011: 377-382 - [c56]Carlos O. Moreira, J. Fernando A. da Silva, Sónia Ferreira Pinto, Marcelino B. Santos:
Digital LQR control with Kalman Estimator for DC-DC Buck converter. EUROCON 2011: 1-4 - [c55]José F. da Rocha, Marcelino Bicho Dos Santos, José M. Dores Costa:
Analysis of a monolithic buck converter's pMOS switch during turn off. EUROCON 2011: 1-4 - [c54]Jorge O. M. Esteves, Tiago H. Moita, Carlos B. Almeida, Marcelino B. Santos:
ICT: Interface software for the characterization and test of mixed-signal power cores. IOLTS 2011: 202-205 - [c53]R. S. Oliveira, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira:
On-line BIST for performance failure prediction under aging effects in automotive safety-critical applications. LATW 2011: 1-6 - [c52]Celestino V. Martins, Jorge Semião, Julio César Vázquez, Víctor H. Champac, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Adaptive Error-Prediction Flip-flop for performance failure prediction with aging sensors. VTS 2011: 203-208 - 2010
- [c51]Julio César Vázquez, Víctor H. Champac, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira:
Programmable aging sensor for automotive safety-critical applications. DATE 2010: 618-621 - [c50]Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira:
Predictive error detection by on-line aging monitoring. IOLTS 2010: 9-14 - [c49]Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Isabel Maria Cacho Teixeira, Marcelino B. Santos, João Paulo Teixeira:
Low-sensitivity to process variations aging sensor for automotive safety-critical applications. VTS 2010: 238-243
2000 – 2009
- 2009
- [j14]Angelo Monteiro, Marcelino B. Santos, Alexandre Neves, Nuno Dias:
Noise Minimization for Low Power Bandgap Reference and Low Dropout Regulator Cores. J. Low Power Electron. 5(2): 206-222 (2009) - [j13]Nuno Dias, Marcelino B. Santos, Angelo Monteiro, Pedro Braga, Alexandre Neves:
Gate Driver Voltage Optimization for Multi-Mode Low Power DC-DC Conversion. J. Low Power Electron. 5(2): 241-254 (2009) - [c48]Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira:
Built-in aging monitoring for safety-critical applications. IOLTS 2009: 9-14 - [c47]José F. da Rocha, Nuno Dias, Angelo Monteiro, Alexandre Neves, Gabriel Santos, Marcelino B. Santos, João Paulo Teixeira:
Controllability and observability in mixed signal cores. IOLTS 2009: 198-200 - [c46]Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Delay-fault tolerance to power supply Voltage disturbances analysis in nanometer technologies. IOLTS 2009: 223-228 - [c45]Jorge Semião, Judit Freijedo, Marlon Moraes, M. Mallmann, Carlos Lemos Antunes, Juliano Benfica, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Juan J. Rodríguez-Andina, João Paulo Teixeira, Daniel Lupi, Edmundo Gatti, Luis Garcia, Fernando Hernandez:
Measuring clock-signal modulation efficiency for Systems-on-Chip in electromagnetic interference environment. LATW 2009: 1-6 - 2008
- [j12]Jorge Semião, Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Leonardo Bisch Piccoli, Fabian Vargas, Marcelino Bicho Dos Santos, Isabel Maria Cacho Teixeira, João Paulo Teixeira:
Signal Integrity Enhancement in Digital Circuits. IEEE Des. Test Comput. 25(5): 452-461 (2008) - [j11]Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Time Management for Low-Power Design of Digital Systems. J. Low Power Electron. 4(3): 410-419 (2008) - [j10]José F. da Rocha, Marcelino Bicho Dos Santos, José M. Dores Costa, Floriberto A. Lima:
Level Shifters and DCVSL for a Low-Voltage CMOS 4.2-V Buck Converter. IEEE Trans. Ind. Electron. 55(9): 3315-3323 (2008) - [c44]Rodrigo Duarte, Júlio Paisana, Marcelino B. Santos, Floriberto A. Lima:
Adjustable low consumption circuit for monitorization of power source voltages in a SoC. APCCAS 2008: 376-379 - [c43]Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Process Tolerant Design Using Thermal and Power-Supply Tolerance in Pipeline Based Circuits. DDECS 2008: 34-37 - [c42]Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Exploiting Parametric Power Supply and/or Temperature Variations to Improve Fault Tolerance in Digital Circuits. IOLTS 2008: 227-232 - [c41]Nuno Dias, Marcelino B. Santos, Floriberto A. Lima, Beatriz Vieira Borges, Júlio Paisana:
Monolithic Multi-mode DC-DC Converter with Gate Voltage Optimization. PATMOS 2008: 258-267 - 2007
- [j9]Marcelino B. Santos, João Paulo Teixeira:
Functional-oriented mask-based built-in self-test. IET Comput. Digit. Tech. 1(5): 491-498 (2007) - [c40]Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Improving Tolerance to Power-Supply and Temperature Variations in Synchronous Circuits. DDECS 2007: 295-300 - [c39]Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino Bicho Dos Santos, Isabel C. Teixeira, João Paulo Teixeira:
Improving the Tolerance of Pipeline Based Circuits to Power Supply or Temperature Variations. DFT 2007: 303-311 - [c38]Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
On-line Dynamic Delay Insertion to Improve Signal Integrity in Synchronous Circuits. IOLTS 2007: 167-172 - [c37]Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Enhancing the Tolerance to Power-Supply Instability in Digital Circuits. ISVLSI 2007: 207-212 - 2006
- [c36]José M. Fernandes, Marcelino B. Santos, Arlindo L. Oliveira, João Paulo Teixeira:
Probabilistic Testability Analysis and DFT Methods at RTL. DDECS 2006: 216-217 - [c35]F. Guerreiro, Jorge Semião, A. Pierce, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Functional-Oriented BIST of Sequential Circuits Aiming at Dynamic Faults Coverage. DDECS 2006: 279-284 - [c34]José M. Fernandes, Marcelino B. Santos, Arlindo L. Oliveira, João Paulo Cacho Teixeira:
DFT and Probabilistic Testability Analysis at RTL. HLDVT 2006: 41-47 - [c33]Abilio Parreira, Marcelino B. Santos, João Paulo Teixeira:
BIST Architectures and Fault Emulation. LATW 2006: 55-60 - 2005
- [j8]D. Barros Júnior, Marcial Jesús Rodríguez-Irago, Marcelino B. Santos, Isabel C. Teixeira, Fabian Vargas, João Paulo Teixeira:
Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip. J. Electron. Test. 21(4): 349-363 (2005) - [c32]Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Dynamic Fault Test and Diagnosis in Digital Systems Using Multiple Clock Schemes and Multi-VDD Test. IOLTS 2005: 281-286 - 2004
- [j7]Abilio Parreira, João Paulo Teixeira, Marcelino B. Santos:
Built-In Self-Test Quality Assessment Using Hardware Fault Emulation In FPGAs. Comput. Artif. Intell. 23(5): 537-556 (2004) - [j6]Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira, Salvador Manich, Luz Balado, Joan Figueras:
On High-Quality, Low Energy Built-In Self Test Preparation at RT-Level. J. Electron. Test. 20(4): 345-355 (2004) - [c31]José M. Fernandes, Marcelino B. Santos, Arlindo L. Oliveira, João Paulo Teixeira:
A Probabilistic Method for the Computation of Testability of RTL Constructs. DATE 2004: 176-181 - [c30]Abilio Parreira, João Paulo Teixeira, Marcelino B. Santos:
FPGAs BIST Evaluation. FPL 2004: 333-343 - [c29]Daniel Barros Jr., Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Modeling and Simulation of Time Domain Faults in Digital Systems. IOLTS 2004: 5-10 - 2003
- [c28]Marcelino B. Santos, José M. Fernandes, Isabel C. Teixeira, João Paulo Teixeira:
RTL Test Pattern Generation for High Quality Loosely Deterministic BIST. DATE 2003: 10994-10999 - [c27]Abilio Parreira, João Paulo Teixeira, A. Pantelimon, Marcelino B. Santos, José T. de Sousa:
Fault Simulation Using Partially Reconfigurable Hardware. FPL 2003: 839-848 - [c26]Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Property Coverage for Quality Assessment of Fault Tolerant or Fail Safe Systems. IOLTS 2003: 164-165 - 2002
- [j5]Marcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira:
RTL Design Validation, DFT and Test Pattern Generation for High Defects Coverage. J. Electron. Test. 18(2): 179-187 (2002) - [j4]Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Design and Test of a Certifiable ASIC for a Safety-Critical Gas Burner Control System. J. Electron. Test. 18(3): 285-294 (2002) - [c25]Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Self-Checking and Fault Tolerance Quality Assessment Using Fault Sampling. DFT 2002: 216-224 - [c24]Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira, Salvador Manich, Rosa Rodríguez-Montañés, Joan Figueras:
RTL Level Preparation of High-Quality/Low-Energy/Low-Power BIST. ITC 2002: 814-823 - [c23]Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira, Salvador Manich, Luz Balado, Joan Figueras:
On High-Quality, Low Energy BIST Preparation at RT-Level. LATW 2002: 52-57 - 2001
- [j3]Marcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira:
RTL-Based Functional Test Generation for High Defects Coverage in Digital Systems. J. Electron. Test. 17(3-4): 311-319 (2001) - [c22]Marcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira:
RTL design validation, DFT and test pattern generation for high defects coverage. ETW 2001: 99-105 - [c21]Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Design and Test of Certifiable ASICs for Safety-Critical Gas Burners Contro. IOLTW 2001: 197-201 - [c20]Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Implicit functionality and multiple branch coverage (IFMB): a testability metric for RT-level. ITC 2001: 377-385 - 2000
- [j2]Salvador Manich, A. Gabarró, M. Lopez, Joan Figueras, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, João Paulo Teixeira, Marcelino B. Santos:
Low Power BIST by Filtering Non-Detecting Vectors. J. Electron. Test. 16(3): 193-202 (2000) - [c19]Marcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira:
RTL-based functional test generation for high defects coverage in digital SOCs. ETW 2000: 99-104 - [c18]Octávio Páscoa Dias, Jorge Semião, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Quality of Electronic Design: From Architectural Level to Test Coverage. ISQED 2000: 197- - [c17]Marcelino B. Santos, João Paulo Teixeira:
Experiments on RTL ATPG and Fault Simulation for High Defect Coverage in Digital Systems-on-a-Chip. LATW 2000: 66-71
1990 – 1999
- 1999
- [c16]Marcelino B. Santos, João Paulo Teixeira:
Defect-Oriented Mixed-Level Fault Simulation of Digital Systems-on-a-Chip Using HDL. DATE 1999: 549- - [c15]Octávio Páscoa Dias, Jorge Semião, Marcelino B. Santos, Isabel Maria Cacho Teixeira, João Paulo Teixeira:
From system level to defect-oriented test: a case study. ETW 1999: 136-141 - [c14]Salvador Manich, A. Gabarró, M. Lopez, Joan Figueras, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, João Paulo Teixeira, Marcelino B. Santos:
Low power BIST by filtering non-detecting vectors. ETW 1999: 165-170 - [c13]Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Joan Figueras, Salvador Manich, João Paulo Teixeira, Marcelino B. Santos:
Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity. ISCAS (1) 1999: 110-113 - [c12]Marcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira:
Defect-Oriented Verilog Fault Simulation of SoC Macros using a Stratified Fault Sampling Technique. VTS 1999: 326-332 - 1998
- [c11]Marcelino B. Santos, Fernando M. Gonçalves, Michael J. Ohletz, João Paulo Teixeira:
Defect-oriented testing of analogue and mixed signal ICs. ICECS 1998: 419-424 - [c10]Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Defect-oriented test quality assessment using fault sampling and simulation. ITC 1998: 35-42 - 1996
- [c9]João Paulo Teixeira, F. Celeiro, L. Dias, J. Ferreira, Marcelino B. Santos:
VHDL fault simulation for defect-oriented test and diagnosis of digital ICs. EURO-DAC 1996: 450-455 - [c8]F. Celeiro, L. Dias, J. Ferreira, Marcelino B. Santos, João Paulo Teixeira:
Defect-Oriented IC Test and Diagnosis Using VHDL Fault Simulation. ITC 1996: 620-628 - 1995
- [c7]Marcelino B. Santos, M. Simões, Isabel C. Teixeira, João Paulo Teixeira:
Test preparation methodology for high coverage of physical defects in CMOS digital ICs. ED&TC 1995: 604 - [c6]Marcelino B. Santos, M. Simões, Isabel C. Teixeira, João Paulo Teixeira:
Test preparation for high coverage of physical defects in CMOS digital ICs. VTS 1995: 330-337 - 1994
- [c5]A. P. Casimiro, Fernando M. Gonçalves, João Paulo Teixeira, Marcelino B. Santos:
On the Analysis of Routing Cells and Adjacency Faults in CMOS Digital Circuits. DFT 1994: 263-270 - [c4]Mario Calha, Marcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira:
Back Annotation of Physical Defects into Gate-Level, Realistic Faults in Digital ICs. ITC 1994: 720-728 - 1993
- [c3]A. P. Casimiro, M. Simões, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Experiments on Bridging Fault Analysis and Layout-Level DFT for CMOS Designs. DFT 1993: 109-116 - [c2]P. Nicolau, J. Barbosa, M. Saraiva, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Realistic Fault Analysis of CMOS Analog Building Blocks. DFT 1993: 311-318 - 1992
- [j1]M. Saraiva, Marcelino B. Santos, A. P. Casimiro, Isabel Maria Cacho Teixeira, João Paulo Teixeira:
On the design of a highly testable cell library. Microprocess. Microprogramming 35(1-5): 383-389 (1992) - [c1]M. Saraiva, P. Casimiro, Marcelino B. Santos, José T. de Sousa, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira:
Physical DFT for High Coverage of Realistic Faults. ITC 1992: 642-651
Coauthor Index
Isabel C. Teixeira
aka: Isabel Maria Cacho Teixeira
aka: Isabel Maria Cacho Teixeira
[p1] [c65] [j24] [c64] [c63] [j22] [c61] [j19] [c58] [j15] [c53] [c52] [c51] [c50] [c49] [c48] [c46] [c45] [j12] [j11] [c43] [c42] [c40] [c39] [c38] [c37] [c35] [j8] [c32] [j6] [c29] [c28] [c26] [j5] [j4] [c25] [c24] [c23] [j3] [c22] [c21] [c20] [c19] [c18] [c15] [c12] [c10] [c7] [c6] [c4] [c3] [c2] [j1] [c1]
João Paulo Teixeira 0001
aka: João Paulo Cacho Teixeira
aka: João Paulo Cacho Teixeira
[p1] [c65] [j24] [c64] [c63] [j22] [c61] [j19] [c58] [j15] [c53] [c52] [c51] [c50] [c49] [c48] [c47] [c46] [c45] [j12] [j11] [c43] [c42] [j9] [c40] [c39] [c38] [c37] [c36] [c35] [c34] [c33] [j8] [c32] [j7] [j6] [c31] [c30] [c29] [c28] [c27] [c26] [j5] [j4] [c25] [c24] [c23] [j3] [c22] [c21] [c20] [j2] [c19] [c18] [c17] [c16] [c15] [c14] [c13] [c12] [c11] [c10] [c9] [c8] [c7] [c6] [c5] [c4] [c3] [c2] [j1] [c1]
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last updated on 2025-02-21 20:32 CET by the dblp team
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