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2020 – today
- 2024
[j21]Fredrik Feyling
, Hampus Malmberg, Carsten Wulff, Hans-Andrea Loeliger, Trond Ytterdal:
Design and Analysis of the Leapfrog Control-Bounded A/D Converter. IEEE Trans. Very Large Scale Integr. Syst. 32(1): 79-88 (2024)- [c63]Elijah Racz, Arthur Thomas PE, Maher E. Rizkalla, Trond Ytterdal, John J. Lee:
Interfacing GaN HEMTs with Josephson Junctions: A Novel Approach to High-Frequency Electronics. MWSCAS 2024: 318-322 - 2023
- [c62]Shankkar Balasubramanian, Carsten Wulff, Trond Ytterdal:
A 160-GHz Power Amplifier with 32-dB Gain and 9.8% Peak PAE in 28-nm FD-SOI. ISCAS 2023: 1-5 - [c61]Anoop Gopinath, Trond Ytterdal, Avinash Yadav, John J. Lee, Maher E. Rizkalla, Mukesh Kumar:
SRAM Vmin Scaling via Negative Wordline. MWSCAS 2023: 227-231 - [c60]Linknath Surya Balasubramanian, Maher E. Rizkalla, Jaehwan Lee, Trond Ytterdal, Mukesh Kumar:
Towards No Penalty Control Hazard Handling. MWSCAS 2023: 1128-1131 - 2022
- [c59]Fredrik Feyling, Hampus Malmberg, Carsten Wulff, Hans-Andrea Loeliger, Trond Ytterdal:
High-level Comparison of Control-Bounded A/D Converters and Continuous- Time Sigma-Delta Modulators. NorCAS 2022: 1-5 - 2021
- [c58]George Mekhael, Nathaniel Morgan, Mounica Patnala, Trond Ytterdal, Maher E. Rizkalla:
GNRFET-Based DC-DC Converters for Low Power Data Management in ULSI System, a Feasibility Study. ISCAS 2021: 1-5 - [c57]Nikhil Advaith Gudala, Trond Ytterdal, John J. Lee, Maher E. Rizkalla:
Implementation of High Speed and Low Power Carry Select Adder with BEC. MWSCAS 2021: 377-381 - [c56]Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet:
Subthreshold Power PC and Nand Race-Free Flip-Flops in Frequency Divider Applications. NorCAS 2021: 1-6 - 2020
- [j20]Xueqing Liu, Trond Ytterdal, Michael S. Shur:
Plasmonic FET Terahertz Spectrometer. IEEE Access 8: 56039-56044 (2020) - [j19]Even Låte, Trond Ytterdal, Snorre Aunet:
An Energy Efficient Level Shifter Capable of Logic Conversion From Sub-15 mV to 1.2 V. IEEE Trans. Circuits Syst. 67-II(11): 2687-2691 (2020) - [j18]Even Låte, Trond Ytterdal, Snorre Aunet:
Benefiting From State Dependencies in Asymmetric SRAM Cells Through Conditional Word-Flipping. IEEE Trans. Very Large Scale Integr. Syst. 28(10): 2223-2227 (2020) - [c55]Kebria Naderi, Erwin H. T. Shad, Marta Molinas, Ali Heidari, Trond Ytterdal:
A Very Low SEF Neural Amplifier by Utilizing a High Swing Current-Reuse Amplifier. DCIS 2020: 1-4 - [c54]Erwin H. T. Shad, Marta Molinas, Trond Ytterdal:
A Low-power and Low-noise Multi-purpose Chopper Amplifier with High CMRR and PSRR. EMBC 2020: 3998-4001 - [c53]Zachary Cochran, Trond Ytterdal, Akul Madan, Maher E. Rizkalla:
Emerging Josephson Junction/Graphene Device Technologies towards THz Signal Generation. ISCAS 2020: 1-5 - [c52]Kyle Whittaker, Maher E. Rizkalla, Trond Ytterdal:
A Low Power FinFET Charge Pump for Energy Harvesting Applications. MWSCAS 2020: 1048-1051 - [c51]Erwin H. T. Shad, Tania Moeinfard, Marta Molinas, Trond Ytterdal:
A Power Efficient, High Gain and High Input Impedance Capacitively-coupled Neural Amplifier. NorCAS 2020: 1-5 - [c50]Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet:
Comparative Study of Single, Regular and Flip Well Subthreshold SRAMs in 22 nm FDSOI Technology. NorCAS 2020: 1-6 - [c49]Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet:
Multi-threshold Voltage and Dynamic Body Biasing Techniques for Energy Efficient Ultra Low Voltage Subthreshold Adders. NorCAS 2020: 1-6
2010 – 2019
- 2019
- [j17]Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet:
An Ultra-Low Voltage and Low-Energy Level Shifter in 28-nm UTBB-FDSOI. IEEE Trans. Circuits Syst. II Express Briefs 66-II(6): 899-903 (2019) - [c48]Harald Garvik, Carsten Wulff, Trond Ytterdal:
A 68 dB SNDR Compiled Noise-Shaping SAR ADC With On-Chip CDAC Calibration. A-SSCC 2019: 193-194 - [c47]Aslak Lykre Holen, Trond Ytterdal:
A High-Voltage Cascode-Connected Three-Level Pulse-Generator for Bio-Medical Ultrasound Applications. ISCAS 2019: 1-5 - [c46]Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet:
Ultra-Low Voltage Subthreshold Binary Adder Architectures for IoT Applications: Ripple Carry Adder or Kogge Stone Adder. NORCAS 2019: 1-7 - [c45]Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet:
Exploring optimal back bias voltages for ultra low voltage CMOS digital Circuits in 22 nm FDSOI Technology. NORCAS 2019: 1-6 - [c44]Erwin H. T. Shad, Marta Molinas, Trond Ytterdal:
Modified Current-reuse OTA to Achieve High CMRR by utilizing Cross-coupled Load. PRIME 2019: 13-16 - 2018
- [j16]Even Låte, Trond Ytterdal, Snorre Aunet:
A loadless 6T SRAM cell for sub- & near- threshold operation implemented in 28 nm FD-SOI CMOS technology. Integr. 63: 56-63 (2018) - [j15]Ali Asghar Vatanjou, Even Låte, Trond Ytterdal, Snorre Aunet:
Ultra-low voltage and energy efficient adders in 28 nm FDSOI exploring poly-biasing for device sizing. Microprocess. Microsystems 56: 92-100 (2018) - [c43]Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet:
Comparison of Ultra Low Power Full Adder Cells in 22 nm FDSOI Technology. NORCAS 2018: 1-5 - 2017
- [j14]Carsten Wulff, Trond Ytterdal:
A Compiled 9-bit 20-MS/s 3.5-fJ/conv.step SAR ADC in 28-nm FDSOI for Bluetooth Low Energy Receivers. IEEE J. Solid State Circuits 52(7): 1915-1926 (2017) - [j13]Even Låte, Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet:
Extended Comparative Analysis of Flip-Flop Architectures for Subthreshold Applications in 28 nm FD-SOI. Microprocess. Microsystems 48: 11-20 (2017) - [j12]Rune Kaald, Trym Eggen, Trond Ytterdal:
A 1 MHz BW 34.2 fJ/step Continuous Time Delta Sigma Modulator With an Integrated Mixer for Cardiac Ultrasound. IEEE Trans. Biomed. Circuits Syst. 11(1): 234-243 (2017) - [j11]Hourieh Attarzadeh, Ye Xu, Trond Ytterdal:
A Low-Power High-Dynamic-Range Receiver System for In-Probe 3-D Ultrasonic Imaging. IEEE Trans. Biomed. Circuits Syst. 11(5): 1053-1064 (2017) - [c42]Harald Garvik, Carsten Wulff, Trond Ytterdal:
An 11.0 bit ENOB, 9.8 fJ/conv.-step noise-shaping SAR ADC calibrated by least squares estimation. CICC 2017: 1-4 - 2016
- [j10]Peng Wang, Trond Ytterdal:
Low noise, -50 dB second harmonic distortion single-ended to differential switched-capacitive variable gain amplifier for ultrasound imaging. IET Circuits Devices Syst. 10(3): 173-180 (2016) - [j9]Hourieh Attarzadeh, Sung Kyu Lim, Trond Ytterdal:
Design and Analysis of a Stochastic Flash Analog-to-Digital Converter in 3D IC technology for integration with ultrasound transducer array. Microelectron. J. 48: 39-49 (2016) - [j8]Surya Sharma, Trond Ytterdal:
Low-power low-area beamformer design using switched-current ARAM using external capacitors. Microelectron. J. 48: 76-80 (2016) - [j7]Peng Wang, Trond Ytterdal:
A 54-µW Inverter-Based Low-Noise Single-Ended to Differential VGA for Second Harmonic Ultrasound Probes in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 63-II(7): 623-627 (2016) - [c41]Carsten Wulff, Trond Ytterdal:
A compiled 3.5fJ/conv.step 9b 20MS/s SAR ADC for wireless applications in 28nm FDSOI. ESSCIRC 2016: 177-180 - [c40]Alan C. Seabaugh, Cristobal Alessandri, Mina Asghari Heidarlou, Hua-Min Li, Leitao Liu, Hao Lu, Sara Fathipour, Paolo Paletti, Pratyush Pandey, Trond Ytterdal:
Steep slope transistors: Tunnel FETs and beyond. ESSDERC 2016: 349-351 - [c39]György Csaba, Trond Ytterdal, Wolfgang Porod:
Neural network based on parametrically-pumped oscillators. ICECS 2016: 45-48 - [c38]Harald Garvik, Carsten Wulff, Trond Ytterdal:
Noise transfer functions and loop filters especially suited for noise-shaping SAR ADCs. ISCAS 2016: 1034-1037 - [c37]Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet:
28 nm UTBB-FDSOI energy efficient and variation tolerant custom digital-cell library with application to a subthreshold MAC block. MIXDES 2016: 105-110 - [c36]Ali Asghar Vatanjou, Even Låte, Trond Ytterdal, Snorre Aunet:
Ultra-low voltage adders in 28 nm FDSOI exploring poly-biasing for device sizing. NORCAS 2016: 1-4 - 2015
- [j6]Surya Sharma, Trond Ytterdal:
In-Probe Ultrasound Beamformer Utilizing Switched-Current Analog RAM. IEEE Trans. Circuits Syst. II Express Briefs 62-II(6): 517-521 (2015) - [c35]Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet:
Exploiting short channel effects and multi-Vt technology for increased robustness and reduced energy consumption, with application to a 16-bit subthreshold adder implemented in 65 nm CMOS. ECCTD 2015: 1-4 - [c34]Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet:
4 Sub-/near-threshold flip-flops with application to frequency dividers. ECCTD 2015: 1-4 - [c33]Peng Wang, György Csaba, Wolfgang Porod, Trond Ytterdal:
A differential inverter-based switched-capacitor oscillator in 65 nm CMOS technology. ECCTD 2015: 1-4 - [c32]Peng Wang, Trond Ytterdal:
Inverter-based Low-power, low-noise SC-VGA and 8 channel pipelined S/H analog beamformer for ultrasound imaging probes. ECCTD 2015: 1-4 - [c31]Peng Wang, Trond Ytterdal, Thomas M. Halvorsrod:
Surfing front-end architectures for ultrasound imaging systems. ECCTD 2015: 1-4 - [c30]Hourieh Attarzadeh, Sung Kyu Lim, Trond Ytterdal:
Stacking integration methodologies in 3D IC for 3D ultrasound image processing application: A stochastic flash ADC design case study. ISCAS 2015: 1266-1269 - [c29]Ye Xu, Pieter Harpe, Trond Ytterdal:
A 4.5fJ/conversion-step 9-bit 35MS/s configurable-gain SAR ADC in a compact area. ISCAS 2015: 2437-2440 - [c28]Hourieh Attarzadeh, Snorre Aunet, Trond Ytterdal:
An ultra-low-power/high-speed 9-bit adder design: Analysis and comparison Vs. technology from 130nm-LP to UTBB FD-SOI-28nm. NORCAS 2015: 1-4 - [c27]Even Låte, Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet:
Comparative analysis of flip-flop architectures for subthreshold applications in 28nm FDSOI. NORCAS 2015: 1-4 - 2014
- [c26]Hourieh Attarzadeh, Trond Ytterdal:
A Low-Noise Variable-Gain Amplifier for in-Probe 3D Imaging Applications Based on CMUT Transducers. ISVLSI 2014: 256-260 - [c25]Jonathan Edvard Bjerkedok, Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet:
Modular layout-friendly cell library design applied for subthreshold CMOS. NORCHIP 2014: 1-6 - [c24]Magne Voernes, Trond Ytterdal, Snorre Aunet:
Performance comparison of 5 subthreshold CMOS flip-flops under process-, voltage-, and temperature variations, based on netlists from layout. NORCHIP 2014: 1-6 - 2013
- [c23]Peng Wang, Trond Ytterdal, Thomas Moe Halvorsrod:
A low-power, low-noise, and low-cost VGA for second harmonic imaging ultrasound probes. BioCAS 2013: 314-317 - [c22]Hourieh Attarzadeh, Trond Ytterdal:
Low power OTA-less I-V-converter with single-ended to differential conversion for capacitive sensor interfaces. ECCTD 2013: 1-4 - [c21]Jon Håvard Eriksrod, Trond Ytterdal:
A 65nm CMOS front-end LNA for medical ultrasound imaging with feedback employing noise and distortion cancellation. ECCTD 2013: 1-4 - [c20]Surya Sharma, Trond Ytterdal:
A low power analog RAM implementation for in-probe beamforming in ultrasound imaging. ECCTD 2013: 1-4 - [c19]Peng Wang, Trond Ytterdal, Thomas Halvorsrod:
A low noise single-ended to differential linear charge sampling SC-VGA for second harmonic cardiac ultrasound imaging. ECCTD 2013: 1-4 - [c18]Peng Wang, Trond Ytterdal, Thomas Halvorsrod:
A low noise single-end to differential switched-capacitor VGA for PZT-Xducer ultrasound imaging. ECCTD 2013: 1-4 - [c17]Surya Sharma, Trond Ytterdal:
Low power front end electronics for in-probe beamforming in ultrasound imaging. NORCHIP 2013: 1-4 - [c16]Ye Xu, Trond Ytterdal:
A 7-bit 50ms/s single-ended asynchronous SAR ADC in 65nm CMOS. NORCHIP 2013: 1-4 - 2012
- [j5]Atila Alvandpour, Patrick Reynaert, Trond Ytterdal:
Introduction to the Special Issue on the 37th European Solid-State Circuits Conference (ESSCIRC). IEEE J. Solid State Circuits 47(7): 1511-1514 (2012) - [c15]Tuan Vu Cao, Snorre Aunet, Trond Ytterdal:
A 9-bit 50MS/s asynchronous SAR ADC in 28nm CMOS. NORCHIP 2012: 1-6 - [c14]Eirik Steen-Hansen, Trond Ytterdal:
Modeling and design of a dual-residue pipelined ADC in 130nm CMOS. NORCHIP 2012: 1-4 - [c13]Surya Sharma, Trond Ytterdal:
Low noise front-end amplifier design for medical ultrasound imaging applications. VLSI-SoC 2012: 12-17 - 2011
- [c12]Hans Herman Hansen, Trond Ytterdal:
Figure-of-merit optimization of a low noise amplifier in 180 nm CMOS. ECCTD 2011: 492-495
2000 – 2009
- 2009
- [j4]Lanny L. Lewyn, Trond Ytterdal, Carsten Wulff, Kenneth W. Martin:
Analog Circuit Design in Nanoscale CMOS Technologies. Proc. IEEE 97(10): 1687-1714 (2009) - [j3]Tajeshwar Singh, Trond Sæther, Trond Ytterdal:
Feedback Biasing in Nanoscale CMOS Technologies. IEEE Trans. Circuits Syst. II Express Briefs 56-II(5): 349-353 (2009) - [j2]Carsten Wulff, Trond Ytterdal:
Resonators in Open-Loop Sigma-Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(10): 2159-2172 (2009) - [j1]Tajeshwar Singh, Trond Sæther, Trond Ytterdal:
Current-Mode Capacitive Sensor Interface Circuit With Single-Ended to Differential Output Capability. IEEE Trans. Instrum. Meas. 58(11): 3914-3920 (2009) - 2007
- [c11]Linga Reddy Cenkeramaddi, Tajeshwar Singh, Trond Ytterdal:
Self-biased charge sampling amplifier in 90nm CMOS for medical ultrasound imaging. ACM Great Lakes Symposium on VLSI 2007: 168-171 - 2006
- [c10]Linga Reddy Cenkeramaddi, Trond Ytterdal:
Jitter analysis of general charge sampling amplifiers. ISCAS 2006 - 2005
- [c9]Jan Lundgren, Trond Ytterdal, Mattias O'Nils:
Simplified gate level noise injection models for behavioral noise coupling simulation. ECCTD 2005: 345-348 - [c8]Johnny Bjørnsen, Øystein Moldsvor, Trond Sæther, Trond Ytterdal:
A 220mW 14b 40MSPS gain calibrated pipelined ADC. ESSCIRC 2005: 165-168 - 2004
- [c7]Tajeshwar Singh, Trond Ytterdal:
A single-ended to differential capacitive sensor interface circuit designed in CMOS technology. ISCAS (1) 2004: 948-951 - 2003
- [c6]Johnny Bjørnsen, Trond Ytterdal:
Behavioral modeling and simulation of high-speed analog-to-digital converters using SystemC. ISCAS (3) 2003: 906-909 - [c5]Jan Lundgren, Bengt Oelmann, Trond Ytterdal, Patrik Eriksson, Munir Abdalla, Mattias O'Nils:
Behavioral Simulation of Power Line Noise Coupling in Mixed-Signal Systems using SystemC. ISVLSI 2003: 275-277 - 2002
- [c4]Trond Ytterdal, Snorre Aunet:
Compact low-voltage self-calibrating digital floating-gate CMOS logic circuits. ISCAS (5) 2002: 393-396 - 2001
- [c3]Thomas E. Bonnerud, Bjørnar Hernes, Trond Ytterdal:
A mixed-signal, functional level simulation framework based on SystemC for system-on-a-chip applications. CICC 2001: 541-544 - [c2]Snorre Aunet, Yngvar Berg, Trond Ytterdal, Øivind Næss, Trond Sæther:
A method for simulation of floating-gate UV-programmable circuits with application to three new 2-MOSFET digital circuits. ICECS 2001: 1035-1038 - 2000
- [c1]Michael S. Shur, Tor A. Fjeldly, Trond Ytterdal:
Transistor Modeling for the VDSM Era. ISQED 2000: 37-44
Coauthor Index
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last updated on 2024-10-11 18:24 CEST by the dblp team
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