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Journal Articles
- 2009
[j6]Tajeshwar Singh, Trond Sæther, Trond Ytterdal:
Feedback Biasing in Nanoscale CMOS Technologies. IEEE Trans. Circuits Syst. II Express Briefs 56-II(5): 349-353 (2009)- [j5]Tajeshwar Singh, Trond Sæther, Trond Ytterdal:
Current-Mode Capacitive Sensor Interface Circuit With Single-Ended to Differential Output Capability. IEEE Trans. Instrum. Meas. 58(11): 3914-3920 (2009) - 2006
- [j4]Ivar Løkken, Anders Vinje, Trond Sæther, Bjørnar Hernes:
Quantizer Nonoverload Criteria in Sigma-Delta Modulators. IEEE Trans. Circuits Syst. II Express Briefs 53-II(12): 1383-1387 (2006) - 2003
- [j3]Snorre Aunet, Yngvar Berg, Trond Sæther:
Real-time reconfigurable linear threshold elements implemented in floating-gate CMOS. IEEE Trans. Neural Networks 14(5): 1244-1256 (2003) - [j2]Snorre Aunet, Yngvar Berg, Trond Sæther:
Erratum to "real-time reconfigurable linear threshold elements implemented in floating-gate CMOS". IEEE Trans. Neural Networks 14(6): 1582 (2003) - 1996
- [j1]Trond Sæther, Chung-Chih Hung, Zheng Qi, Mohammed Ismail, Oddvar Aaserud:
High speed, high linearity CMOS buffer amplifier. IEEE J. Solid State Circuits 31(2): 255-258 (1996)
Conference and Workshop Papers
- 2005
- [c6]Johnny Bjørnsen, Øystein Moldsvor, Trond Sæther, Trond Ytterdal:
A 220mW 14b 40MSPS gain calibrated pipelined ADC. ESSCIRC 2005: 165-168 - [c5]Shimul Chandra Saha, Ulrik Hanke, Geir U. Jensen, Anton M. Bøifot, Tor A. Fjeldly, Trond Sæther:
Modeling and simulation of high capacitance ratio RF MEMS shunt switch. Circuits, Signals, and Systems 2005: 186-193 - 2001
- [c4]Snorre Aunet, Yngvar Berg, Øivind Næss, Trond Sæther:
Novel reconfigurable two-MOSFET UV-programmable floating-gate circuits for CARRY, NAND, NOR or INVERT functions. ICECS 2001: 581-584 - [c3]Snorre Aunet, Yngvar Berg, Trond Ytterdal, Øivind Næss, Trond Sæther:
A method for simulation of floating-gate UV-programmable circuits with application to three new 2-MOSFET digital circuits. ICECS 2001: 1035-1038 - [c2]Bjørnar Hernes, Øystein Moldsvor, Trond Sæther:
A -80 dB HD3 opamp in 3.3 V CMOS technology using tail current compensation. ISCAS (1) 2001: 216-219 - 1996
- [c1]Tor Sverre Lande, Dag T. Wisland, Trond Sæther, Yngvar Berg:
FLOGIC-Floating-gate logic for low-power operation. ICECS 1996: 1041-1044
Coauthor Index
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