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"Exploring optimal back bias voltages for ultra low voltage CMOS digital ..."
Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet (2019)
- Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet:
Exploring optimal back bias voltages for ultra low voltage CMOS digital Circuits in 22 nm FDSOI Technology. NORCAS 2019: 1-6
![](https://dblp.uni-trier.de./img/cog.dark.24x24.png)
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