


default search action
"Exploring optimal back bias voltages for ultra low voltage CMOS digital ..."
Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet (2019)
- Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet:
Exploring optimal back bias voltages for ultra low voltage CMOS digital Circuits in 22 nm FDSOI Technology. NORCAS 2019: 1-6

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.