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ORCIDJuan Antonio Clemente
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2020 – today
- 2024
[j17]Daniel León
, Juan Carlos Fabero, Juan Antonio Clemente:
Non-intrusive study on FPGA of the SEU sensitivity on the COTS RISC-V VeeR EH1 soft processor from Western Digital. Microprocess. Microsystems 105: 105021 (2024)- 2023
- [j16]Juan Carlos Fabero, Golnaz Korkian, Francisco J. Franco, Guillaume Hubert, Hortensia Mecha, Manon Letiche, Juan Antonio Clemente:
SEE sensitivity of a COTS 28-nm SRAM-based FPGA under thermal neutrons and different incident angles. Microprocess. Microsystems 96: 104743 (2023) - 2022
- [j15]Golnaz Korkian, Daniel León, Francisco J. Franco, Juan Carlos Fabero, Manon Letiche, Yolanda Morilla, Pedro Martín-Holgado, Helmut Puchner, Hortensia Mecha, Juan Antonio Clemente:
Single Event Upsets Under Proton, Thermal, and Fast Neutron Irradiation in Emerging Nonvolatile Memories. IEEE Access 10: 114566-114585 (2022) - 2021
- [c6]Juan Carlos Fabero, Golnaz Korkian, Francisco J. Franco, Hortensia Mecha, Manon Letiche, Juan Antonio Clemente:
Thermal Neutron-induced SEUs on a COTS 28-nm SRAM-based FPGA under Different Incident Angles. LATS 2021: 1-6 - [c5]Mohammadreza Rezaei, Francisco J. Franco, Juan Carlos Fabero, Hortensia Mecha, Helmut Puchner, Juan Antonio Clemente:
Impact of DVS on Power Consumption and SEE Sensitivity of COTS Volatile SRAMs. LATS 2021: 1-6 - 2020
- [j14]Reza Ramezani, Juan Antonio Clemente, Francisco J. Franco:
Analytical reliability estimation of SRAM-based FPGA designs against single-bit and multiple-cell upsets. Reliab. Eng. Syst. Saf. 202: 107036 (2020) - [j13]Guillaume Hubert, Sébastien Aubry, Juan Antonio Clemente:
Impact of Ground-Level Enhancement (GLE) Solar Events on Soft Error Rate for Avionics. IEEE Trans. Aerosp. Electron. Syst. 56(5): 3674-3684 (2020)
2010 – 2019
- 2018
- [j12]Javier Olivito, Felipe Serrano, Juan Antonio Clemente, Hortensia Mecha, Javier Resano:
Analysis of the reconfiguration latency and energy overheads for a Xilinx Virtex-5 field-programmable gate array. IET Comput. Digit. Tech. 12(4): 150-157 (2018) - [j11]Reza Ramezani, Yasser Sedaghat, Mahmoud Naghibzadeh, Juan Antonio Clemente:
A decomposition-based reliability and makespan optimization technique for hardware task graphs. Reliab. Eng. Syst. Saf. 180: 13-24 (2018) - 2017
- [j10]Reza Ramezani, Yasser Sedaghat, Mahmoud Naghibzadeh, Juan Antonio Clemente:
Reliability and Makespan Optimization of Hardware Task Graphs in Partially Reconfigurable Platforms. IEEE Trans. Aerosp. Electron. Syst. 53(2): 983-994 (2017) - [j9]Reza Ramezani, Yasser Sedaghat, Juan Antonio Clemente:
Reliability Improvement of Hardware Task Graphs via Configuration Early Fetch. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1408-1420 (2017) - 2016
- [j8]Juan Antonio Clemente, Wassim Mansour, Rafic Ayoubi, Felipe Serrano, Hortensia Mecha, Haissam Ziade, Wassim El Falou, Raoul Velazco:
Hardware implementation of a fault-tolerant Hopfield Neural Network on FPGAs. Neurocomputing 171: 1606-1609 (2016) - [j7]Juan Antonio Clemente, Ruben Gran, Abel Chocano, Carlos del Prado, Javier Resano:
Hardware Architectural Support for Caching Partitioned Reconfigurations in Reconfigurable Systems. IEEE Trans. Very Large Scale Integr. Syst. 24(2): 530-543 (2016) - 2014
- [j6]Juan Antonio Clemente, Javier Resano, Daniel Mozos:
An approach to manage reconfigurations and reduce area cost in hard real-time reconfigurable systems. ACM Trans. Embed. Comput. Syst. 13(4): 90:1-90:24 (2014) - [j5]Juan Antonio Clemente, Ivan Beretta, Vincenzo Rana, David Atienza, Donatella Sciuto:
A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms. ACM Trans. Reconfigurable Technol. Syst. 7(2): 9:1-9:27 (2014) - [j4]Juan Antonio Clemente, Elena Perez Ramo, Javier Resano, Daniel Mozos, Francky Catthoor:
Configuration Mapping Algorithms to Reduce Energy and Time Reconfiguration Overheads in Reconfigurable Systems. IEEE Trans. Very Large Scale Integr. Syst. 22(6): 1248-1261 (2014) - 2011
- [j3]Juan Antonio Clemente, Javier Resano, Carlos González, Daniel Mozos:
A Hardware Implementation of a Run-Time Scheduler for Reconfigurable Systems. IEEE Trans. Very Large Scale Integr. Syst. 19(7): 1263-1276 (2011) - [c4]Juan Antonio Clemente, Vincenzo Rana, Donatella Sciuto, Ivan Beretta, David Atienza:
A Hybrid Mapping-Scheduling Technique for Dynamically Reconfigurable Hardware. FPL 2011: 177-180 - [c3]Juan Antonio Clemente, Daniel Mozos, Javier Resano:
A Replacement Technique to Maximize Task Reuse in Reconfigurable Systems. IPDPS Workshops 2011: 250-257 - 2010
- [j2]Juan Antonio Clemente, Carlos González, Javier Resano, Daniel Mozos:
A task graph execution manager for reconfigurable multi-tasking systems. Microprocess. Microsystems 34(2-4): 73-83 (2010)
2000 – 2009
- 2008
- [j1]Javier Resano, Juan Antonio Clemente, Carlos González, Daniel Mozos, Francky Catthoor:
Efficiently scheduling runtime reconfigurations. ACM Trans. Design Autom. Electr. Syst. 13(4): 58:1-58:12 (2008) - [c2]Juan Antonio Clemente, Carlos González, Javier Resano, Daniel Mozos:
A Hardware Task-Graph Scheduler for Reconfigurable Multi-tasking Systems. ReConFig 2008: 79-84 - 2007
- [c1]Javier Resano, Juan Antonio Clemente, Carlos González, Jose Luis Garcia, Daniel Mozos:
HW implementation of an execution manager for reconfigurable systems. ERSA 2007: 71-77
Coauthor Index
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