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Journal Articles
- 2023
[j14]Abdelrahman G. Habib
, Mohamed Dessouky, Ahmed Naguib:
A Resolution Control Loop for TDC-Based Phase Detectors in ADPLLs. IEEE Access 11: 36073-36081 (2023)- [j13]Mariam Maurice, Mohamed Dessouky, Ashraf Salem:
Increasing the Modeling Accuracy of an Analog PLL Device Executed With an Event-Driven Simulator. IEEE Access 11: 79721-79738 (2023) - 2022
- [j12]Mohamed Salah, Mohamed Dessouky, Bassant Abdelhamid:
Design and Implementation of an Improved Variable Step-Size NLMS-Based Algorithm for Acoustic Noise Cancellation. Circuits Syst. Signal Process. 41(1): 551-578 (2022) - 2021
- [j11]Moaz Mostafa, M. Watheq El-Kharashi, Mohamed Dessouky, Ahmed M. Zaki:
A Novel Flow for Reducing Dynamic Power and Conditional Performance Improvement. IEEE Trans. Circuits Syst. I Regul. Pap. 68(5): 2003-2016 (2021) - 2020
- [j10]Tamer Farouk, Mohamed Dessouky, Mohamed M. Elkhatib:
A fabrication of a low-power low-noise neural recording amplifier based on flipped voltage follower. Microelectron. J. 101: 104817 (2020) - 2019
- [j9]Hossam O. Ahmed, Maged Ghoneima, Mohamed Dessouky:
Systolic-based pyramidal neuron accelerator blocks for convolutional neural network. Microelectron. J. 89: 16-22 (2019) - 2018
- [j8]Mostafa N. Sabry, Hesham Omran, Mohamed Dessouky:
Systematic design and optimization of operational transconductance amplifier using gm/ID design methodology. Microelectron. J. 75: 87-96 (2018) - 2017
- [j7]Christian A. Cancino, José M. Merigó, Freddy Coronado, Yasser Dessouky, Mohamed Dessouky:
Forty years of Computers & Industrial Engineering: A bibliometric analysis. Comput. Ind. Eng. 113: 614-629 (2017) - 2016
- [j6]Sherif M. Saif, Mohamed Dessouky, M. Watheq El-Kharashi, Hazem M. Abbas, Salwa M. Nassar:
A Platform for Placement of Analog Integrated Circuits Using Satisfiability Modulo Theories. J. Circuits Syst. Comput. 25(5): 1650047:1-1650047:31 (2016) - 2013
- [j5]Haitham Eissa, Rami Fathy Salem, Ahmed Arafa, Sherif Hany, Abdelrahman ElMously, Mohamed Dessouky, David Nairn, Mohab H. Anis:
Parametric DFM Solution for Analog Circuits: Electrical-Driven Hotspot Detection, Analysis, and Correction Flow. IEEE Trans. Very Large Scale Integr. Syst. 21(5): 807-820 (2013) - 2012
- [j4]Mohamed Dessouky:
Dr. Mohamed Sadek Eid 1938-2012. Comput. Ind. Eng. 63(4): 1243 (2012) - 2009
- [j3]Amr Amin Hafez, Mohamed Dessouky, Hani F. Ragai:
Design of a low-power ZigBee receiver front-end for wireless sensors. Microelectron. J. 40(11): 1561-1568 (2009) - 2005
- [j2]Chrissoleon T. Papadopoulos, Eddie O'Kelly, Mohamed Dessouky:
Forward. Comput. Ind. Eng. 48(4): 679-680 (2005) - 2001
- [j1]Mohamed Dessouky, Andreas Kaiser:
Very low-voltage digital-audio ΔΣ modulator with 88-dB dynamic range using local switch bootstrapping. IEEE J. Solid State Circuits 36(3): 349-355 (2001)
Conference and Workshop Papers
- 2023
- [c87]Nada Nader, Mohamed Dessouky, Bassant Abdelhamid:
CLRGAN: Compressed Learning and Reconstruction Using GAN for Alzheimer's Disease. NILES 2023: 327-332 - 2022
- [c86]Amr Farouk, Ahmed Naguib, Islam Mostafa, Mohamed Dessouky:
Direct Digital Frequency Synthesizer Modeling with a Re-configurable DAC Evaluation for Electrochemical Impedance Spectroscopy. IEEE SENSORS 2022: 1-4 - [c85]Marco A. Saif, Mohamed Dessouky, Hassan Aboushady:
Common mode control loop for current mode logic-based circuits in FD-SOI technology. ISCAS 2022: 1132-1133 - [c84]Marco A. Saif, Alhassan Sayed, Michel Vasilevski, Mohamed Dessouky, Hassan Aboushady:
Systematic Design For Multistage Feed-forward Op-amp For High-Speed Continuous-Time ∑Δ ADCs. ISCAS 2022: 3219-3223 - [c83]Abdelrahman G. Habib, Mohamed Dessouky:
A General Algorithm for Loop-gain and TDC-resolution Optimization in an ADPLL with a 2-bit TDC Phase detector. SOCC 2022: 1-6 - 2021
- [c82]Marco A. Saif, Mohamed Dessouky, Hassan Aboushady:
A 6.4 GHz Continuous-Time ΣΔ ADC Using Body-Biased Feedforward Op-Amps in 28nm-FDSOI. MWSCAS 2021: 301-304 - [c81]Sarah Hesham, Mohamed Shalan, M. Watheq El-Kharashi, Mohamed Dessouky:
Digital ASIC Implementation of RISC-V: OpenLane and Commercial Approaches in Comparison. MWSCAS 2021: 498-502 - 2020
- [c80]Hossam O. Ahmed, Maged Ghoneima, Mohamed Dessouky:
Reconfigurable Systolic-based Pyramidal Neuron Block for CNN Acceleration on FPGA. ICSET 2020: 179-184 - [c79]Dina Medhat, Mohamed Dessouky, DiaaEldin Khalil:
Electrostatic Discharge Physical Verification of 2.5D/3D Integrated Circuits. ISQED 2020: 383-388 - [c78]Samar M. Hussein Shukry, Amr Talaat Abdel-Hamid, Mohamed Dessouky:
Fragile HFSM Watermarking Hardware IP Authentication CAD Tool. MOCAST 2020: 1-6 - [c77]Ahmad El-Shiekh, Ahmad El-Alfy, Ahmad Ammar, Mohamed Gamal, Mohamed Dessouky, Khaled Salah, Hassan Mostafa:
IPXACT-Based RTL Generation Tool. NILES 2020: 71-74 - 2019
- [c76]Alaa Hussien, Samar Mohamed, Mohamed Soliman, Hager Mostafa, Khaled Salah, Mohamed Dessouky, Hassan Mostafa:
Development of a Generic and a Reconfigurable UVM-Based Verification Environment for SoC Buses. ICM 2019: 195-198 - [c75]Ahmed ElShater, Calvin Y. Lee, Praveen Kumar Venkatachala, Mohamed Dessouky, Un-Ku Moon:
Gm-Free Assisted Opamp Technique for Continuous Time Delta-Sigma Modulators. ISCAS 2019: 1-4 - [c74]Moaz Mostafa, Ahmed M. Zaki, M. Watheq El-Kharashi, Mohamed Dessouky:
A Dynamic Power Reduction Methodology based on Reducing Output Transition Rate. PACRIM 2019: 1-6 - [c73]Sherif Ahmed Mohamed, Mohamed Dessouky, Fady Atef Naguib, Soha Hamed:
Analog Layout Placement Based on Unit Elements and Routing Channel Estimation. SMACD 2019: 29-32 - [c72]Mina Louis, Mohamed Dessouky, Ashraf Salem:
PLL Real Number Modeling in SystemVerilog. SMACD 2019: 257-260 - 2018
- [c71]Hossam O. Ahmed, Maged Ghoneima, Mohamed Dessouky:
Pyramidal Neuron Architectures for AcceleratingDeep Neural Networks on FPGA. AHS 2018: 104-111 - [c70]Samar M. Hussein Shukry, Amr Talaat Abdel-Hamid, Mohamed Dessouky:
Affirming Hardware Design Authenticity Using Fragile IP Watermarking. ICCA 2018: 341-347 - [c69]Hossam O. Ahmed, Maged Ghoneima, Mohamed Dessouky:
High-Speed 2D Parallel MAC Unit Hardware Accelerator for Convolutional Neural Network. IntelliSys (1) 2018: 655-663 - [c68]Islam Nashaat, Inas Mohammed, Mohamed Dessouky, Hazem Said:
Mismatch-Aware Placement of Device Arrays Using Genetic Optimization. SMACD 2018: 177-180 - 2017
- [c67]Shohdy Abdelkader, Alaa ELRouby, Mohamed Dessouky:
Power pre-characterized meshing algorithm for finite element thermal analysis of integrated circuits. DATE 2017: 1293-1296 - [c66]Reem El-Adawi, Mohamed Dessouky:
Monte Carlo general sample classification for rare circuit events using Random Forest. SMACD 2017: 1-4 - [c65]Aya Mohamed, Mohamed Dessouky, Sherif M. Saif:
Analog layout placement retargeting using Satisfiability Modulo Theories. SMACD 2017: 1-4 - 2016
- [c64]Sherif M. Saif, Mohamed Dessouky, M. Watheq El-Kharashi, Hazem M. Abbas, Salwa M. Nassar:
Pareto front analog layout placement using Satisfiability Modulo Theories. DATE 2016: 1411-1416 - [c63]Mohamed Megahed, Mohamed R. M. Rizk, Sameh A. Ibrahim, Mohamed Dessouky:
12-Gb/s low-power voltage-mode driver for multi-standard serial-link applications. ICECS 2016: 101-104 - [c62]Shrouk Shafie, Mona El-Sabagh, Mohamed Dessouky, Marwah Shafee, Sherif Hammouda, Hazem Hegazy:
A simple model for on-chip microstrip transmission lines in millimeter wave circuits. ICM 2016: 121-124 - [c61]Islam Nashaat Salah El Din, Mohamed Dessouky, Hazem Said:
Optimally matched current mirror layout pattern generation using genetic optimization. ICM 2016: 145-148 - [c60]Reem El-Adawi, Mohamed Dessouky:
Regression modeling for subset selection in rare-event statistical circuit simulation. IDT 2016: 205-209 - [c59]Khaled El-Kenawy, Mohamed Dessouky:
Stress-aware analog layout devices pattern generation. IDT 2016: 233-238 - [c58]Tarek Ramadan, Eslam Yahya, Mohamed Dessouky, Yehea Ismail:
Accuracy-improved coupling capacitance model for through-silicon via (TSV) arrays using dimensional analysis. ISCAS 2016: 1930-1933 - [c57]Amr B. Darwish, Magdy A. El-Moursy, Mohamed Dessouky:
Transaction Level Power Modeling (TLPM) Methodology. MTV 2016: 61-64 - [c56]Ahmed Emad, Mohamed A. E. Mahmoud, Maged Ghoneima, Mohamed Dessouky:
Modeling and analysis of stretching strain in clamped-clamped beams for energy harvesting. MWSCAS 2016: 1-4 - [c55]Mostafa Shadoufa, Mohamed Mahmoud, Maged Ghoneima, Mohamed Dessouky:
Optimization of the output power of a frequency-up conversion piezoelectric energy harvester. MWSCAS 2016: 1-4 - [c54]Khaled El-Kenawy, Inas Mohammed, Mohamed Dessouky:
Analog layout placement exploiting sub-block shape functions. SMACD 2016: 1-4 - 2015
- [c53]Sherif M. Saif, Mohamed Dessouky, Hazem M. Abbas, M. Watheq El-Kharashi, Salwa M. Nassar:
Analog layout constraints resolution and shape function generation using Satisfiability Modulo Theories. DTIS 2015: 1-6 - [c52]Ahmed Hamza, Sameh Ibrahim, Mohamed El-Nozahi, Mohamed Dessouky:
A wideband 5 GHz digital PLL using a low-power two-step time-to-digital converter. ICECS 2015: 328-331 - [c51]Amgad A. Ghonem, Mostafa F. Farid, Mohamed Dessouky:
Optimal design of 6T SRAM bitcells for ultra low-voltage operation. ICECS 2015: 454-457 - [c50]Mostafa F. Farid, Amgad A. Ghonem, Mohamed Dessouky:
An 8kb SRAM macro in 65nm for ultra-low voltage applications operating from 1.2V to 0.5V. ICECS 2015: 458-461 - [c49]Tarek Ramadan, Eslam Yahya, Mohamed Dessouky, Yehea I. Ismail:
Coupling capacitance extraction in through-silicon via (TSV) arrays. ICECS 2015: 470-473 - [c48]Maged El-Sisi, Mohamed Dessouky:
Procedural analog design automation using building block optimization. ICECS 2015: 474-477 - [c47]Mohannad Elshawy, Mohamed Dessouky:
Incremental layout-aware analog design methodology. ICECS 2015: 486-489 - [c46]Mostafa Shadoufa, Ahmed Emad, Maged Ghoneima, Mohamed A. E. Mahmoud, Mohamed Dessouky:
Structure optimization for efficient AlN piezoelectric energy harvesters. ICECS 2015: 527-530 - [c45]Tamer Farouk, Mohamed M. Elkhatib, Mohamed Dessouky:
A 1V low-power low-noise biopotential amplifier based on flipped voltage follower. ICECS 2015: 539-542 - [c44]Mohamed Tantawy, Rafik Guindi, Mohamed Dessouky, Mohamed Al-Imam:
Parameterized test patterns methodology for layout design rule checking verification. ICECS 2015: 588-591 - [c43]Mahitab F. Eladwy, Sameh A. Ibrahim, Mohamed Dessouky:
A low-temperature-coefficient curvature-compensated bandgap reference with mismatch attenuation. IDT 2015: 44-48 - [c42]Mohammed Harb, Mohamed Dessouky:
A design flow to quantify and limit multiple patterning effects. MWSCAS 2015: 1-4 - [c41]Ahmed Ismail, Sameh Ibrahim, Mohamed Dessouky:
An 8Gbps discrete time linear equalizer in 40nm CMOS technology. MWSCAS 2015: 1-4 - [c40]Ahmed Hamza, Sameh Ibrahim, Mohamed El-Nozahi, Mohamed Dessouky:
A low-power, 9-Bit, 1.2 ps resolution two-step time-to-digital converter in 65 nm CMOS. NEWCAS 2015: 1-4 - [c39]Moaz Mostafa, Mona Safar, M. Watheq El-Kharashi, Mohamed Dessouky:
SystemVerilog assertion debugging: A visualization and pattern matching model. PACRIM 2015: 385-390 - 2014
- [c38]Sherif M. Saif, Mohamed Dessouky, Salwa M. Nassar, Hazem M. Abbas, M. Watheq El-Kharashi, Mohammad Abdulaziz:
Exploiting satisfiability modulo theories for analog layout automation. IDT 2014: 1-6 - [c37]Mohannad Elshawy, Mohamed Dessouky, Sherif M. Saif, Sherif Mansour, Ed Petrus:
Multi-device layout templates for nanometer analog design. IDT 2014: 83-88 - [c36]Mohamed Sallam, M. Watheq El-Kharashi, Mohamed Dessouky:
The Connection-Then-Credit Flow Control Protocol for Networks-On-Chips: Implementation Trade-offs. NoCArc@MICRO 2014: 25-30 - [c35]Moaz Mostafa, Mona Safar, M. Watheq El-Kharashi, Mohamed Dessouky:
System Verilog Assertion Debugging Based on Visualization, Simulation Results, and Mutation. MTV 2014: 55-60 - [c34]Ahmed Ismail, Sameh Ibrahim, Mohamed Dessouky:
A 8 Gbps 0.67mW 1 tap current integrating DFE in 40nm CMOS. MWSCAS 2014: 81-84 - [c33]Kareem Habib, Mona Safar, Mohamed Dessouky, Ashraf Salem:
Don't cares based dynamic test vector compaction in SAT-ATPG. MWSCAS 2014: 213-217 - 2013
- [c32]Waleed El-Halwagy, Mohamed Dessouky, Hassan El-Ghitani:
A programmable 8-bit, 10MHz BW, 6.8mW, 200MSample/sec, 70dB SNDR VCO-based ADC using SC feedback for VCO linearization. ICECS 2013: 157-160 - [c31]Waleed El-Halwagy, Mohamed Dessouky, Hassan El-Ghitani:
Analysis and design of analog-based voltage controlled oscillator linearization technique. IDT 2013: 1-6 - 2012
- [c30]Ahmed Hamza, Andrew Philip, Mohamed Ali, Mohamed Dessouky, Mohamed Kassem:
Web-based analog design using tradeoff charts. ICECS 2012: 13-16 - [c29]Armia Mrassy, Mohamed Dessouky:
Channel mismatch background calibration for pipelined time interleaved ADCs. ICECS 2012: 609-612 - [c28]Ahmed Zein, Amr Tarek, Mohamed Bahr, Mohamed Dessouky, Haitham Eissa, Ahmed Ramadan, Amr Tosson:
Layout stress and proximity aware analog design methodology. ICECS 2012: 633-636 - [c27]Ahmed Arafa, Hend Wagieh, Rami Fathy Salem, John Ferguson, Doug Morgan, Mohab H. Anis, Mohamed Dessouky:
Schematic-driven physical verification: Fully automated solution for analog IC design. SoCC 2012: 260-264 - 2011
- [c26]Rami Fathy Salem, Ahmed Arafa, Sherif Hany, Abdelrahman ElMously, Haitham Eissa, Mohamed Dessouky, David Nairn, Mohab H. Anis:
An electrical-aware parametric DFM solution for analog circuits. IDT 2011: 68-73 - [c25]Khaled Sakr, Mohamed Dessouky, Abd-El Halim Zekry:
Design of tunable continuous-time quadrature bandpass delta-sigma modulators. IDT 2011: 99-103 - [c24]Rami F. Salem, Ahmed Arafa, Sherif Hany, Abdelrahman ElMously, Haitham Eissa, Mohamed Dessouky, David Nairn, Mohab H. Anis:
A parametric DFM solution for analog circuits: Electrical driven hot spot detection, analysis and correction flow. SoCC 2011: 231-236 - 2010
- [c23]Rami F. Salem, Abdelrahman ElMously, Haitham Eissa, Mohamed Dessouky, Mohab H. Anis:
A DFM tool for analyzing lithography and stress effects on standard cells and critical path performance in 45nm digital designs. IDT 2010: 13-17 - [c22]Hussein Adel, Mohamed Dessouky, Marie-Minerve Louërat, Hugo Gicquel, Hisham Haddara:
Foreground digital calibration of non-linear errors in pipelined A/D converters. ISCAS 2010: 569-572 - [c21]Mohamed Mohsen, Mohamed Dessouky:
13-bit 205 MS/s time-interleaved pipelined ADC with digital background calibration. ISCAS 2010: 1727-1730 - [c20]Haytham Ashour, Mohamed Dessouky, Khaled Sharaf:
Extended division range 2/3 chain frequency divider with dynamic control word. ISCAS 2010: 4141-4144 - 2009
- [c19]Mohamed Dessouky:
Analog design migration: An overview. ICECS 2009: 992-995 - [c18]Shohdy Abdelkader, M. Omar, Mohamed Dessouky:
1-V, High Speed, Low Leakage CMOS CML Multiplexer. ISCAS 2009: 3154-3157 - 2008
- [c17]Ahmad Al-Kashef, Manal M. Zaky, Mohamed Dessouky, Hassan El-Ghitani:
A Case-Based Reasoning Approach for the Automatic Generation of VHDL-AMS Models. BMAS 2008: 100-105 - 2006
- [c16]Sherif Hammouda, Hazem Said, Mohamed Dessouky, Mohamed Tawfik, Quang Nguyen, Wael M. Badawy, Hazem M. Abbas, Hussein I. Shahein:
Chameleon ART: a non-optimization based analog design migration framework. DAC 2006: 885-888 - 2005
- [c15]DiaaEldin Khalil, Mohamed Dessouky, Vincent Bourguet, Marie-Minerve Louërat, Andreia Cathelin, Hani F. Ragai:
Evaluation of Capacitor Ratios in Automated Accurate Common-Centroid Capacitor Arrays. ISQED 2005: 143-147 - 2004
- [c14]Sherif Hammouda, Mohamed Dessouky, Mohamed Tawfik, Wael M. Badawy:
Analog IP migration using design knowledge extraction. CICC 2004: 333-336 - [c13]Sherif Hammouda, Mohamed Dessouky, Mohamed Tawfik, Wael M. Badawy:
A Fully Automated Approach for Analog Circuit Reuse. IWSOC 2004: 237-240 - 2003
- [c12]Ramy Iskander, Mohamed Dessouky, Maie Aly, Mahmoud Magdy, Noha Hassan, Noha Soliman, Sami Moussa:
Synthesis of CMOS Analog Cells Using AMIGO. DATE 2003: 20297-20302 - 2002
- [c11]Mohamed Dessouky, DiaaEldin Sayed:
Automatic Generation of Common-Centroid Capacitor Arrays with Arbitrary Capacitor Ratio. DATE 2002: 576-580 - 2001
- [c10]Mohamed Dessouky, Andreas Kaiser, Marie-Minerve Louërat, Alain Greiner:
Analog design for reuse - case study: very low-voltage sigma-delta modulator. DATE 2001: 353-360 - [c9]Mohamed Dessouky, Marie-Minerve Louërat, Andreas Kaiser:
Switch sizing for very low-voltage switched-capacitor circuits. ICECS 2001: 1549-1552 - 2000
- [c8]Mohamed Dessouky, Andreas Kaiser:
A 1 V 1 mW digital-audio ΔΣ modulator with 88 dB dynamic range using local switch bootstrapping. CICC 2000: 13-16 - [c7]Mohamed Dessouky, Marie-Minerve Louërat, Jacky Porte:
Layout-Oriented Synthesis of High Performance Analog Circuits. DATE 2000: 53-57 - [c6]Mohamed Dessouky, Andreas Kaiser:
Very low-voltage fully differential amplifier for switched-capacitor applications. ISCAS 2000: 441-444 - [c5]Mohamed Dessouky, Marie-Minerve Louërat:
A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits. ISQED 2000: 291-298 - 1999
- [c4]Abdelhakim Khouas, Mohamed Dessouky, Anne Derieux:
Optimized Statistical Analog Fault Simulation. Asian Test Symposium 1999: 227-232 - [c3]Hassan Aboushady, Mohamed Dessouky, Elizabeth de Lira Mendes, Patrick Loumeau:
A third-order current-mode continuous-time ΣΔ modulator. ICECS 1999: 1697-1700 - [c2]Mohamed Dessouky, Andreas Kaiser:
Rail-to-rail operation of very low voltage CMOS switched-capacitor circuits. ISCAS (2) 1999: 144-147 - [c1]Hassan Aboushady, Elizabeth de Lira Mendes, Mohamed Dessouky, Patrick Loumeau:
A current-mode continuous-time Sigma-Delta modulator with delayed return-to-zero feedback. ISCAS (2) 1999: 360-363
Coauthor Index
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