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Journal Articles
- 2022
[j4]Shenggao Li
, Hua Chen, Wei Zhang, Patrick M. Wensing:
A Geometric Sufficient Condition for Contact Wrench Feasibility. IEEE Robotics Autom. Lett. 7(4): 12411-12418 (2022)- 2015
- [j3]Stefan Rusu, Harry Muljono, David Ayers, Simon M. Tam, Wei Chen, Aaron Martin, Shenggao Li, Sujal Vora, Raj Varada, Eddie Wang:
A 22 nm 15-Core Enterprise Xeon® Processor Family. IEEE J. Solid State Circuits 50(1): 35-48 (2015) - 2003
- [j2]Shenggao Li, Issy Kipnis, Mohammed Ismail:
A 10-GHz CMOS quadrature LC-VCO for multirate optical applications. IEEE J. Solid State Circuits 38(10): 1626-1634 (2003) - 1999
- [j1]Shenggao Li, Brian Okoon, Mona Mostafa Hella, Mohammed Ismail, Maya Rubeiz:
The Implementation of a VHDL-AMS to SPICE Converter. J. VLSI Signal Process. 22(2): 113-121 (1999)
Conference and Workshop Papers
- 2024
- [c10]Chu-En Hsia, Chin-Ho Chang, Yung-Shun Chen, Po-Yu Lai, Ching Lin Jen, Yung-Chow Peng, Shenggao Li:
Current Mirrors with Tapered Stacked-Gates for Area Saving or Noise Improvement in 3nm FinFET Process. VLSI Technology and Circuits 2024: 1-2 - [c9]Mu-Shan Lin, Chien-Chun Tsai, Shenggao Li, Tze-Chiang Huang, Wen-Hung Huang, Kate Huang, Yu-Chi Chen, Alex Liu, Yu-Jie Huang, Jimmy Wang, Shu-Chun Yang, Nai-Chen Cheng, Chao-Chieh Li, Hsin-Hung Kuo, Wei-Chih Chen, Chin-Hua Wen, Kevin Lin, Po-Yi Huang, Kenny Cheng-Hsiang Hsieh, Frank Lee:
A 0.296pJ/bit 17.9Tb/s/mm2 Die-to-Die Link in 5nm/6nm FinFET on a 9μm-Pitch 3D Package Achieving 10.24Tb/s Bandwidth at 16Gb/s PAM-4. VLSI Technology and Circuits 2024: 1-2 - 2022
- [c8]Shenggao Li, Mu-Shan Lin, Wei-Chih Chen, Chien-Chun Tsai:
Interconnect in the Era of 3DIC. CICC 2022: 1-5 - 2021
- [c7]Shenggao Li, Chien-Chun Tsai, Eric Soenen, Frank J. C. Lee, Cheng-Hsiang Hsieh:
Energy Efficient Design Through Design and Technology Co-Optimization Near the Finish Line of CMOS Scaling. A-SSCC 2021: 1-3 - [c6]Shenggao Li, Hua Chen, Wei Zhang, Patrick M. Wensing:
Quadruped Robot Hopping on Two Legs. IROS 2021: 7448-7455 - 2018
- [c5]Shenggao Li, Fulvio Spagna, Ji Chen, Xiaoqing Wang, Luke Tong, Sujatha Gowder, Wenyan Jia, Roan Nicholson, Sitaraman Iyer, Rui Song, Lily Li, Meng-hung Chen, Amanda Tran, Michael De Vita, Deepar Govindrajan, Marcus Pasquarella, Dave Bradley, Frank Verdico, Matt Duwe, Eric Lee, Michelle Wigton:
A Power and Area Efficient 2.5-16 Gbps Gen4 PCIe PHY in 10nm FinFET CMOS. A-SSCC 2018: 5-8 - 2014
- [c4]Stefan Rusu, Harry Muljono, David Ayers, Simon M. Tam, Wei Chen, Aaron Martin, Shenggao Li, Sujal Vora, Raj Varada, Eddie Wang:
5.4 Ivytown: A 22nm 15-core enterprise Xeon® processor family. ISSCC 2014: 102-103 - 2011
- [c3]Shenggao Li, Ashwin Krishnakumar, Edward Helder, Roan Nicholson, Vivian Jia:
Clock generation for a 32nm server processor with scalable cores. ISSCC 2011: 82-83 - 1999
- [c2]Shenggao Li, Yue Wu, Chunlei Shi, Mohammed Ismail:
Optimizing Mixer Noise Performance: A 2.4 GHz Gilbert Downconversion Mixer for W-CDMA Application. VLSI 1999: 1-10 - [c1]Yue Wu, Shenggao Li, Mohammed Ismail, Håkan K. Olsson:
A Lower Power CMOS Micromixer for GHz Wireless Applications. VLSI 1999: 35-46
Coauthor Index
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