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ORCIDSebastian Höppner
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2020 – today
- 2023
[c39]Hector A. Gonzalez, Bernhard Vogginger, Chen Liu, Marco Stolba, Florian Kelber, Heiner Bauer, Stefan Hänzsche, Stefan Scholze, Marc Berthel, Tim Rosmeisl, Liyuan Guo, Dennis Walter, Piash Das, Khaleelulla Khan Nazeer
, Tilo Schubert, Sebastian Höppner, Christian Mayr:
A 12-ADC 25-Core Smart MPSoC Using ABB in 22FDX for 77GHz MIMO Radars at 52.6mW Average Power. CICC 2023: 1-2- [c38]Heiner Bauer, Marco Stolba, Stefan Scholze, Dennis Walter, Christian Mayr, Alexander Oefelein, Sebastian Höppner, André Scharfe, Florian Schraut, Holger Eisenreich:
A RISC-V MCU with adaptive reverse body bias and ultra-low-power retention mode in 22 nm FD-SOI. ISOCC 2023: 67-68 - [c37]Franz Marcus Schüffny, Stefan Hänzsche, Stephan Henker, Seyed Mohammad Ali Zeinolabedin, Stefan Scholze, Sebastian Höppner, Richard Miru George, Christian Mayr:
A 3.3V Saturation-Aware Neurostimulator with Reset Functionality in 22 nm FDSOI. NEWCAS 2023: 1-5 - [i10]Heiner Bauer, Marco Stolba, Stefan Scholze, Dennis Walter, Christian Mayr, Alexander Oefelein, Sebastian Höppner, André Scharfe, Florian Schraut, Holger Eisenreich:
A RISC-V MCU with adaptive reverse body bias and ultra-low-power retention mode in 22 nm FD-SOI. CoRR abs/2310.09094 (2023) - 2022
- [j18]Seyed Mohammad Ali Zeinolabedin, Franz Marcus Schüffny, Richard George, Florian Kelber, Heiner Bauer, Stefan Scholze, Stefan Hänzsche, Marco Stolba, Andreas Dixius, Georg Ellguth, Dennis Walter, Sebastian Höppner, Christian Mayr:
A 16-Channel Fully Configurable Neural SoC With 1.52 $\mu$W/Ch Signal Acquisition, 2.79 $\mu$W/Ch Real-Time Spike Classifier, and 1.79 TOPS/W Deep Neural Network Accelerator in 22 nm FDSOI. IEEE Trans. Biomed. Circuits Syst. 16(1): 94-107 (2022) - [j17]Franz Marcus Schüffny, Sebastian Höppner, Stefan Hänzsche, Richard Miru George, Seyed Mohammad Ali Zeinolabedin, Christian Mayr:
An Ultra-Low Area Digital-Assisted Neuro Recording System in 22nm FDSOI Technology. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 739-743 (2022) - [c36]Matthias Jobst, Johannes Partzsch, Chen Liu, Liyuan Guo, Dennis Walter, Saif-Ur Rehman, Stefan Scholze, Sebastian Höppner, Christian Mayr:
ZEN: A flexible energy-efficient hardware classifier exploiting temporal sparsity in ECG data. AICAS 2022: 214-217 - [c35]Mattis Hasler, Sebastian Haas, Robert Wittig, Stefan Scholze, Andreas Dixius, Sebastian Höppner, Gerhard P. Fettweis, Christian Mayr:
A Random Linear Network Coding Platform MPSoC Designed in 22nm FDSOI. ISVLSI 2022: 217-222 - [c34]Franz Marcus Schüffny, Stefan Hänzsche, Marc Berthel, Seyed Mohammad Ali Zeinolabedin, Stefan Scholze, Sebastian Höppner, Richard Miru George, Christian Mayr:
A Single Battery Supply Power Concept for a Neuro Recording and Flexible Processing Chain in 22 nm. NorCAS 2022: 1-5 - [c33]Franz Marcus Schüffny, Sebastian Höppner, Seyed Mohammad Ali Zeinolabedin, Richard Miru George, Christian Mayr:
How to design an input stage for neural recording system in 22 nm FDSOI. PRIME 2022: 297-300 - 2021
- [j16]Yexin Yan, Terrence C. Stewart, Xuan Choo, Bernhard Vogginger, Johannes Partzsch, Sebastian Höppner, Florian Kelber, Chris Eliasmith, Steve B. Furber, Christian Mayr:
Comparing Loihi with a SpiNNaker 2 prototype on low-latency keyword spotting and adaptive robotic control. Neuromorph. Comput. Eng. 1(1): 14002 (2021) - [j15]Hector A. Gonzalez, Richard George, Shahzad Muzaffar, Javier Acevedo, Sebastian Höppner, Christian Mayr, Jerald Yoo, Frank H. P. Fitzek, Ibrahim M. Elfadel:
Hardware Acceleration of EEG-Based Emotion Classification Systems: A Comprehensive Survey. IEEE Trans. Biomed. Circuits Syst. 15(3): 412-442 (2021) - [j14]Heiner Bauer, Sebastian Höppner, Chris Paul Iatrou, Zohra Charania, Stephan Hartmann, Saif-Ur Rehman, Andreas Dixius, Georg Ellguth, Dennis Walter, Johannes Uhlig, Felix Neumärker, Marc Berthel, Marco Stolba, Florian Kelber, Leon Urbas, Christian Mayr:
Hardware Implementation of an OPC UA Server for Industrial Field Devices. IEEE Trans. Very Large Scale Integr. Syst. 29(11): 1998-2002 (2021) - [c32]Zohra Charania, Chris Paul Iatrou, Valentin Khaydarov, Richard Jacob, Robert Wittig, Heiner Bauer, Sebastian Höppner, René Bachmann, Philipp Bauer, Hendrik Deckert, Christian Mayr, Gerhard P. Fettweis, Leon Urbas:
Opportunities For A Hardware-Based OPC UA Server Implementation In Industry 4.0. IECON 2021: 1-6 - [c31]Hector A. Gonzalez, Florian Kelber, Marco Stolba, Chen Liu, Bernhard Vogginger, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Christian Mayr:
Ultra-High Compression of Twiddle Factor ROMs in Multi-Core DSP for FMCW Radars. ISCAS 2021: 1-5 - [i9]Sebastian Höppner, Yexin Yan, Andreas Dixius, Stefan Scholze, Johannes Partzsch, Marco Stolba, Florian Kelber, Bernhard Vogginger, Felix Neumärker, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Thomas Hocker, Dennis Walter, Gengting Liu, Jim D. Garside, Steve B. Furber, Christian Mayr:
The SpiNNaker 2 Processing Element Architecture for Hybrid Digital Neuromorphic Computing. CoRR abs/2103.08392 (2021) - [i8]Heiner Bauer, Sebastian Höppner, Chris Paul Iatrou, Zohra Charania, Stephan Hartmann, Saif-Ur Rehman, Andreas Dixius, Georg Ellguth, Dennis Walter, Johannes Uhlig, Felix Neumärker, Marc Berthel, Marco Stolba, Florian Kelber, Leon Urbas, Christian Mayr:
Hardware Implementation of an OPC UA Server for Industrial Field Devices. CoRR abs/2105.00789 (2021) - 2020
- [j13]Sebastian Höppner, Holger Eisenreich, Dennis Walter, André Scharfe, Alexander Oefelein, Florian Schraut, Jörg Schreiter, Thorsten Riedel, Heiner Bauer, Robert Niebsch, Stephan Scherzer, Thomas Hocker, Stefan Scholze, Stephan Henker, Matthias Nossmann, Ulrich Hensel, Helmut Prengel:
Adaptive Body Bias Aware Implementation for Ultra-Low-Voltage Designs in 22FDX Technology. IEEE Trans. Circuits Syst. II Express Briefs 67-II(10): 2159-2163 (2020) - [j12]Johannes Partzsch, Christian Mayr, Massimiliano Giulioni, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Paolo Del Giudice, René Schüffny:
Mean Field Approach for Configuring Population Dynamics on a Biohybrid Neuromorphic System. J. Signal Process. Syst. 92(11): 1303-1321 (2020) - [c30]Dennis Walter, André Scharfe, Alexander Oefelein, Florian Schraut, Heiner Bauer, Farkas Csaszar, Robert Niebsch, Jörg Schreiter, Holger Eisenreich, Sebastian Höppner:
A 0.55V 6.3uW/MHz Arm Cortex-M4 MCU with Adaptive Reverse Body Bias and Single Rail SRAM. COOL CHIPS 2020: 1-3 - [i7]Yexin Yan, Terrence C. Stewart, Xuan Choo, Bernhard Vogginger, Johannes Partzsch, Sebastian Höppner, Florian Kelber, Chris Eliasmith, Steve B. Furber, Christian Mayr:
Low-Power Low-Latency Keyword Spotting and Adaptive Control with a SpiNNaker 2 Prototype and Comparison with Loihi. CoRR abs/2009.08921 (2020)
2010 – 2019
- 2019
- [j11]Yexin Yan, David Kappel, Felix Neumärker, Johannes Partzsch, Bernhard Vogginger, Sebastian Höppner, Steve B. Furber, Wolfgang Maass, Robert Legenstein, Christian Mayr:
Efficient Reward-Based Structural Plasticity on a SpiNNaker 2 Prototype. IEEE Trans. Biomed. Circuits Syst. 13(3): 579-591 (2019) - [j10]Sebastian Höppner, Bernhard Vogginger, Yexin Yan, Andreas Dixius, Stefan Scholze, Johannes Partzsch, Felix Neumärker, Stephan Hartmann, Stefan Schiefer, Georg Ellguth, Love Cederstroem, Luis A. Plana, Jim D. Garside, Steve B. Furber, Christian Mayr:
Dynamic Power Management for Neuromorphic Many-Core Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(8): 2973-2986 (2019) - [c29]Sebastian Höppner, Jörg Schreiter, Robert Niebsch, Stephan Scherzer, Ulrich Hensel, Jörg Winkler, Mario Orgis, Holger Eisenreich, Dennis Walter, Uwe Steeb, André Scharfe, Clifford Dmello, Robert Sinkwitz, Heiner Bauer, Alexander Oefelein, Florian Schraut:
How to Achieve World-Leading Energy Efficiency using 22FDX with Adaptive Body Biasing on an Arm Cortex-M4 IoT SoC. ESSDERC 2019: 66-69 - [c28]Chris Paul Iatrou, Heiner Bauer, Markus Graube, Sebastian Höppner, Julian Rahm, Leon Urbas:
Hard Real-Time Capable OPC UA Server as Hardware Peripheral for Single Chip IoT Systems. ETFA 2019: 1631-1634 - [c27]Florian Schraut, Holger Eisenreich, Sebastian Höppner, Christian Mayr:
A Fast Lock-In Ultra Low-Voltage ADPLL Clock Generator with Adaptive Body Biasing in 22nm FDSOI Technology. ISCAS 2019: 1-5 - [c26]Franz Marcus Schüffny, Sebastian Höppner, Alexander Oefelein, Christian Mayr:
A Multi-Bit PFD Architecture for ADPLLs with Built-In Jitter Self-Calibration. ISCAS 2019: 1-5 - [c25]Florian Protze, Martin Kreißig, Frank Ellinger, Sebastian Höppner, Stephan Hartmann, Stefan Hänzsche, Stefan Scholze, Georg Ellguth, Christian Mayr:
Performance Analysis of a Comparator Based Mixed-Signal Control Loop in 28 nm CMOS. VLSI-SoC 2019: 155-158 - [i6]Yexin Yan, David Kappel, Felix Neumärker, Johannes Partzsch, Bernhard Vogginger, Sebastian Höppner, Steve B. Furber, Wolfgang Maass, Robert Legenstein, Christian Mayr:
Efficient Reward-Based Structural Plasticity on a SpiNNaker 2 Prototype. CoRR abs/1903.08500 (2019) - [i5]Sebastian Höppner, Bernhard Vogginger, Yexin Yan, Andreas Dixius, Stefan Scholze, Johannes Partzsch, Felix Neumaerker, Stephan Hartmann, Stefan Schiefer, Georg Ellguth, Love Cederstroem, Luis A. Plana, Jim D. Garside, Steve B. Furber, Christian Mayr:
Dynamic Power Management for Neuromorphic Many-Core Systems. CoRR abs/1903.08941 (2019) - [i4]Johannes Partzsch, Christian Mayr, Massimiliano Giulioni, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Paolo Del Giudice, René Schüffny:
Mean Field Approach for Configuring Population Dynamics on a Biohybrid Neuromorphic System. CoRR abs/1904.10389 (2019) - [i3]Christian Mayr, Sebastian Höppner, Steve B. Furber:
SpiNNaker 2: A 10 Million Core Processor System for Brain Simulation and Machine Learning. CoRR abs/1911.02385 (2019) - 2018
- [c24]Mantas Mikaitis, David R. Lester, Delong Shang, Steve B. Furber, Gengting Liu, Jim D. Garside, Stefan Scholze, Sebastian Höppner, Andreas Dixius:
Approximate Fixed-Point Elementary Function Accelerator for the SpiNNaker-2 Neuromorphic Chip. ARITH 2018: 37-44 - 2017
- [j9]Sebastian Haas, Stefan Scholze, Sebastian Höppner, Annett Ungethüm, Christian Mayr, René Schüffny, Wolfgang Lehner, Gerhard P. Fettweis:
Application-specific architectures for energy-efficient database query processing and optimization. Microprocess. Microsystems 55: 119-130 (2017) - [c23]Sebastian Haas, Tobias Seifert, Benedikt Nöthen, Stefan Scholze, Sebastian Höppner, Andreas Dixius, Esther Pérez Adeva, Thomas R. Augustin, Friedrich Pauls, Sadia Moriam, Mattis Hasler, Erik Fischer, Yong Chen, Emil Matús, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Love Cederström, Dennis Walter, Stephan Henker, Stefan Hänzsche, Johannes Uhlig, Holger Eisenreich, Stefan Weithoffer, Norbert Wehn, René Schüffny, Christian Mayr, Gerhard P. Fettweis:
A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications. DAC 2017: 47:1-47:6 - [c22]Sebastian Höppner, Yexin Yan, Bernhard Vogginger, Andreas Dixius, Johannes Partzsch, Prateek Joshi, Felix Neumärker, Stephan Hartmann, Stefan Schiefer, Stefan Scholze, Georg Ellguth, Love Cederstroem, Matthias Eberlein, Christian Mayr, Steve Temple, Luis A. Plana, Jim D. Garside, Simon Davidson, David R. Lester, Steve B. Furber:
Live demonstration: Dynamic voltage and frequency scaling for neuromorphic many-core systems. ISCAS 2017: 1 - [c21]Sebastian Höppner, Yexin Yan, Bernhard Vogginger, Andreas Dixius, Johannes Partzsch, Felix Neumärker, Stephan Hartmann, Stefan Schiefer, Stefan Scholze, Georg Ellguth, Love Cederstroem, Matthias Eberlein, Christian Mayr, Steve Temple, Luis A. Plana, Jim D. Garside, Simon Davidson, David R. Lester, Steve B. Furber:
Dynamic voltage and frequency scaling for neuromorphic many-core systems. ISCAS 2017: 1-4 - [c20]Johannes Partzsch, Sebastian Höppner, Matthias Eberlein, René Schüffny, Christian Mayr, David R. Lester, Steve B. Furber:
A fixed point exponential function accelerator for a neuromorphic many-core system. ISCAS 2017: 1-4 - [c19]Heiner Bauer, Sebastian Höppner, Johannes Partzsch, Dennis Walter, Christian Mayr, Florian Schraut, Holger Eisenreich:
Exploration of FPGA architectures for tight coupled accelerators in a 22nm FDSOI technology. NORCAS 2017: 1-6 - 2016
- [j8]Christian Mayr, Johannes Partzsch, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny:
A Biological-Realtime Neuromorphic System in 28 nm CMOS Using Low-Leakage Switched Capacitor Circuits. IEEE Trans. Biomed. Circuits Syst. 10(1): 243-254 (2016) - [j7]Sebastian Höppner, Johannes Partzsch, Johannes Neumann, René Schüffny, Christian Mayr:
A Calibration Technique for Bang-Bang ADPLLs Using Jitter Distribution Monitoring. IEEE Trans. Very Large Scale Integr. Syst. 24(12): 3548-3552 (2016) - [c18]Sebastian Haas, Oliver Arnold, Benedikt Nöthen, Stefan Scholze, Georg Ellguth, Andreas Dixius, Sebastian Höppner, Stefan Schiefer, Stephan Hartmann, Stephan Henker, Thomas Hocker, Jörg Schreiter, Holger Eisenreich, Jens-Uwe Schlüßler, Dennis Walter, Tobias Seifert, Friedrich Pauls, Mattis Hasler, Yong Chen, Hermann Hensel, Sadia Moriam, Emil Matús, Christian Mayr, René Schüffny, Gerhard P. Fettweis:
An MPSoC for energy-efficient database query processing. DAC 2016: 112:1-112:6 - [c17]Sebastian Haas, Oliver Arnold, Stefan Scholze, Sebastian Höppner, Georg Ellguth, Andreas Dixius, Annett Ungethüm, Eric Mier, Benedikt Noethen, Emil Matús, Stefan Schiefer, Love Cederstroem, Fabian Pilz, Christian Mayr, René Schüffny, Wolfgang Lehner, Gerhard P. Fettweis:
A database accelerator for energy-efficient query processing and optimization. NORCAS 2016: 1-5 - [c16]Felix Neumärker, Sebastian Höppner, Andreas Dixius, Christian Mayr:
True random number generation from bang-bang ADPLL jitter. NORCAS 2016: 1-5 - 2015
- [j6]Sebastian Höppner, Dennis Walter, Thomas Hocker, Stephan Henker, Stefan Hänzsche, Daniel Sausner, Georg Ellguth, Jens-Uwe Schluessler, Holger Eisenreich, René Schüffny:
An Energy Efficient Multi-Gbit/s NoC Transceiver Architecture With Combined AC/DC Drivers and Stoppable Clocking in 65 nm and 28 nm CMOS. IEEE J. Solid State Circuits 50(3): 749-762 (2015) - [c15]Sebastian Höppner, Stefan Hänzsche, Stefan Scholze, René Schüffny:
An all-digital PWM generator with 62.5ps resolution in 28nm CMOS technology. ISCAS 2015: 1738-1741 - [c14]Andreas Dixius, Dennis Walter, Sebastian Höppner, Holger Eisenreich, René Schüffny:
A deep-submicron CMOS flow for general-purpose timing-detection insertion. MIXDES 2015: 248-253 - 2014
- [j5]Stefan Hänzsche, Sebastian Höppner, Georg Ellguth, René Schüffny:
A 12-b 4-MS/s SAR ADC With Configurable Redundancy in 28-nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 61-II(11): 835-839 (2014) - [c13]Johannes Gorner, Sebastian Höppner, Dennis Walter, Michael Haas, Dirk Plettemeier, René Schüffny:
An energy efficient multi-bit TSV transmitter using capacitive coupling. ICECS 2014: 650-653 - [c12]Sebastian Dietel, Sebastian Höppner, Holger Eisenreich, Georg Ellguth, Stefan Hänzsche, Stephan Henker, René Schüffny, Tim Brauninger, Ulrich Fiedler:
A compact on-chip IR-drop measurement system in 28 nm CMOS technology. ISCAS 2014: 1219-1222 - [c11]Benedikt Noethen, Oliver Arnold, Esther P. Adeva, Tobias Seifert, Erik Fischer, Steffen Kunze, Emil Matús, Gerhard P. Fettweis, Holger Eisenreich, Georg Ellguth, Stephan Hartmann, Sebastian Höppner, Stefan Schiefer, J.-U. Schlusler, Stefan Scholze, Dennis Walter, René Schüffny:
10.7 A 105GOPS 36mm2 heterogeneous SDR MPSoC with energy-aware dynamic scheduling and iterative detection-decoding for 4G in 65nm CMOS. ISSCC 2014: 188-189 - [c10]Stefan Hänzsche, Sebastian Höppner, René Schüffny:
A 10 bit 16 MS/s redundant SAR ADC with flexible window function for a digitally controlled DC-DC converter in 28 nm CMOS. NORCHIP 2014: 1-4 - [i2]Christian Mayr, Johannes Partzsch, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny:
A Biological-Realtime Neuromorphic System in 28 nm CMOS using Low-Leakage Switched Capacitor Circuits. CoRR abs/1412.3233 (2014) - [i1]Marko Noack, Johannes Partzsch, Christian Mayr, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny:
Switched-Capacitor Realization of Presynaptic Short-Term-Plasticity and Stop-Learning Synapses in 28 nm CMOS. CoRR abs/1412.3243 (2014) - 2013
- [j4]Sebastian Höppner, Stefan Hänzsche, Georg Ellguth, Dennis Walter, Holger Eisenreich, René Schüffny:
A Fast-Locking ADPLL With Instantaneous Restart Capability in 28-nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 60-II(11): 741-745 (2013) - [j3]Sebastian Höppner, Holger Eisenreich, Stephan Henker, Dennis Walter, Georg Ellguth, René Schüffny:
A Compact Clock Generator for Heterogeneous GALS MPSoCs in 65-nm CMOS Technology. IEEE Trans. Very Large Scale Integr. Syst. 21(3): 566-570 (2013) - [c9]Sebastian Höppner, Dennis Walter, Holger Eisenreich, Stefan Schiefer, René Schüffny:
Live demonstration: A 90GBit/s serial NoC link over 6mm in 65nm CMOS technology. ECCTD 2013: 1 - 2012
- [j2]Sebastian Höppner, Dennis Walter, Georg Ellguth, René Schüffny:
On-Chip Measurement and Compensation of Timing Imbalances in High-Speed Serial NoC Links. Int. J. Embed. Real Time Commun. Syst. 3(4): 42-56 (2012) - [j1]Stefan Scholze, Holger Eisenreich, Sebastian Höppner, Georg Ellguth, Stephan Henker, Mario Ander, Stefan Hänzsche, Johannes Partzsch, Christian Mayr, René Schüffny:
A 32 GBit/s communication SoC for a waferscale neuromorphic system. Integr. 45(1): 61-75 (2012) - [c8]Sebastian Höppner, Chenming Shao, Holger Eisenreich, Georg Ellguth, Mario Ander, René Schüffny:
A power management architecture for fast per-core DVFS in heterogeneous MPSoCs. ISCAS 2012: 261-264 - [c7]Dennis Walter, Sebastian Höppner, Holger Eisenreich, Georg Ellguth, Stephan Henker, Stefan Hänzsche, René Schüffny, Markus Winter, Gerhard P. Fettweis:
A source-synchronous 90Gb/s capacitively driven serial on-chip link over 6mm in 65nm CMOS. ISSCC 2012: 180-182 - [c6]Markus Winter, Steffen Kunze, Esther P. Adeva, Björn Mennenga, Emil Matús, Gerhard P. Fettweis, Holger Eisenreich, Georg Ellguth, Sebastian Höppner, Stefan Scholze, René Schüffny, Tomoyoshi Kobori:
A 335Mb/s 3.9mm2 65nm CMOS flexible MIMO detection-decoding engine achieving 4G wireless data rates. ISSCC 2012: 216-218 - 2011
- [c5]Volker Boos, Jacek Nowak, Matthias Sylvester, Stephan Henker, Sebastian Höppner, Heiko Grimm, Dominik Krausse, Ralf Sommer:
Strategies for initial sizing and operating point analysis of analog circuits. DATE 2011: 1672-1674 - [c4]Sebastian Höppner, Dennis Walter, Georg Ellguth, René Schüffny:
Mismatch characterization of high-speed NoC links using asynchronous sub-sampling. SoC 2011: 112-115 - 2010
- [c3]Johannes Uhlig, Sebastian Höppner, Georg Ellguth, René Schüffny:
A low-power cell-based-design multi-port register file in 65nm CMOS technology. ISCAS 2010: 313-316 - [c2]Sebastian Höppner, René Schüffny, Zuo-Min Tsai, Huei Wang:
Wide swing signal amplification by SC voltage doubling. ISCAS 2010: 761-764 - [c1]Sebastian Höppner, Dennis Walter, Holger Eisenreich, René Schüffny:
Efficient compensation of delay variations in high-speed network-on-chip data links. SoC 2010: 55-58
Coauthor Index
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