"A Fast Lock-In Ultra Low-Voltage ADPLL Clock Generator with Adaptive Body ..."

Florian Schraut et al. (2019)

> Home

Details and statistics

DOI: 10.1109/ISCAS.2019.8702109

access: closed

type: Conference or Workshop Paper

metadata version: 2022-01-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/iscas/SchrautEHM19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/SchrautEHM19
Florian Schraut, Holger Eisenreich, Sebastian Höppner, Christian Mayr:
A Fast Lock-In Ultra Low-Voltage ADPLL Clock Generator with Adaptive Body Biasing in 22nm FDSOI Technology. ISCAS 2019: 1-5

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.