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2010 – 2019
- 2019
[j7]Hanwool Jeong, Juhyun Park, Seung Chul Song, Seong-Ook Jung
:
Self-Timed Pulsed Latch for Low-Voltage Operation With Reduced Hold Time. IEEE J. Solid State Circuits 54(8): 2304-2315 (2019)- 2018
- [j6]Hanwool Jeong, Tae Woo Oh, Seung Chul Song, Seong-Ook Jung:
Sense-Amplifier-Based Flip-Flop With Transition Completion Detection for Low-Voltage Operation. IEEE Trans. Very Large Scale Integr. Syst. 26(4): 609-620 (2018) - 2017
- [c4]Mustafa Badaroglu, Jeff Xu, John Zhu, Da Yang, Jerry Bao, Seung Chul Song, Peijie Feng, Romain Ritzenthaler, Hans Mertens, Geert Eneman, Naoto Horiguchi, Jeffrey Smith, Suman Datta, David Kohen, Po-Wen Chan, Keagan Chen, P. R. Chidi Chidambaram:
PPAC scaling enablement for 5nm mobile SoC technology. ESSDERC 2017: 240-243 - 2016
- [j5]Younghwi Yang, Hanwool Jeong, Seung Chul Song, Joseph Wang, Geoffrey Yeap, Seong-Ook Jung:
Single Bit-Line 7T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Performance and Energy in 14 nm FinFET Technology. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(7): 1023-1032 (2016) - [c3]Seung Chul Song, J. Xu, D. Yang, K. Rim, P. Feng, Jerry Bao, J. Zhu, Joseph Wang, G. Nallapati, Mustafa Badaroglu, Praneeth Narayanasetti, B. Bucki, Jeff Fischer, Geoffrey Yeap:
Unified Technology Optimization Platform using Integrated Analysis (UTOPIA) for holistic technology, design and system co-optimization at <= 7nm nodes. VLSI Circuits 2016: 1-2 - 2015
- [j4]Younghwi Yang, Juhyun Park, Seung Chul Song, Joseph Wang, Geoffrey Yeap, Seong-Ook Jung:
SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(6): 1538-1545 (2015) - [j3]Younghwi Yang, Juhyun Park, Seung Chul Song, Joseph Wang, Geoffrey Yeap, Seong-Ook Jung:
Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology. IEEE Trans. Very Large Scale Integr. Syst. 23(11): 2748-2752 (2015) - [c2]N. N. Mojumder, Seung Chul Song, K. Rim, J. Xu, Joseph Wang, J. Zhu, Milena Vratonjic, K. Lin, Martin Saint-Laurent, Paul Bassett, Geoffrey Yeap:
Transistor-interconnect mobile system-on-chip co-design method for holistic battery energy minimization. VLSIC 2015: 84- - [c1]Seung Chul Song, J. Xu, N. N. Mojumder, K. Rim, D. Yang, Jerry Bao, J. Zhu, Joseph Wang, Mustafa Badaroglu, V. Machkaoutsan, Praneeth Narayanasetti, B. Bucki, Jeff Fischer, Geoffrey Yeap:
Holistic technology optimization and key enablers for 7nm mobile SoC. VLSIC 2015: 198- - 2014
- [j2]Jason Woo, Po-Yen Chien, Frank Yang, Seung Chul Song, P. R. Chidi Chidambaram, Joseph Wang, Geoffrey Yeap:
Improved device variability in scaled MOSFETs with deeply retrograde channel profile. Microelectron. Reliab. 54(6-7): 1090-1095 (2014) - 2011
- [j1]Seung Chul Song, M. Abu-Rahma, Geoffrey Yeap:
FinFET based SRAM bitcell design for 32 nm node and below. Microelectron. J. 42(3): 520-526 (2011)
Coauthor Index
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