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Athanasios Papadimitriou
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2020 – today
- 2024
- [c24]Amalia-Artemis Koufopoulou, Athanasios Papadimitriou, Mihalis Psarakis, David Hély:
Automated Hardware Security Countermeasure Integration Inside High Level Synthesis. DATE 2024: 1-2 - [i5]Ioanna Souvatzoglou, Athanasios Papadimitriou, Aitzan Sari, Vasileios Vlagkoulis, Mihalis Psarakis:
Analyzing the Single Event Upset Vulnerability of Binarized Neural Networks on SRAM FPGAs. CoRR abs/2404.01757 (2024) - 2023
- [c23]Amalia-Artemis Koufopoulou, Athanasios Papadimitriou, Aggelos Pikrakis, Mihalis Psarakis, David Hély:
On the Prediction of Hardware Security Properties of HLS Designs Using Graph Neural Networks. DFT 2023: 1-6 - [i4]Amalia-Artemis Koufopoulou, Kalliopi Xevgeni, Athanasios Papadimitriou, Mihalis Psarakis, David Hély:
Security and Reliability Evaluation of Countermeasures implemented using High-Level Synthesis. CoRR abs/2312.06268 (2023) - [i3]Amalia-Artemis Koufopoulou, Athanasios Papadimitriou, Aggelos Pikrakis, Mihalis Psarakis, David Hély:
On the Prediction of Hardware Security Properties of HLS Designs Using Graph Neural Networks. CoRR abs/2312.07594 (2023) - 2022
- [c22]Konstantinos Nomikos, Athanasios Papadimitriou, Mihalis Psarakis, Aggelos Pikrakis, Vincent Beroulle:
Evaluation of Hiding-based Countermeasures against Deep Learning Side Channel Attacks with Pre-trained Networks. DFT 2022: 1-6 - [c21]Ioanna Souvatzoglou, Dimitris Agiakatsikas, George Antonopoulos, Vasileios Vlagkoulis, Aitzan Sari, Athanasios Papadimitriou, Mihalis Psarakis:
The Impact of Hardware Folding on Dependability in Spaceborne FPGA-based Neural Networks. FPT 2022: 1 - [c20]Amalia-Artemis Koufopoulou, Kalliopi Xevgeni, Athanasios Papadimitriou, Mihalis Psarakis, David Hély:
Security and Reliability Evaluation of Countermeasures implemented using High-Level Synthesis. IOLTS 2022: 1-8 - 2021
- [j6]Ehsan Aerabi, David Hély, Cyril Bresch, Athanasios Papadimitriou, Mahdi Fazeli:
CONFISCA: An SIMD-Based Concurrent FI and SCA Countermeasure with Switchable Performance and Security Modes. Cryptogr. 5(2): 13 (2021) - [c19]Ioanna Souvatzoglou, Athanasios Papadimitriou, Aitzan Sari, Vasileios Vlagkoulis, Mihalis Psarakis:
Analyzing the Single Event Upset Vulnerability of Binarized Neural Networks on SRAM FPGAs. DFT 2021: 1-6 - [c18]Ioannis Tsounis, Athanasios Papadimitriou, Mihalis Psarakis:
Analyzing the Impact of Approximate Adders on the Reliability of FPGA Accelerators. ETS 2021: 1-2 - [e1]Luigi Dilillo, Luca Cassano, Athanasios Papadimitriou:
36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021. IEEE 2021, ISBN 978-1-6654-1609-2 [contents] - 2020
- [j5]Ehsan Aerabi, Milad Bohlouli, Mohammad Hasan Ahmadi Livany, Mahdi Fazeli, Athanasios Papadimitriou, David Hély:
Design Space Exploration for Ultra-Low-Energy and Secure IoT MCUs. ACM Trans. Embed. Comput. Syst. 19(3): 19:1-19:34 (2020) - [c17]Amir Alipour, Athanasios Papadimitriou, Vincent Beroulle, Ehsan Aerabi, David Hély:
On the Performance of Non-Profiled Differential Deep Learning Attacks against an AES Encryption Algorithm Protected using a Correlated Noise Generation based Hiding Countermeasure. DATE 2020: 614-617 - [c16]Athanasios Papadimitriou, Konstantinos Nomikos, Mihalis Psarakis, Ehsan Aerabi, David Hély:
You can detect but you cannot hide: Fault Assisted Side Channel Analysis on Protected Software-based Block Ciphers. DFT 2020: 1-6 - [c15]Konstantinos Nomikos, Athanasios Papadimitriou, George Stergiopoulos, Dimitris Koutras, Mihalis Psarakis, Panayiotis Kotzanikolaou:
On a Security-oriented Design Framework for Medical IoT Devices: The Hardware Security Perspective. DSD 2020: 301-308 - [i2]Ehsan Aerabi, Milad Bohlouli, Mohammad Hasan Ahmadi Livany, Mahdi Fazeli, Athanasios Papadimitriou, David Hély:
Design Space Exploration for Ultra-Low Energy and Secure IoT MCUs. IACR Cryptol. ePrint Arch. 2020: 218 (2020) - [i1]Ehsan Aerabi, Athanasios Papadimitriou, David Hély:
On a Side Channel and Fault Attack Concurrent Countermeasure Methodology for MCU-based Byte-sliced Cipher Implementations. IACR Cryptol. ePrint Arch. 2020: 250 (2020)
2010 – 2019
- 2019
- [j4]Johan Laurent, Vincent Beroulle, Christophe Deleuze, Florian Pebay-Peyroula, Athanasios Papadimitriou:
Cross-layer analysis of software fault models and countermeasures against hardware fault attacks in a RISC-V processor. Microprocess. Microsystems 71 (2019) - [c14]Ehsan Aerabi, Athanasios Papadimitriou, David Hély:
On a Side Channel and Fault Attack Concurrent Countermeasure Methodology for MCU-based Byte-sliced Cipher Implementations. IOLTS 2019: 103-108 - [c13]Zahra Kazemi, Athanasios Papadimitriou, Ioanna Souvatzoglou, Ehsan Aerabi, Mosabbah Mushir Ahmed, David Hély, Vincent Beroulle:
On a Low Cost Fault Injection Framework for Security Assessment of Cyber-Physical Systems: Clock Glitch Attacks. IVSW 2019: 7-12 - 2018
- [j3]Cyril Bresch, David Hély, Athanasios Papadimitriou, Adrien Michelet-Gignoux, Laurent Amato, Thomas Meyer:
Stack Redundancy to Thwart Return Oriented Programming in Embedded Systems. IEEE Embed. Syst. Lett. 10(3): 87-90 (2018) - [c12]Johan Laurent, Vincent Beroulle, Christophe Deleuze, Florian Pebay-Peyroula, Athanasios Papadimitriou:
On the Importance of Analysing Microarchitecture for Accurate Software Fault Models. DSD 2018: 561-564 - [c11]Jean-Max Dutertre, Vincent Beroulle, Philippe Candelier, Stephan De Castro, Louis-Barthelemy Faber, Marie-Lise Flottes, Philippe Gendrier, David Hély, Régis Leveugle, Paolo Maistri, Giorgio Di Natale, Athanasios Papadimitriou, Bruno Rouzeyre:
Laser Fault Injection at the CMOS 28 nm Technology Node: an Analysis of the Fault Model. FDTC 2018: 1-6 - [c10]Jean-Max Dutertre, Vincent Beroulle, Philippe Candelier, Louis-Barthelemy Faber, Marie-Lise Flottes, Philippe Gendrier, David Hély, Régis Leveugle, Paolo Maistri, Giorgio Di Natale, Athanasios Papadimitriou, Bruno Rouzeyre:
The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks. IOLTS 2018: 214-219 - [c9]Zahra Kazemi, Athanasios Papadimitriou, David Hély, Mahdi Fazeli, Vincent Beroulle:
Hardware Security Evaluation Platform for MCU-Based Connected Devices: Application to Healthcare IoT. IVSW 2018: 87-92 - 2016
- [j2]Athanasios Papadimitriou, David Hély, Vincent Beroulle, Paolo Maistri, Régis Leveugle:
Analysis of laser-induced errors: RTL fault models versus layout locality characteristics. Microprocess. Microsystems 47: 64-73 (2016) - [j1]Xiaofei Guo, Chenglu Jin, Chi Zhang, Athanasios Papadimitriou, David Hély, Ramesh Karri:
Can Algorithm Diversity in Stream Cipher Implementation Thwart (Natural and) Malicious Faults? IEEE Trans. Emerg. Top. Comput. 4(3): 363-373 (2016) - [c8]Charalampos Ananiadis, Athanasios Papadimitriou, David Hély, Vincent Beroulle, Paolo Maistri, Régis Leveugle:
On the development of a new countermeasure based on a laser attack RTL fault model. DATE 2016: 445-450 - [c7]Romain Champon, Vincent Beroulle, Athanasios Papadimitriou, David Hély, Gilles Genévrier, Frédéric Cézilly:
Comparison of RTL fault models for the robustness evaluation of aerospace FPGA devices. IOLTS 2016: 23-24 - [c6]Régis Leveugle, A. Chahed, Paolo Maistri, Athanasios Papadimitriou, David Hély, Vincent Beroulle:
On fault injections for early security evaluation vs. laser-based attacks. IVSW 2016: 1-6 - 2015
- [c5]Athanasios Papadimitriou, Marios Tampas, David Hély, Vincent Beroulle, Paolo Maistri, Régis Leveugle:
Validation of RTL laser fault injection model with respect to layout information. HOST 2015: 78-81 - 2014
- [c4]Athanasios Papadimitriou, David Hély, Vincent Beroulle, Paolo Maistri, Régis Leveugle:
A multiple fault injection methodology based on cone partitioning towards RTL modeling of laser attacks. DATE 2014: 1-4 - [c3]Pierre Vanhauwaert, Paolo Maistri, Régis Leveugle, Athanasios Papadimitriou, David Hély, Vincent Beroulle:
On error models for RTL security evaluations. DTIS 2014: 1-6 - [c2]Régis Leveugle, Paolo Maistri, Pierre Vanhauwaert, Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Athanasios Papadimitriou, David Hély, Vincent Beroulle, Guillaume Hubert, Stephan De Castro, Jean-Max Dutertre, Alexandre Sarafianos, Noemie Boher, Mathieu Lisart, Joel Damiens, Philippe Candelier, Clément Tavernier:
Laser-induced fault effects in security-dedicated circuits. VLSI-SoC 2014: 1-6 - [c1]Vincent Beroulle, Philippe Candelier, Stephan De Castro, Giorgio Di Natale, Jean-Max Dutertre, Marie-Lise Flottes, David Hély, Guillaume Hubert, Régis Leveugle, Feng Lu, Paolo Maistri, Athanasios Papadimitriou, Bruno Rouzeyre, Clément Tavernier, Pierre Vanhauwaert:
Laser-Induced Fault Effects in Security-Dedicated Circuits. VLSI-SoC (Selected Papers) 2014: 220-240
Coauthor Index
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last updated on 2024-10-01 21:37 CEST by the dblp team
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