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Journal Articles
- 2010
[j11]Xiangyu Tang, Seongmoon Wang:
A Low Hardware Overhead Self-Diagnosis Technique Using Reed-Solomon Codes for Self-Repairing Chips. IEEE Trans. Computers 59(10): 1309-1319 (2010)- [j10]Seongmoon Wang, Wenlong Wei, Zhanglei Wang:
A Low Overhead High Test Compression Technique Using Pattern Clustering With $n$-Detection Test Support. IEEE Trans. Very Large Scale Integr. Syst. 18(12): 1672-1685 (2010) - 2009
- [j9]Zhanglei Wang, Krishnendu Chakrabarty
, Seongmoon Wang:
Integrated LFSR Reseeding, Test-Access Optimization, and Test Scheduling for Core-Based System-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(8): 1251-1264 (2009) - 2008
- [j8]Seongmoon Wang, Kedarnath J. Balakrishnan, Wenlong Wei:
X-Block: An Efficient LFSR Reseeding-Based Method to Block Unknowns for Temporal Compactors. IEEE Trans. Computers 57(7): 978-989 (2008) - [j7]Seongmoon Wang, Wenlong Wei:
An Efficient Unknown BlockingScheme for Low Control Data Volume and High Observability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(11): 2039-2052 (2008) - 2007
- [j6]Seongmoon Wang:
A BIST TPG for Low Power Dissipation and High Fault Coverage. IEEE Trans. Very Large Scale Integr. Syst. 15(7): 777-789 (2007) - 2006
- [j5]Seongmoon Wang, Srimat T. Chakradhar:
A scalable scan-path test point insertion technique to enhance delay fault coverage for standard scan designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(8): 1555-1564 (2006) - [j4]Seongmoon Wang, Sandeep K. Gupta:
LT-RTPG: a new test-per-scan BIST TPG for low switching activity. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(8): 1565-1574 (2006) - 2002
- [j3]Seongmoon Wang, Sandeep K. Gupta:
DS-LFSR: a BIST TPG for low switching activity. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(7): 842-851 (2002) - [j2]Seongmoon Wang, Sandeep K. Gupta:
An automatic test pattern generator for minimizing switching activity during scan testing activity. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(8): 954-968 (2002) - 1998
- [j1]Seongmoon Wang, Sandeep K. Gupta:
ATPG for Heat Dissipation Minimization During Test Application. IEEE Trans. Computers 47(2): 256-262 (1998)
Conference and Workshop Papers
- 2011
- [c29]Seongmoon Wang:
An efficient method to screen resistive opens under presence of process variation. VTS 2011: 122-127 - 2009
- [c28]Seongmoon Wang, Wenlong Wei:
Machine learning-based volume diagnosis. DATE 2009: 902-905 - [c27]Xiangyu Tang, Seongmoon Wang:
A self-diagnosis technique using Reed-Solomon codes for self-repairing chips. DSN 2009: 265-274 - 2008
- [c26]Seongmoon Wang, Wenlong Wei:
Cost Efficient Methods to Improve Performance of Broadcast Scan. ATS 2008: 163-169 - [c25]Seongmoon Wang, Wenlong Wei:
Low Overhead Partial Enhanced Scan Technique for Compact and High Fault Coverage Transition Delay Test Patterns. ETS 2008: 125-130 - 2007
- [c24]Seongmoon Wang, Wenlong Wei:
A Technique to Reduce Peak Current and Average Power Dissipation in Scan Designs by Limited Capture. ASP-DAC 2007: 810-816 - [c23]Seongmoon Wang, Wenlong Wei, Srimat T. Chakradhar:
A High Compression and Short Test Sequence Test Compression Technique to Enhance Compressions of LFSR Reseeding. ATS 2007: 79-86 - [c22]Seongmoon Wang, Wenlong Wei, Srimat T. Chakradhar:
Unknown blocking scheme for low control data volume and high observability. DATE 2007: 33-38 - [c21]Zhanglei Wang, Krishnendu Chakrabarty, Seongmoon Wang:
SoC testing using LFSR reseeding, and scan-slice-based TAM optimization and test scheduling. DATE 2007: 201-206 - [c20]Mango Chia-Tso Chao, Kwang-Ting Cheng, Seongmoon Wang, Srimat T. Chakradhar, Wenlong Wei:
A hybrid scheme for compacting test responses with unknown values. ICCAD 2007: 513-519 - [c19]Seongmoon Wang, Zhanglei Wang, Wenlong Wei, Srimat T. Chakradhar:
A low cost test data compression technique for high n-detection fault coverage. ITC 2007: 1-10 - [c18]Rajamani Sethuram, Seongmoon Wang, Srimat T. Chakradhar, Michael L. Bushnell:
Zero Cost Test Point Insertion Technique for Structured ASICs. VLSI Design 2007: 357-363 - 2006
- [c17]Rajamani Sethuram, Seongmoon Wang, Srimat T. Chakradhar, Michael L. Bushnell:
Zero Cost Test Point Insertion Technique to Reduce Test Set Size and Test Generation Time for Structured ASICs. ATS 2006: 339-348 - [c16]Mango Chia-Tso Chao, Kwang-Ting Cheng, Seongmoon Wang, Srimat T. Chakradhar, Wenlong Wei:
Unknown-tolerance analysis and test-quality control for test response compaction using space compactors. DAC 2006: 1083-1088 - [c15]Seongmoon Wang, Kedarnath J. Balakrishnan, Srimat T. Chakradhar:
Efficient unknown blocking using LFSR reseeding. DATE 2006: 1051-1052 - [c14]Mango Chia-Tso Chao, Seongmoon Wang, Srimat T. Chakradhar, Wenlong Wei, Kwang-Ting Cheng:
Coverage loss by using space compactors in presence of unknown values. DATE 2006: 1053-1054 - [c13]Kedarnath J. Balakrishnan, Seongmoon Wang, Srimat T. Chakradhar:
PIDISC: Pattern Independent Design Independent Seed Compression Technique. VLSI Design 2006: 811-817 - 2005
- [c12]Mango Chia-Tso Chao, Seongmoon Wang, Srimat T. Chakradhar, Kwang-Ting Cheng:
Response shaper: a novel technique to enhance unknown tolerance for output response compaction. ICCAD 2005: 80-87 - [c11]Mango Chia-Tso Chao, Seongmoon Wang, Srimat T. Chakradhar, Kwang-Ting Cheng:
ChiYun Compact: A Novel Test Compaction Technique for Responses with Unknown Values. ICCD 2005: 147-152 - [c10]Seongmoon Wang, Kedarnath J. Balakrishnan, Srimat T. Chakradhar:
XWRC: externally-loaded weighted random pattern testing for input test data compression. ITC 2005: 10 - [c9]Wei Li, Seongmoon Wang, Srimat T. Chakradhar, Sudhakar M. Reddy:
Distance Restricted Scan Chain Reordering to Enhance Delay Fault Coverage. VLSI Design 2005: 471-478 - 2004
- [c8]Seongmoon Wang, Srimat T. Chakradhar, Kedarnath J. Balakrishnan:
Re-configurable embedded core test protocol. ASP-DAC 2004: 234-237 - [c7]Seongmoon Wang, Xiao Liu, Srimat T. Chakradhar:
Hybrid Delay Scan: A Low Hardware Overhead Scan-Based Delay Test Technique for High Fault Coverage and Compact Test Sets. DATE 2004: 1296-1301 - 2003
- [c6]Seongmoon Wang, Srimat T. Chakradhar:
A Scalable Scan-Path Test Point Insertion Technique to Enhance Delay Fault Coverage for Standard Scan Designs. ITC 2003: 574-583 - 2002
- [c5]Seongmoon Wang:
Generation of Low Power Dissipation and High Fault Coverage Patterns for Scan-Based BIST. ITC 2002: 834-843 - 1999
- [c4]Seongmoon Wang, Sandeep K. Gupta:
LT-RTPG: a new test-per-scan BIST TPG for low heat dissipation. ITC 1999: 85-94 - 1997
- [c3]Seongmoon Wang, Sandeep K. Gupta:
ATPG for Heat Dissipation Minimization During Scan Testing. DAC 1997: 614-619 - [c2]Seongmoon Wang, Sandeep K. Gupta:
DS-LFSR: A New BIST TPG for Low Heat Dissipation. ITC 1997: 848-857 - 1994
- [c1]Seongmoon Wang, Sandeep K. Gupta:
ATPG for Heat Dissipation Minimization During Test Application. ITC 1994: 250-258
Coauthor Index
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