• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 36 matches

• 2012
• 
  Fakhar Anjam, Quan Kong, Roel Seedorf, Stephan Wong:
  A Run-Time Task Migration Scheme for an Adjustable Issue-Slots Multi-core Processor. ARC 2012: 102-113
• 
  Annie Avakian, Natwar Agrawal, Ranga Vemuri:
  Reconfigurable Multicore Architecture for Dynamic Processor Reallocation. ARC 2012: 329-334
• 
  Stewart Denholm, Kuen Hung Tsoi, Peter R. Pietzuch, Wayne Luk:
  Efficient Communication for FPGA Clusters. ARC 2012: 335-341
• 
  Florent de Dinechin, Laurent-Stéphane Didier:
  Table-Based Division by Small Integer Constants. ARC 2012: 53-63
• 
  Yarkin Doröz, Erkay Savas:
  Constructing Cluster of Simple FPGA Boards for Cryptologic Computations. ARC 2012: 320-328
• 
  Hongbing Fan, Yue-Ang Chen, Yu-Liang Wu:
  R-NoC: An Efficient Packet-Switched Reconfigurable Networks-on-Chip. ARC 2012: 365-371
• 
  Tannous Frangieh, Richard Stroop, Peter Athanas, Teresa Cervero:
  A Modular-Based Assembly Framework for Autonomous Reconfigurable Systems. ARC 2012: 314-319
• 
  Tim Güneysu, Igor L. Markov, André Weimerskirch:
  Securely Sealing Multi-FPGA Systems. ARC 2012: 276-289
• 
  Ruining He, Guoqiang Liang, Yuchun Ma, Yu Wang, Jinian Bian:
  PDPR: Fine-Grained Placement for Dynamic Partially Reconfigurable FPGAs. ARC 2012: 350-356
• 
  Karel Heyse, Brahim Al Farisi, Karel Bruneel, Dirk Stroobandt:
  Automating Reconfiguration Chain Generation for SRL-Based Run-Time Reconfiguration. ARC 2012: 1-12
• 
  Tassadaq Hussain, Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé:
  PPMC: A Programmable Pattern Based Memory Controller. ARC 2012: 89-101
• 
  Manish Kumar Jaiswal, Ray C. C. Cheung:
  High Performance Reconfigurable Architecture for Double Precision Floating Point Division. ARC 2012: 302-313
• 
  Qiwei Jin, Diwei Dong, Anson H. T. Tse, Gary Chun Tak Chow, David B. Thomas, Wayne Luk, Stephen Weston:
  Multi-level Customisation Framework for Curve Based Monte Carlo Financial Simulations. ARC 2012: 187-201
• 
  Yongjoo Kim, Jongeun Lee, Jinyong Lee, Toan X. Mai, Ingoo Heo, Yunheung Paek:
  Exploiting Both Pipelining and Data Parallelism with SIMD Reconfigurable Architecture. ARC 2012: 40-52
• 
  Kashif Latif, M. Muzaffar Rao, Athar Mahboob, Arshad Aziz:
  Novel Arithmetic Architecture for High Performance Implementation of SHA-3 Finalist Keccak on FPGA Platforms. ARC 2012: 372-378
• 
  Qiang Liu, Wayne Luk:
  Heterogeneous Systems for Energy Efficient Scientific Computing. ARC 2012: 64-75
• 
  Wei Ting Loke, Yajun Ha:
  A Routing Architecture for FPGAs with Dual-VT Switch Box and Logic Clusters. ARC 2012: 174-186
• 
  Sen Ma, Miaoqing Huang, Eugene Cartwright, David Andrews:
  Scalable Memory Hierarchies for Embedded Manycore Systems. ARC 2012: 151-162
• 
  Grigorios Mingas, Christos-Savvas Bouganis:
  Parallel Tempering MCMC Acceleration Using Reconfigurable Hardware. ARC 2012: 227-238
• 
  Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura:
  A Low-Cost and High-Performance Virus Scanning Engine Using a Binary CAM Emulator and an MPU. ARC 2012: 202-214
• 
  Geoffrey Ndu, Jim D. Garside:
  Boosting Single Thread Performance in Mobile Processors via Reconfigurable Acceleration. ARC 2012: 114-125
• 
  Sayyed Arash Ostadzadeh, Roel Meeuws, Imran Ashraf, Carlo Galuzzi, Koen Bertels:
  The Q2 Profiling Framework: Driving Application Mapping for Heterogeneous Reconfigurable Platforms. ARC 2012: 76-88
• 
  Abid Rafique, Nachiket Kapre, George A. Constantinides:
  A High Throughput FPGA-Based Implementation of the Lanczos Method for the Symmetric Extremal Eigenvalue Problem. ARC 2012: 239-250
• 
  Shinya Takamaeda-Yamazaki, Shintaro Sano, Yoshito Sakaguchi, Naoki Fujieda, Kenji Kise:
  ScalableCore System: A Scalable Many-Core Simulator by Employing over 100 FPGAs. ARC 2012: 138-150
• 
  Mohamad Sofian Abu Talip, Takayuki Akamine, Yasunori Osana, Naoyuki Fujita, Hideharu Amano:
  Cost Effective Implementation of Flux Limiter Functions Using Partial Reconfiguration. ARC 2012: 215-226
• 
  Xuan You Tan, David Boland, George A. Constantinides:
  FPGA Paranoia: Testing Numerical Properties of FPGA Floating Point IP-Cores. ARC 2012: 290-301
• 
  Anson H. T. Tse, Gary C. T. Chow, Qiwei Jin, David B. Thomas, Wayne Luk:
  Optimising Performance of Quadrature Methods with Reduced Precision. ARC 2012: 251-263
• 
  Elias Vansteenkiste, Karel Bruneel, Dirk Stroobandt:
  A Connection Router for the Dynamic Reconfiguration of FPGAs. ARC 2012: 357-364
• 
  Kizheppatt Vipin, Suhaib A. Fahmy:
  Architecture-Aware Reconfiguration-Centric Floorplanning for Partial Reconfiguration. ARC 2012: 13-25
• 
  Chao Wang, Xi Li, Xuehai Zhou, Xiaojing Feng:
  CRAIS: A Crossbar Based Adaptive Interconnection Scheme. ARC 2012: 379-384

skipping 6 more matches