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Miquel Pericàs
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2020 – today
- 2024
- [c54]Sonia Rani Gupta, Nikela Papadopoulou, Jing Chen, Miquel Pericàs:
Co-Design of Convolutional Algorithms and Long Vector RISC-V Processors for Efficient CNN Model Serving. ICPP 2024: 73-83 - [c53]Jing Chen, Madhavan Manivannan, Bhavishya Goel, Miquel Pericàs:
SWEEP: Adaptive Task Scheduling for Exploring Energy Performance Trade-offs. IPDPS 2024: 325-336 - 2023
- [j15]Jens Domke, Emil Vatai, Balazs Gerofi, Yuetsu Kodama, Mohamed Wahib, Artur Podobas, Sparsh Mittal, Miquel Pericàs, Lingqi Zhang, Peng Chen, Aleksandr Drozd, Satoshi Matsuoka:
At the Locus of Performance: Quantifying the Effects of Copious 3D-Stacked Cache on HPC Workloads. ACM Trans. Archit. Code Optim. 20(4): 57:1-57:26 (2023) - [c52]Pirah Noor Soomro, Nikela Papadopoulou, Miquel Pericàs:
ODIN: Overcoming Dynamic Interference in iNference Pipelines. Euro-Par 2023: 169-183 - [c51]Jing Chen, Madhavan Manivannan, Bhavishya Goel, Miquel Pericàs:
JOSS: Joint Exploration of CPU-Memory DVFS and Task Scheduling for Energy Efficiency. ICPP 2023: 828-838 - [c50]Sonia Rani Gupta, Nikela Papadopoulou, Miquel Pericàs:
Accelerating CNN inference on long vector architectures via co-design. IPDPS 2023: 145-155 - [c49]Sonia Rani Gupta, Nikela Papadopoulou, Miquel Pericàs:
Challenges and Opportunities in the Co-design of Convolutions and RISC-V Vector Processors. SC Workshops 2023: 1550-1556 - [c48]Minyu Cui, Nikela Papadopoulou, Miquel Pericàs:
Analysis and Characterization of Performance Variability for OpenMP Runtime. SC Workshops 2023: 1614-1622 - [e3]José Cano, Marios D. Dikaiakos, George A. Papadopoulos, Miquel Pericàs, Rizos Sakellariou:
Euro-Par 2023: Parallel Processing - 29th International Conference on Parallel and Distributed Computing, Limassol, Cyprus, August 28 - September 1, 2023, Proceedings. Lecture Notes in Computer Science 14100, Springer 2023, ISBN 978-3-031-39697-7 [contents] - [i18]Pirah Noor Soomro, Nikela Papadopoulou, Miquel Pericàs:
ODIN: Overcoming Dynamic Interference in iNference pipelines. CoRR abs/2306.01679 (2023) - [i17]Jing Chen, Madhavan Manivannan, Bhavishya Goel, Miquel Pericàs:
JOSS: Joint Exploration of CPU-Memory DVFS and Task Scheduling for Energy Efficiency. CoRR abs/2306.04615 (2023) - [i16]Minyu Cui, Nikela Papadopoulou, Miquel Pericàs:
Analysis and Characterization of Performance Variability for OpenMP Runtime. CoRR abs/2311.05267 (2023) - [i15]Sonia Rani Gupta, Nikela Papadopoulou, Miquel Pericàs:
Challenges and Opportunities in the Co-design of Convolutions and RISC-V Vector Processors. CoRR abs/2311.05284 (2023) - 2022
- [j14]Muhammad Waqar Azhar, Miquel Pericàs, Per Stenström:
Task-RM: A Resource Manager for Energy Reduction in Task-Parallel Applications under Quality of Service Constraints. ACM Trans. Archit. Code Optim. 19(1): 11:1-11:26 (2022) - [j13]Mehrzad Nejat, Madhavan Manivannan, Miquel Pericàs, Per Stenström:
Cooperative Slack Management: Saving Energy of Multicore Processors by Trading Performance Slack Between QoS-Constrained Applications. ACM Trans. Archit. Code Optim. 19(2): 21:1-21:27 (2022) - [j12]Jing Chen, Madhavan Manivannan, Mustafa Abduljabbar, Miquel Pericàs:
ERASE: Energy Efficient Task Mapping and Resource Management for Work Stealing Runtimes. ACM Trans. Archit. Code Optim. 19(2): 27:1-27:29 (2022) - [c47]Pirah Noor Soomro, Mustafa Abduljabbar, Jerónimo Castrillón, Miquel Pericàs:
Shisha: Online Scheduling of CNN Pipelines on Heterogeneous Architectures. PPAM (1) 2022: 249-262 - [c46]Jing Chen, Madhavan Manivannan, Bhavishya Goel, Mustafa Abduljabbar, Miquel Pericàs:
STEER: Asymmetry-aware Energy Efficient Task Scheduler for Cluster-based Multicore Architectures. SBAC-PAD 2022: 326-335 - [i14]Jing Chen, Madhavan Manivannan, Mustafa Abduljabbar, Miquel Pericàs:
ERASE: Energy Efficient Task Mapping and Resource Management for Work Stealing Runtimes. CoRR abs/2201.12186 (2022) - [i13]Pirah Noor Soomro, Mustafa Abduljabbar, Jerónimo Castrillón, Miquel Pericàs:
Shisha: Online scheduling of CNN pipelines on heterogeneous architectures. CoRR abs/2202.11575 (2022) - [i12]Jens Domke, Emil Vatai, Balazs Gerofi, Yuetsu Kodama, Mohamed Wahib, Artur Podobas, Sparsh Mittal, Miquel Pericàs, Lingqi Zhang, Peng Chen, Aleksandr Drozd, Satoshi Matsuoka:
At the Locus of Performance: A Case Study in Enhancing CPUs with Copious 3D-Stacked Cache. CoRR abs/2204.02235 (2022) - [i11]Henrik Valter, Axel Karlsson, Miquel Pericàs:
Energy-Efficiency Evaluation of OpenMP Loop Transformations and Runtime Constructs. CoRR abs/2209.04317 (2022) - [i10]Sonia Rani Gupta, Nikela Papadopoulou, Miquel Pericàs:
Accelerating CNN inference on long vector architectures via co-design. CoRR abs/2212.11574 (2022) - 2021
- [c45]Nadja Ramhöj Holtryd, Madhavan Manivannan, Per Stenström, Miquel Pericàs:
CBP: Coordinated management of cache partitioning, bandwidth partitioning and prefetch throttling. PACT 2021: 213-225 - [c44]Pirah Noor Soomro, Mustafa Abduljabbar, Jerónimo Castrillón, Miquel Pericàs:
An online guided tuning approach to run CNN pipelines on edge devices. CF 2021: 45-53 - [c43]Muhammed Nufail Farooqi, Miquel Pericàs:
Vectorized Barrier and Reduction in LLVM OpenMP Runtime. IWOMP 2021: 18-32 - [i9]Nadja Ramhöj Holtryd, Madhavan Manivannan, Per Stenström, Miquel Pericàs:
CBP: Coordinated management of cache partitioning, bandwidth partitioning and prefetch throttling. CoRR abs/2102.11528 (2021) - [i8]Mustafa Abduljabbar, Mahmoud Eljammaly, Miquel Pericàs:
Mitigating inefficient task mappings with an Adaptive Resource-Moldable Scheduler (ARMS). CoRR abs/2112.09509 (2021) - 2020
- [j11]Mehrzad Nejat, Madhavan Manivannan, Miquel Pericàs, Per Stenström:
Coordinated management of DVFS and cache partitioning under QoS constraints to save energy in multi-core systems. J. Parallel Distributed Comput. 144: 246-259 (2020) - [c42]Jeckson Dellagostin Souza, Madhavan Manivannan, Miquel Pericàs, Antonio Carlos Schneider Beck:
Enhancing Thread-Level Parallelism in Asymmetric Multicores using Transparent Instruction Offloading. DAC 2020: 1-6 - [c41]Behzad Salami, Konstantinos Parasyris, Adrián Cristal, Osman S. Unsal, Xavier Martorell, Paul Carpenter, Raúl de la Cruz, Leonardo Bautista-Gomez, Daniel A. Jiménez, Carlos Álvarez, Seyed Saber Nabavi Larimi, Sergi Madonar, Miquel Pericàs, Pedro Trancoso, Mustafa Abduljabbar, Jing Chen, Pirah Noor Soomro, Madhavan Manivannan, Micha vor dem Berge, Stefan Krupop, Frank Klawonn, Al Mekhlafi, Sigrun May, Tobias Becker, Georgi Gaydadjiev, Hans Salomonsson, Devdatt P. Dubhashi, Oron Port, Yoav Etsion, Do Le Quoc, Christof Fetzer, Martin Kaiser, Nils Kucza, Jens Hagemeyer, René Griessl, Lennart Tigges, Kevin Mika, A. Hüffmeier, Marcelo Pasin, Valerio Schiavoni, Isabelly Rocha, Christian Göttel, Pascal Felber:
LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing. DATE 2020: 169-174 - [c40]Jeckson Dellagostin Souza, Madhavan Manivannan, Miquel Pericàs, Antonio Carlos Schneider Beck:
Enhancing Multithreaded Performance of Asymmetric Multicores with SIMD Offloading. DATE 2020: 967-970 - [c39]Jing Chen, Pirah Noor Soomro, Mustafa Abduljabbar, Madhavan Manivannan, Miquel Pericàs:
Scheduling Task-parallel Applications in Dynamically Asymmetric Environments. ICPP Workshops 2020: 18:1-18:10 - [c38]Nadja Holtryd, Madhavan Manivannan, Per Stenström, Miquel Pericàs:
DELTA: Distributed Locality-Aware Cache Partitioning for Tile-based Chip Multiprocessors. IPDPS 2020: 578-589 - [c37]Mehrzad Nejat, Madhavan Manivannan, Miquel Pericàs, Per Stenström:
Coordinated Management of Processor Configuration and Cache Partitioning to Optimize Energy under QoS Constraints. IPDPS 2020: 590-601 - [e2]Nele Mentens, Leonel Sousa, Pedro Trancoso, Miquel Pericàs, Ioannis Sourdis:
30th International Conference on Field-Programmable Logic and Applications, FPL 2020, Gothenburg, Sweden, August 31 - September 4, 2020. IEEE 2020, ISBN 978-1-7281-9902-3 [contents] - [i7]Miquel Pericàs, Oscar Palomar, Vassilis Papaefstathiou, Mahmoud Eljammaly:
Proceedings of the Thirteenth International Workshop on Programmability and Architectures for Heterogeneous Multicores (MULTIPROG-2020). CoRR abs/2005.07619 (2020) - [i6]Jing Chen, Pirah Noor Soomro, Mustafa Abduljabbar, Madhavan Manivannan, Miquel Pericàs:
Scheduling Task-parallel Applications in Dynamically Asymmetric Environments. CoRR abs/2009.00915 (2020)
2010 – 2019
- 2019
- [c36]Muhammad Waqar Azhar, Miquel Pericàs, Per Stenström:
SaC: Exploiting Execution-Time Slack to Save Energy in Heterogeneous Multicore Systems. ICPP 2019: 26:1-26:12 - [c35]Mehrzad Nejat, Miquel Pericàs, Per Stenström:
QoS-Driven Coordinated Management of Resources to Save Energy in Multi-core Systems. IPDPS 2019: 303-313 - [i5]Agnes Rohlin, Henrik Fahlgren, Miquel Pericàs:
High performance scheduling of mixed-mode DAGs on heterogeneous multicores. CoRR abs/1901.05907 (2019) - [i4]Jing Chen, Pirah Noor Soomro, Mustafa Abdul Jabbar, Miquel Pericàs:
An Adaptive Performance-oriented Scheduler for Static and Dynamic Heterogeneity. CoRR abs/1905.00673 (2019) - [i3]Mehrzad Nejat, Madhavan Manivannan, Miquel Pericàs, Per Stenström:
Coordinated Management of DVFS and Cache Partitioning under QoS Constraints to Save Energy in Multi-Core Systems. CoRR abs/1911.05101 (2019) - [i2]Mehrzad Nejat, Madhavan Manivannan, Miquel Pericàs, Per Stenström:
Coordinated Management of Processor Configuration and Cache Partitioning to Optimize Energy under QoS Constraints. CoRR abs/1911.05114 (2019) - [i1]Behzad Salami, Konstantinos Parasyris, Adrián Cristal, Osman S. Unsal, Xavier Martorell, Paul Carpenter, Raúl de la Cruz, Leonardo Bautista-Gomez, Daniel A. Jiménez, Carlos Álvarez, S. Nabavi, Sergi Madonar, Miquel Pericàs, Pedro Trancoso, Mustafa Abduljabbar, Jing Chen, Pirah Noor Soomro, Madhavan Manivannan, Micha vor dem Berge, Stefan Krupop, Frank Klawonn, Al Mekhlafi, Sigrun May, Tobias Becker, Georgi Gaydadjiev, Daniel Ödman, Hans Salomonsson, Devdatt P. Dubhashi, Oron Port, Yoav Etsion, Do Le Quoc, Christof Fetzer, Martin Kaiser, Nils Kucza, Jens Hagemeyer, René Griessl, Lennart Tigges, Kevin Mika, A. Hüffmeier, Th. Jungeblu, Marcelo Pasin, Valerio Schiavoni, Isabelly Rocha, Christian Göttel, Pascal Felber:
LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing. CoRR abs/1912.01563 (2019) - 2018
- [j10]Miquel Pericàs:
Elastic Places: An Adaptive Resource Manager for Scalable and Portable Performance. ACM Trans. Archit. Code Optim. 15(2): 19:1-19:26 (2018) - [j9]Madhavan Manivannan, Miquel Pericàs, Vassilis Papaefstathiou, Per Stenström:
Global Dead-Block Management for Task-Parallel Programs. ACM Trans. Archit. Code Optim. 15(3): 33:1-33:25 (2018) - [c34]Adrián Cristal, Osman S. Unsal, Xavier Martorell, Paul Carpenter, Raúl de la Cruz, Leonardo Bautista-Gomez, Daniel Jiménez-González, Carlos Álvarez, Behzad Salami, Sergi Madonar, Miquel Pericàs, Pedro Trancoso, Micha vor dem Berge, Gunnar Billung-Meyer, Stefan Krupop, Wolfgang Christmann, Frank Klawonn, Amani Mihklafi, Tobias Becker, Georgi Gaydadjiev, Hans Salomonsson, Devdatt P. Dubhashi, Oron Port, Yoav Etsion, Vesna Nowack, Christof Fetzer, Jens Hagemeyer, Thorsten Jungeblut, Nils Kucza, Martin Kaiser, Mario Porrmann, Marcelo Pasin, Valerio Schiavoni, Isabelly Rocha, Christian Göttel, Pascal Felber:
LEGaTO: towards energy-efficient, secure, fault-tolerant toolset for heterogeneous computing. CF 2018: 276-278 - [c33]Adrián Cristal, Osman S. Unsal, Xavier Martorell, Paul Carpenter, Raúl de la Cruz, Leonardo Bautista-Gomez, Daniel Jiménez-González, Carlos Álvarez, Behzad Salami, Sergi Madonar, Miquel Pericàs, Pedro Trancoso, Micha vor dem Berge, Gunnar Billung-Meyer, Stefan Krupop, Wolfgang Christmann, Frank Klawonn, Amani Mihklafi, Tobias Becker, Georgi Gaydadjiev, Hans Salomonsson, Devdatt P. Dubhashi, Oron Port, Elad Hadar, Yoav Etsion, Christof Fetzer, Jens Hagemeyer, Thorsten Jungeblut, Nils Kucza, Martin Kaiser, Mario Porrmann, Marcelo Pasin, Valerio Schiavoni, Isabelly Rocha, Christian Göttel, Pascal Felber:
LEGaTO: first steps towards energy-efficient toolset for heterogeneous computing. SAMOS 2018: 210-217 - [e1]David R. Kaeli, Miquel Pericàs:
Proceedings of the 15th ACM International Conference on Computing Frontiers, CF 2018, Ischia, Italy, May 08-10, 2018. ACM 2018 [contents] - 2017
- [j8]Madhavan Manivannan, Miquel Pericàs, Vassilis Papaefstathiou, Per Stenström:
Runtime-Assisted Global Cache Management for Task-Based Parallel Programs. IEEE Comput. Archit. Lett. 16(2): 145-148 (2017) - [j7]Didem Unat, Anshu Dubey, Torsten Hoefler, John Shalf, Mark James Abraham, Mauro Bianco, Bradford L. Chamberlain, Romain Cledat, H. Carter Edwards, Hal Finkel, Karl Fuerlinger, Frank Hannig, Emmanuel Jeannot, Amir Kamil, Jeff Keasler, Paul H. J. Kelly, Vitus J. Leung, Hatem Ltaief, Naoya Maruyama, Chris J. Newburn, Miquel Pericàs:
Trends in Data Locality Abstractions for HPC Systems. IEEE Trans. Parallel Distributed Syst. 28(10): 3007-3020 (2017) - [c32]Stavros Tzilis, Miquel Pericàs, Pedro Trancoso, Ioannis Sourdis:
SWAS: Stealing Work Using Approximate System-Load Information. ICPP Workshops 2017: 309-318 - 2016
- [c31]Miquel Pericàs:
POSTER: ξ-TAO: A Cache-centric Execution Model and Runtime for Deep Parallel Multicore Topologies. PACT 2016: 429-431 - [c30]Madhavan Manivannan, Vassilis Papaefstathiou, Miquel Pericàs, Per Stenström:
RADAR: Runtime-assisted dead region management for last-level caches. HPCA 2016: 644-656 - [c29]Abdelhalim Amer, Satoshi Matsuoka, Miquel Pericàs, Naoya Maruyama, Kenjiro Taura, Rio Yokota, Pavan Balaji:
Scaling FMM with Data-Driven OpenMP Tasks on Multicore Architectures. IWOMP 2016: 156-170 - 2015
- [c28]Branimir Dickov, Paul M. Carpenter, Miquel Pericàs, Eduard Ayguadé:
Self-Tuned Software-Managed Energy Reduction in InfiniBand Links. ICPADS 2015: 649-657 - [c27]An Huynh, Douglas Thain, Miquel Pericàs, Kenjiro Taura:
DAGViz: a DAG visualization tool for analyzing task-parallel program traces. VPA@SC 2015: 3:1-3:8 - 2014
- [c26]Aleksandr Drozd, Miquel Pericàs, Satoshi Matsuoka:
Efficient String Sorting on Multi - and Many-Core Architectures. BigData Congress 2014: 637-644 - [c25]Branimir Dickov, Miquel Pericàs, Paul M. Carpenter, Nacho Navarro, Eduard Ayguadé:
Software-Managed Power Reduction in Infiniband Links. ICPP 2014: 311-320 - [c24]Miquel Pericàs, Kenjiro Taura, Satoshi Matsuoka:
Scalable analysis of multicore data reuse and sharing. ICS 2014: 353-362 - [c23]Branimir Dickov, Miquel Pericàs, Paul M. Carpenter, Nacho Navarro, Eduard Ayguadé:
Analyzing Performance Improvements and Energy Savings in Infiniband Architecture using Network Compression. SBAC-PAD 2014: 73-80 - 2013
- [j6]Ioannis Sourdis, Christos-Savvas Bouganis, Miquel Pericàs:
Guest editorial: Workshop on Reconfigurable Computing. J. Syst. Archit. 59(2): 77 (2013) - [j5]Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé:
A template system for the efficient compilation of domain abstractions onto reconfigurable computers. J. Syst. Archit. 59(2): 91-102 (2013) - [c22]Miquel Pericàs, Abdelhalim Amer, Kenjiro Taura, Satoshi Matsuoka:
Analysis of Data Reuse in Task-Parallel Runtimes. PMBS@SC 2013: 73-87 - [c21]Abdelhalim Amer, Naoya Maruyama, Miquel Pericàs, Kenjiro Taura, Rio Yokota, Satoshi Matsuoka:
Fork-Join and Data-Driven Execution Models on Multi-core Architectures: Case Study of the FMM. ISC 2013: 255-266 - 2012
- [c20]Tassadaq Hussain, Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé:
PPMC: A Programmable Pattern Based Memory Controller. ARC 2012: 89-101 - [c19]Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé:
BSArc: blacksmith streaming architecture for HPC accelerators. Conf. Computing Frontiers 2012: 23-32 - [c18]Tassadaq Hussain, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé:
PPMC: Hardware scheduling and memory management support for multi accelerators. FPL 2012: 571-574 - [c17]Branimir Dickov, Miquel Pericàs, Guillaume Houzeaux, Nacho Navarro, Eduard Ayguadé:
Assessing the Impact of Network Compression on Molecular Dynamics and Finite Element Methods. HPCC-ICESS 2012: 588-597 - 2011
- [j4]Mauricio Araya-Polo, Javier Cabezas, Mauricio Hanzich, Miquel Pericàs, Félix Rubio, Isaac Gelado, Muhammad Shafiq, Enric Morancho, Nacho Navarro, Eduard Ayguadé, José María Cela, Mateo Valero:
Assessing Accelerator-Based HPC Reverse Time Migration. IEEE Trans. Parallel Distributed Syst. 22(1): 147-162 (2011) - [c16]Tassadaq Hussain, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé:
Implementation of a Reverse Time Migration kernel using the HCE High Level Synthesis tool. FPT 2011: 1-8 - [c15]Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé:
TARCAD: A template architecture for reconfigurable accelerator designs. SASP 2011: 8-15 - [c14]Miquel Pericàs, Xavier Martorell, Yoav Etsion:
Implementation of a hierarchical N-body simulator using the Ompss programming model. IA3@SC 2011: 23-30 - 2010
- [c13]Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé:
FEM: A Step Towards a Common Memory Layout for FPGA Based Accelerators. FPL 2010: 568-573
2000 – 2009
- 2009
- [c12]Muhammad Shafiq, Miquel Pericàs, Raúl de la Cruz, Mauricio Araya-Polo, Nacho Navarro, Eduard Ayguadé:
Exploiting memory customization in FPGA for 3D stencil computations. FPT 2009: 38-45 - 2008
- [b1]Miquel Pericàs:
Affordable kilo-instruction processors. Polytechnic University of Catalonia, Spain, 2008 - [j3]Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero:
Power-efficient VLIW design using clustering and widening. Int. J. Embed. Syst. 3(3): 141-149 (2008) - [c11]Miquel Pericàs, Adrián Cristal, Francisco J. Cazorla, Rubén González, Alexander V. Veidenbaum, Daniel A. Jiménez, Mateo Valero:
A Two-Level Load/Store Queue Based on Execution Locality. ISCA 2008: 25-36 - [c10]Miquel Pericàs, Ricardo Chaves, Georgi Gaydadjiev, Stamatis Vassiliadis, Mateo Valero:
Vectorized AES Core for High-throughput Secure Environments. VECPAR 2008: 83-94 - 2007
- [c9]Miquel Pericàs, Adrián Cristal, Francisco J. Cazorla, Rubén González, Daniel A. Jiménez, Mateo Valero:
A Flexible Heterogeneous Multi-Core Architecture. PACT 2007: 13-24 - 2006
- [c8]Miquel Pericàs, Adrián Cristal, Rubén González, Daniel A. Jiménez, Mateo Valero:
A decoupled KILO-instruction processor. HPCA 2006: 53-64 - 2005
- [j2]Adrián Cristal, Oliverio J. Santana, Francisco J. Cazorla, Marco Galluzzi, Tanausú Ramírez, Miquel Pericàs, Mateo Valero:
Kilo-Instruction Processors: Overcoming the Memory Wall. IEEE Micro 25(3): 48-57 (2005) - [c7]Rubén González, Adrián Cristal, Miquel Pericàs, Mateo Valero, Alexander V. Veidenbaum:
An asymmetric clustered processor based on value content. ICS 2005: 61-70 - [c6]Miquel Pericàs, Adrián Cristal, Rubén González, Daniel A. Jiménez, Mateo Valero:
Exploiting Execution Locality with a Decoupled Kilo-Instruction Processor. ISHPC 2005: 56-67 - [c5]Miquel Pericàs, Adrián Cristal, Rubén González, Alexander V. Veidenbaum, Mateo Valero:
Decoupled State-Execute Architecture. ISHPC 2005: 68-78 - [c4]Miquel Pericàs, Adrián Cristal, Rubén González, Daniel A. Jiménez:
Chained In-Order/Out-of-Order DoubleCore Architecture. SBAC-PAD 2005: 209-217 - 2004
- [j1]Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero:
High-performance and low-power VLIW cores for numerical computations. Int. J. High Perform. Comput. Netw. 1(4): 171-179 (2004) - [c3]Miquel Pericàs, Rubén González, Adrián Cristal, Alexander V. Veidenbaum, Mateo Valero:
An Optimized Front-End Physical Register File with Banking and Writeback Filtering. PACS 2004: 1-14 - [c2]Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero:
Performance and Power Evaluation of Clustered VLIW Processors with Wide Functional Units. SAMOS 2004: 88-97 - 2003
- [c1]Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero:
Power-Performance Trade-Offs in Wide and Clustered VLIW Cores for Numerical Codes. ISHPC 2003: 113-126
Coauthor Index
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