"PDPR: Fine-Grained Placement for Dynamic Partially Reconfigurable FPGAs."

Ruining He et al. (2012)

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DOI: 10.1007/978-3-642-28365-9_31

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Ruining He, Guoqiang Liang, Yuchun Ma, Yu Wang, Jinian Bian:
PDPR: Fine-Grained Placement for Dynamic Partially Reconfigurable FPGAs. ARC 2012: 350-356

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