• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 286 matches

• 2002
• 
  Guido Araujo, Sharad Malik, Zhining Huang, Nahri Moreano:
  Datapath Merging and Interconnection Sharing for Reconfigurable Architectures. ISSS 2002: 38-43
• 
  Nader Bagherzadeh, Pai H. Chou, Jinfeng Liu:
  Combined Functional Partitioning and Communication Speed Selection for Networked Voltage-Scalable Processors. ISSS 2002: 14-19
• 
  M. Balakrishnan, Anshul Kumar, Paolo Ienne, Anup Gangwar, Bhuvan Middha:
  A Trimaran Based Framework for Exploring the Design Space of VLIW ASIPs with Coarse Grain Functional Units. ISSS 2002: 2-7
• 
  M. Balakrishnan, Anshul Kumar, C. P. Joshi:
  A New Performance Evaluation Approach for System Level Design Space Exploration. ISSS 2002: 180-185
• 
  M. Balakrishnan, Peter Marwedel, Lars Wehmeyer, Nils Grunwald, Rajeshwari Banakar, Stefan Steinke:
  Reducing Energy Consumption by Dynamic Copying of Instructions onto Onchip Memory. ISSS 2002: 213-218
• 
  Oliver Bringmann, Wolfgang Rosenstiel, Carsten Menn:
  Controller Estimation for FPGA Target Architectures during High-Level Synthesis. ISSS 2002: 56-61
• 
  Andrew S. Cassidy, Christopher P. Andrews, Donald E. Thomas, JoAnn M. Paul:
  System-Level Modeling of a Network Switch SoC. ISSS 2002: 62-67
• 
  Abhijit Chatterjee, Peeter Ellervee, Vincent John Mooney III, Jun-Cheol Park, Kyu-won Choi, Kiran Puttaswamy:
  System Level Power-Performance Trade-Offs in Embedded Systems Using Voltage and Frequency Scaling of Off-Chip Buses and Memory. ISSS 2002: 225-230
• 
  Rainer Dömer, Andreas Gerstlauer, Wolfgang Müller:
  The Formal Execution Semantics of SpecC. ISSS 2002: 150-155
• 
  Nikil D. Dutt, Daniel S. Hirschberg, Mahesh Mamidipaka:
  Efficient Power Reduction Techniques for Time Multiplexed Address Buses. ISSS 2002: 207-212
• 
  Petru Eles, Zebo Peng, Daniel Karlsson:
  Formal Verification in a Component-Based Reuse Methodology. ISSS 2002: 156-161
• 
  William Fornaciari, Vito Trianni, Carlo Brandolese, Donatella Sciuto, Fabio Salice, Giovanni Beltrame:
  Modeling Assembly Instruction Timing in Superscalar Architectures. ISSS 2002: 132-137
• 
  Daniel Gajski, Andreas Gerstlauer:
  System-Level Abstraction Semantics. ISSS 2002: 231-236
• 
  Daniel Gajski, Junyu Peng:
  Optimal Message-Passing for Data Coherency in Distributed Architecture. ISSS 2002: 20-25
• 
  Catherine H. Gebotys:
  Security-Driven Exploration of Cryptography in DSP Cores. ISSS 2002: 80-85
• 
  Rajesh K. Gupta, Sandeep K. Shukla, Nick Savoiu:
  Efficient Simulation of Synthesis-Oriented System Level Designs. ISSS 2002: 168-173
• 
  Soonhoi Ha, Sungchan Kim, Chan-Eun Rhee, Hyunguk Jung, Youngmin Yi, Dohyung Kim:
  Virtual Synchronization for Fast Distributed Cosimulation of Dataflow Task Graphs. ISSS 2002: 174-179
• 
  Paolo Ienne, Patrick Thiran, Giovanni De Micheli, Frederic Worm:
  An Adaptive Low-Power Transmission Scheme for On-Chip Networks. ISSS 2002: 92-100
• 
  Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali, Frédéric Rousseau, Ferid Gharsalli:
  Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design. ISSS 2002: 26-31
• 
  Ahmed Amine Jerraya, Sungjoo Yoo, Aimen Bouchhima, Gabriela Nicolescu:
  Validation in a Component-Based Design Flow for Multicore SoCs. ISSS 2002: 162-167
• 
  Erwin A. de Kock:
  Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study. ISSS 2002: 68-73
• 
  Rudy Lauwereins, Chun Wong, Paul Marchal, Johan Vounckx, Patrick David, Stefaan Himpe, Francky Catthoor, Peng Yang:
  Managing Dynamic Concurrent Tasks in Embedded Real-Time Multimedia Systems. ISSS 2002: 112-119
• 
  Luciano Lavagno, Mihai T. Lazarescu, Stefano Quer, Sergio Nocco, Claudio Passerone, Gianpiero Cabodi:
  A Symbolic Approach for the Combined Solution of Scheduling and Allocation. ISSS 2002: 237-242
• 
  Haris Lekatsas, Wayne H. Wolf, Yuan Xie:
  Code Compression for VLIW Processors Using Variable-to-Fixed Coding. ISSS 2002: 138-143
• 
  Juan Carlos López, Fernando Rincón, Francisco Moya, José Manuel Moya:
  Improving Embedded System Design by Means of HW-SW Compilation on Reconfigurable Coprocessors. ISSS 2002: 255-260
• 
  Satoshi Matsushita:
  Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification. ISSS 2002: 103-108
• 
  Vincent John Mooney III, George F. Riley, Eung S. Shin:
  Round-Robin Arbiter Design and Generation. ISSS 2002: 243-248
• 
  Tsuneo Nakata, Akio Matsuda, Minoru Shoji, Shinya Kuwamura, Qiang Zhu:
  An Object-Oriented Design Process for System-on-Chip Using UML. ISSS 2002: 249-254
• 
  Alexandru Nicolau, Nikil D. Dutt, Rajesh Gupta, Nick Savoiu, Mehrdad Reshadi, Sumit Gupta:
  Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis. ISSS 2002: 261-266
• 
  Alexandru Nicolau, Nikil D. Dutt, Aviral Shrivastava, Partha Biswas, Ashok Halambi:
  A Design Space Exploration Framework for Reduced Bit-Width Instruction Set Architecture (rISA) Design . ISSS 2002: 120-125

skipping 256 more matches