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ORCIDFrédéric Rousseau 0001
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- affiliation: IMAG, Grenoble, France
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2020 – today
- 2024
[j15]Valentin Isaac-Chassande
, Adrian Evans, Yves Durand, Frédéric Rousseau:
Dedicated Hardware Accelerators for Processing of Sparse Matrices and Vectors: A Survey. ACM Trans. Archit. Code Optim. 21(2): 27 (2024)- [c67]Valentin Isaac-Chassande, Adrian Evans, Yves Durand, Frédéric Rousseau:
SpDCache: Region-Based Reduction Cache for Outer-Product Sparse Matrix Kernels. ASAP 2024: 3-7 - 2023
- [j14]Bruno Ferres, Olivier Muller, Frédéric Rousseau:
A Chisel Framework for Flexible Design Space Exploration through a Functional Approach. ACM Trans. Design Autom. Electr. Syst. 28(4): 63:1-63:31 (2023) - [i3]Bruno Ferres, Olivier Muller, Frédéric Rousseau:
A Chisel Framework for Flexible Design Space Exploration through a Functional Approach. CoRR abs/2302.12702 (2023) - 2022
- [c66]Arthur Vianès, Frédéric Pétrot, Frédéric Rousseau:
A Case for Second-Level Software Cache Coherency on Many-Core Accelerators. RSP 2022: 29-35 - 2021
- [j13]Maxime France-Pillois, Jérôme Martin, Frédéric Rousseau:
A Non-Intrusive Tool Chain to Optimize MPSoC End-to-End Systems. ACM Trans. Archit. Code Optim. 18(2): 21:1-21:22 (2021) - [j12]Arif Sasongko, I. M. Narendra Kumara, Arief Wicaksana, Frédéric Rousseau, Olivier Muller:
Hardware Context Switch-based Cryptographic Accelerator for Handling Multiple Streams. ACM Trans. Reconfigurable Technol. Syst. 14(3): 14:1-14:25 (2021) - [c65]Louis Bonicel, Roland Bohrer, Benoit Leprettre, Frédéric Pétrot, Frédéric Rousseau:
Component Based Framework for Designing and Validating Asynchronous Algorithms for Electrical Measurement and Protection. ICPS 2021: 505-510 - [c64]Fearghal Morgan, Arthur Beretta, Ian Gallivan, Joseph Clancy, Frédéric Rousseau, Roshan George, László Bakó, Frank Callaly:
RISC-V Online Tutor. REV 2021: 131-143 - [c63]Bruno Ferres, Olivier Muller, Frédéric Rousseau:
Integrating Quick Resource Estimators in Hardware Construction Framework for Design Space Exploration. RSP 2021: 64-70 - 2020
- [c62]Bruno Ferres, Olivier Muller, Frédéric Rousseau:
Chisel Usecase: Designing General Matrix Multiply for FPGA. ARC 2020: 61-72 - [c61]Maxime France-Pillois, Jérôme Martin, Frédéric Rousseau:
Implementation and Evaluation of a Hardware Decentralized Synchronization Lock for MPSoCs. IPDPS 2020: 1112-1121
2010 – 2019
- 2019
- [c60]Louis Bonicel, Roland Bohrer, Benoit Leprettre, Frédéric Rousseau, Frédéric Pétrot:
Multi-Triggered Embedded Software Code Generation for Electrical Metering and Protection Applications. RSP 2019: 1-7 - 2018
- [c59]Maxime France-Pillois, Jérôme Martin, Frédéric Rousseau:
Optimization of the GNU OpenMP Synchronization Barrier in MPSoC. ARCS 2018: 57-69 - [c58]Maxime France-Pillois, Jérôme Martin, Frédéric Rousseau:
Linux synchronization barrier on MPSoC: Hardware/software accurate study and optimization. ASAP 2018: 1-4 - [c57]Maxime France-Pillois, Jérôme Martin, Frédéric Rousseau:
Accurate MPSoC Prototyping Platform and Methodology for the Studying of the Linux Synchronization Barrier Slowdown Issues. RSP 2018: 56-62 - 2017
- [c56]Arief Wicaksana, Alban Bourge, Olivier Muller, Arif Sasongko, Frédéric Rousseau:
Prototyping dynamic task migration on heterogeneous reconfigurable systems. RSP 2017: 16-22 - [e1]Sungjoo Yoo, Fabiano Hessel, Frédéric Rousseau, Kenneth B. Kent, Kyoungwoo Lee:
International Symposium on Rapid System Prototyping, RSP 2017, Shortening the Path from Specification to Prototype, October 19-20, 2017, Seoul, South Korea. ACM 2017, ISBN 978-1-4503-5418-9 [contents] - 2016
- [j11]Pier Stanislao Paolucci, Andrea Biagioni, Luis Gabriel Murillo, Frédéric Rousseau, Lars Schor, Laura Tosoratto, Iuliana Bacivarov, Robert Lajos Bücs, Clément Deschamps, Ashraf El Antably, Roberto Ammendola, Nicolas Fournel, Ottorino Frezza, Rainer Leupers, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Elena Pastorelli, Devendra Rai, Davide Rossetti, Francesco Simula:
Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms. J. Syst. Archit. 69: 29-53 (2016) - [j10]Otávio Alcântara de Lima Jr., Virginie Fresse, Frédéric Rousseau, Hamed Sheibanyrad:
Synthesis of dependency-aware traffic generators from NoC simulation traces. J. Syst. Archit. 71: 102-113 (2016) - [j9]Alban Bourge, Olivier Muller, Frédéric Rousseau:
Generating Efficient Context-Switch Capable Circuits through Autonomous Design Flow. ACM Trans. Reconfigurable Technol. Syst. 10(1): 9:1-9:23 (2016) - [c55]Simon Pontie, Alban Bourge, Adrien Prost-Boucle, Paolo Maistri, Olivier Muller, Régis Leveugle, Frédéric Rousseau:
HLS-Based Methodology for Fast Iterative Development Applied to Elliptic Curve Arithmetic. DSD 2016: 511-518 - [c54]Arief Wicaksana, Alban Bourge, Olivier Muller, Frédéric Rousseau:
Demonstration of a context-switch method for heterogeneous reconfigurable systems. FPL 2016: 1 - [c53]Otávio Alcântara de Lima Jr., Weslley N. Costa, Virginie Fresse, Frédéric Rousseau:
A survey of NoC evaluation platforms on FPGAs. FPT 2016: 221-224 - [c52]Arief Wicaksana, Adrien Prost-Boucle, Olivier Muller, Frédéric Rousseau, Arif Sasongko:
On-board non-regression test of HLS tools targeting FPGA. RSP 2016: 41-47 - [i2]Arief Wicaksana, Alban Bourge, Olivier Muller, Frédéric Rousseau:
Demonstration of a context-switch method for heterogeneous reconfigurable systems. CoRR abs/1611.06796 (2016) - 2015
- [c51]Ashraf El Antably, Olivier Gruber, Frédéric Rousseau, Nicolas Fournel:
Transparent and portable agent based task migration for data-flow applications on multi-tiled architectures. CODES+ISSS 2015: 183-192 - [c50]Ashraf El Antably, Nicolas Fournel, Frédéric Rousseau:
Integrating Task Migration Capability in Software Tool-Chain for Data-Flow Applications Mapped on Multi-tiled Architectures. DSD 2015: 33-40 - [c49]Alban Bourge, Olivier Muller, Frédéric Rousseau:
Automatic High-Level Hardware Checkpoint Selection for Reconfigurable Systems. FCCM 2015: 155-158 - [c48]Virginie Fresse, Catherine Combes, Matthieu Payet, Frédéric Rousseau:
Methodological Framework for NoC Resources Dimensioning on FPGAs. FNC/MobiSPC 2015: 391-396 - [c47]Alban Bourge, Olivier Muller, Frédéric Rousseau:
A Novel Method for Enabling FPGA Context-Switch (Abstract Only). FPGA 2015: 261 - [c46]Matthieu Payet, Virginie Fresse, Frédéric Rousseau, Pascal Remy:
Dynamic data flow analysis for NoC based application synthesis. RSP 2015: 61-67 - 2014
- [j8]Shahzad Ahmad Butt, Stéphane Mancini, Frédéric Rousseau, Luciano Lavagno:
Design of a pseudo-log image transform hardware accelerator in a high-level synthesis-based memory management framework. J. Electronic Imaging 23(5): 053012 (2014) - [j7]Adrien Prost-Boucle, Olivier Muller, Frédéric Rousseau:
Fast and standalone Design Space Exploration for High-Level Synthesis under resource constraints. J. Syst. Archit. 60(1): 79-93 (2014) - [c45]Otávio Alcântara de Lima Júnior, Virginie Fresse, Frédéric Rousseau:
Evaluation of SNMP-like protocol to manage a NoC emulation platform. FPT 2014: 199-206 - [c44]Lars Schor, Iuliana Bacivarov, Luis Gabriel Murillo, Pier Stanislao Paolucci, Frédéric Rousseau, Ashraf El Antably, Robert Buecs, Nicolas Fournel, Rainer Leupers, Devendra Rai, Lothar Thiele, Laura Tosoratto, Piero Vicini, Jan Weinstock:
EURETILE Design Flow: Dynamic and Fault Tolerant Mapping of Multiple Applications Onto Many-Tile Systems. ISPA 2014: 182-189 - [c43]Hui Chen, Guillaume Godet-Bar, Frédéric Rousseau, Frédéric Pétrot:
Device driver generation targeting multiple operating systems using a model-driven methodology. RSP 2014: 30-36 - [c42]Ashraf El Antably, Nicolas Fournel, Frédéric Rousseau:
Lightweight task migration in embedded multi-tiled architectures using task code replication. RSP 2014: 93-99 - 2013
- [c41]Adrien Prost-Boucle, Olivier Muller, Frédéric Rousseau:
A Fast and Autonomous HLS Methodology for Hardware Accelerator Generation under Resource Constraints. DSD 2013: 201-208 - [c40]Mohamad Jaber, Alexandre Chagoya-Garzon, Frédéric Rousseau:
From system model formalization towards correct and efficient HW/SW design. DTIS 2013: 88-93 - [c39]Junyan Tan, Virginie Fresse, Frédéric Rousseau:
Adaptive NoC-based MPSoC system for spectral imaging algorithm dedicated to art authentication. EUSIPCO 2013: 1-5 - [c38]Shahzad Ahmad Butt, Stéphane Mancini, Frédéric Rousseau, Luciano Lavagno:
Design of a pseudo-log image transform IP in an HLS-based memory management framework. Real-Time Image and Video Processing 2013: 86560B - [c37]Otávio Alcântara de Lima Júnior, Virginie Fresse, Frédéric Rousseau:
FlexOE: A congestion-aware routing algorithm for NoCs. RSP 2013: 51-57 - [i1]Pier Stanislao Paolucci, Iuliana Bacivarov, Gert Goossens, Rainer Leupers, Frédéric Rousseau, Christoph Schumacher, Lothar Thiele, Piero Vicini:
EURETILE 2010-2012 summary: first three years of activity of the European Reference Tiled Experiment. CoRR abs/1305.1459 (2013) - 2012
- [c36]Stéphane Mancini, Frédéric Rousseau:
Enhancing non-linear kernels by an optimized memory hierarchy in a High Level Synthesis flow. DATE 2012: 1130-1133 - [c35]Alexandre Chagoya-Garzon, Frédéric Rousseau, Frédéric Pétrot:
Multi-device Driver Synthesis Flow for Heterogeneous Hierarchical Systems. DSD 2012: 389-396 - [c34]Virginie Fresse, Zhiwei Ge, Junyan Tan, Frédéric Rousseau:
Case study: Deployment of the 2D NoC on 3D for the generation of large emulation platforms. IPTA 2012: 435-441 - [c33]Virginie Fresse, Zhiwei Ge, Junyan Tan, Frédéric Rousseau:
Case study: Deployment of the 2D NoC on 3D for the generation of large emulation platforms. RSP 2012: 23-29 - 2011
- [c32]Alexandre Chagoya-Garzon, Nicolas Poste, Frédéric Rousseau:
Semi-automation of Configuration Files Generation for Heterogeneous Multi-tile Systems. COMPSAC 2011: 157-166 - [c31]Junyan Tan, Virginie Fresse, Frédéric Rousseau:
From mono-FPGA to multi-FPGA emulation platform for NoC performance evaluations. PARCO 2011: 603-610 - [c30]Hui Chen, Guillaume Godet-Bar, Frédéric Rousseau, Frédéric Pétrot:
Me3D: A model-driven methodology expediting embedded device driver development. International Symposium on Rapid System Prototyping 2011: 171-177 - [c29]Junyan Tan, Virginie Fresse, Frédéric Rousseau:
Generation of emulation platforms for NoC exploration on FPGA. International Symposium on Rapid System Prototyping 2011: 186-192 - 2010
- [c28]Virginie Fresse, Junyan Tan, Frédéric Rousseau:
Exploration of an adaptive NoC architecture on FPGA dedicated to multi and hysperspectral algorithm for art authentication. IPTA 2010: 529-534 - [c27]Amin El Mrabti, Frédéric Rousseau, Frédéric Pétrot, Jérôme Martin, Romain Lemaire, Emmanuel Vaumorin:
Design environment for the support of configurable Network Interfaces in NoC-based platforms. ICSAMOS 2010: 63-70
2000 – 2009
- 2009
- [j6]Michel Metzger, Amine Anane, Frédéric Rousseau, Julie Vachon, El Mostapha Aboulhamid:
Introspection mechanisms for runtime verification in a system-level design environment. Microelectron. J. 40(7): 1124-1134 (2009) - [c26]Amin El Mrabti, Hamed Sheibanyrad, Frédéric Rousseau, Frédéric Pétrot, Romain Lemaire, Jérôme Martin:
Abstract Description of System Application and Hardware Architecture for Hardware/Software Code Generation. DSD 2009: 567-574 - [c25]Alexandre Chagoya-Garzon, Xavier Guerin, Frédéric Rousseau, Frédéric Pétrot, Davide Rossetti, Alessandro Lonardo, Piero Vicini, Pier Stanislao Paolucci:
Synthesis of Communication Mechanisms for Multi-tile Systems Based on Heterogeneous Multi-processor System-On-Chips. IEEE International Workshop on Rapid System Prototyping 2009: 48-54 - 2008
- [j5]Katalin Popovici, Xavier Guerin, Frédéric Rousseau, Pier Stanislao Paolucci, Ahmed Amine Jerraya:
Platform-based software design flow for heterogeneous MPSoC. ACM Trans. Embed. Comput. Syst. 7(4): 39:1-39:23 (2008) - [c24]Benaoumeur Senouci, Abdellah-Medjadji Kouadri-Kouadri, Frédéric Rousseau, Frédéric Pétrot:
Multi-CPU/FPGA Platform Based Heterogeneous Multiprocessor Prototyping: New Challenges for Embedded Software Designers. IEEE International Workshop on Rapid System Prototyping 2008: 41-47 - 2007
- [j4]Benaoumeur Senouci, Aimen Bouchhima, Frédéric Rousseau, Frédéric Pétrot, Ahmed Amine Jerraya:
Prototyping Multiprocessor System-on-Chip Applications: A Platform-Based Approach. IEEE Distributed Syst. Online 8(5) (2007) - [c23]Xavier Guerin, Katalin Popovici, Wassim Youssef, Frédéric Rousseau, Ahmed Amine Jerraya:
Flexible Application Software Generation for Heterogeneous Multi-Processor System-on-Chip. COMPSAC (1) 2007: 279-286 - [c22]Mathieu Dubois, El Mostapha Aboulhamid, Frédéric Rousseau:
Acceleration for Heterogeneous Systems Cosimulation. ICECS 2007: 294-297 - [c21]Katalin Popovici, Xavier Guerin, Frédéric Rousseau, Pier Stanislao Paolucci, Ahmed Amine Jerraya:
Efficient Software Development Platforms for Multimedia Applications at Different Abstraction Levels. IEEE International Workshop on Rapid System Prototyping 2007: 113-122 - 2006
- [c20]Mathieu Dubois, El Mostapha Aboulhamid, Frédéric Rousseau:
Towards an Efficient Simulation of Multi-Language Descriptions of Heterogeneous Systems. APCCAS 2006: 538-541 - [c19]Alena Tsikhanovich, Frédéric Rousseau, El Mostapha Aboulhamid, Guy Bois:
Transaction Level Modeling in Hardware/Software System Design using .Net Framework. CCECE 2006: 140-143 - [c18]Michel Metzger, Frédéric Bastien, Frédéric Rousseau, Julie Vachon, El Mostapha Aboulhamid:
A Verification Tool Implementation using Introspection Mechanism. FDL 2006: 265-272 - [c17]Mathieu Dubois, El Mostapha Aboulhamid, Frédéric Rousseau:
Acceleration for a compiled Transaction Level Modeling simulation. ICECS 2006: 1176-1179 - [c16]Benaoumeur Senouci, Aimen Bouchhima, Frédéric Rousseau, Frédéric Pétrot, Ahmed Amine Jerraya:
Fast Prototyping of POSIX Based Applications on a Multiprocessor SoC Architecture: "Hardware-Dependent Software Oriented Approach". IEEE International Workshop on Rapid System Prototyping 2006: 69-75 - [c15]Michel Metzger, Frédéric Bastien, Frédéric Rousseau, Julie Vachon, El Mostapha Aboulhamid:
Introspection Mechanisms for Semi-Formal Verification in a System-Level Design Environment. IEEE International Workshop on Rapid System Prototyping 2006: 91-97 - 2005
- [j3]Ferid Gharsalli, Frédéric Rousseau, Ahmed Amine Jerraya:
Conception des interfaces logiciel-matériel pour l'intégration des mémoires globales dans les systèmes monopuces. Tech. Sci. Informatiques 24(4): 369-394 (2005) - [c14]Adriano Sarmento, Lobna Kriaa, Arnaud Grasset, Mohamed-Wassim Youssef, Aimen Bouchhima, Frédéric Rousseau, Wander O. Cesário, Ahmed Amine Jerraya:
Service dependency graph: an efficient model for hardware/software interfaces modeling and generation for SoC design. CODES+ISSS 2005: 261-266 - [c13]Arnaud Grasset, Frédéric Rousseau, Ahmed Amine Jerraya:
Automatic Generation of Component Wrappers by Composition of Hardware Library Elements Starting from Communication Service Specification. IEEE International Workshop on Rapid System Prototyping 2005: 47-53 - 2004
- [c12]Arnaud Grasset, Frédéric Rousseau, Ahmed Amine Jerraya:
Network Interface Generation for MPSOC: From Communication Service Requirements to RTL Implementation. IEEE International Workshop on Rapid System Prototyping 2004: 66-69 - 2003
- [j2]Arif Sasongko, Amer Baghdadi, Frédéric Rousseau, Ahmed Amine Jerraya:
Towards SoC Validation Through Prototyping: A Systematic Approach Based on Reconfigurable Platform. Des. Autom. Embed. Syst. 8(2-3): 155-171 (2003) - [c11]Arif Sasongko, Amer Baghdadi, Frédéric Rousseau, Ahmed Amine Jerraya:
Embedded Application Prototyping on a Communication-Restricted Reconfigurable. IEEE International Workshop on Rapid System Prototyping 2003: 33-39 - 2002
- [c10]Ferid Gharsalli, Samy Meftali, Frédéric Rousseau, Ahmed Amine Jerraya:
Automatic generation of embedded memory wrapper for multiprocessor SoC. DAC 2002: 596-601 - [c9]Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali, Frédéric Rousseau, Ferid Gharsalli:
Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design. ISSS 2002: 26-31 - 2001
- [c8]Samy Meftali, Ferid Gharsalli, Frédéric Rousseau, Ahmed Amine Jerraya:
Automatic Code-Transformation and Architecture Refinement for Application-Specific Multiprocessor SoCs with Shared Memory. VLSI-SOC 2001: 193-204 - [c7]Samy Meftali, Ferid Gharsalli, Frédéric Rousseau, Ahmed Amine Jerraya:
An optimal memory allocation for application-specific multiprocessor system-on-chip. ISSS 2001: 19-24
1990 – 1999
- 1997
- [j1]Laurent Freund, Michel Israël, Frédéric Rousseau, J. M. Bergé, Michel Auguin, Cécile Belleudy, Guy Gogniat:
A codesign experiment in acoustic echo cancellation GMDF. ACM Trans. Design Autom. Electr. Syst. 2(4): 365-383 (1997) - [c6]Laurent Freund, Denis Dupont, Michel Israël, Frédéric Rousseau:
Interface Optimization During Hardware-Software Partitioning. CODES 1997: 75-79 - [c5]Laurent Freund, Denis Dupont, Michel Israël, Frédéric Rousseau:
Overview of the ECOS project. IEEE International Workshop on Rapid System Prototyping 1997: 39-43 - 1996
- [c4]Frédéric Rousseau, J. M. Bergé, Michel Israël:
Hardware/Software Partitioning for Telecommunications Systems. COMPSAC 1996: 483-488 - [c3]Laurent Freund, Michel Israël, Frédéric Rousseau, J. M. Bergé, Michel Auguin, Cécile Belleudy, Guy Gogniat:
A Codesign Experiment in Acoustic Echo Cancellation: GMDFa. ISSS 1996: 83- - 1995
- [c2]Frédéric Rousseau, Judith Benzakki, J. M. Bergé, Michel Israël:
Adaptation of force-directed scheduling algorithm for hardware/software partitioning. RSP 1995: 33-39 - 1994
- [c1]Michel Auguin, Mohamed Belhadj, Judith Benzakki, C. Carrière, Guy Durrieu, Thierry Gautier, Michel Israël, Paul Le Guernic, Michel Lemaître, E. Martin, Patrice Quinton, Laurence Rideau, Frédéric Rousseau, Olivier Sentieys:
Towards a multi-formalism framework for architectural synthesis: the ASAR project. CODES 1994: 25-32
Coauthor Index
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