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Mehrdad Reshadi
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2010 – 2019
- 2015
- [c21]Parvez Ahammad, R. Gaunker, Brian Kennedy, Mehrdad Reshadi, K. Kumar, A. K. Pathan, Hariharan Kolam:
A flexible platform for QoE-driven delivery of image-rich web applications. ICME 2015: 1-6 - [c20]Ashok Anand, Mehrdad Reshadi, Bowei Du, Hariharan Kolam, Sharad Jaiswal, Aditya Akella:
A case for application-managed cache for browser. ICME 2015: 1-6 - 2014
- [c19]Behnam Robatmili, Calin Cascaval, Mehrdad Reshadi, Madhukar N. Kedlaya, Seth Fowler, Vrajesh Bhavsar, Michael Weber, Ben Hardekopf:
MuscalietJS: rethinking layered dynamic web runtimes. VEE 2014: 77-88 - 2013
- [c18]Madhukar N. Kedlaya, Jared Roesch, Behnam Robatmili, Mehrdad Reshadi, Ben Hardekopf:
Improved type specialization for dynamic scripting languages. DLS 2013: 37-48 - [c17]Calin Cascaval, Seth Fowler, Pablo Montesinos-Ortego, Wayne Piekarski, Mehrdad Reshadi, Behnam Robatmili, Michael Weber, Vrajesh Bhavsar:
ZOOMM: a parallel web browser engine for multicore mobile devices. PPoPP 2013: 271-280 - 2012
- [c16]Mehrdad Reshadi, Calin Cascaval:
Multidimensional dynamic behavior in mobile computing. IISWC 2012: 113-115
2000 – 2009
- 2009
- [j4]Mehrdad Reshadi, Prabhat Mishra, Nikil D. Dutt:
Hybrid-compiled simulation: An efficient technique for instruction-set architecture simulation. ACM Trans. Embed. Comput. Syst. 8(3): 20:1-20:27 (2009) - 2008
- [j3]Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski:
Merged Dictionary Code Compression for FPGA Implementation of Custom Microcoded PEs. ACM Trans. Reconfigurable Technol. Syst. 1(2): 11:1-11:21 (2008) - [c15]Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski:
C-based design flow: a case study on G.729A for voice over internet protocol (VoIP). DAC 2008: 72-75 - 2007
- [c14]Mehrdad Reshadi, Daniel Gajski:
Interrupt and low-level programming support for expanding the application domain of statically-scheduled horizontal-microcoded architectures in embedded systems. DATE 2007: 1337-1342 - [i1]Mehrdad Reshadi, Nikil D. Dutt:
Generic Pipelined Processor Modeling and High Performance Cycle-Accurate Simulator Generation. CoRR abs/0710.4643 (2007) - 2006
- [j2]Mehrdad Reshadi, Bita Gorjiara, Nikil D. Dutt:
Generic Processor Modeling for Automatically Generating Very Fast Cycle-Accurate Simulators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12): 2904-2918 (2006) - [j1]Mehrdad Reshadi, Nikil D. Dutt, Prabhat Mishra:
A retargetable framework for instruction-set architecture simulation. ACM Trans. Embed. Comput. Syst. 5(2): 431-452 (2006) - [c13]Bita Gorjiara, Mehrdad Reshadi, Daniel D. Gajski:
Designing a custom architecture for DCT using NISC technology. ASP-DAC 2006: 116-117 - [c12]Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah, Daniel Gajski:
Generic netlist representation for system and PE level design exploration. CODES+ISSS 2006: 282-287 - [c11]Jelena Trajkovic, Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski:
A Graph Based Algorithm for Data Path Optimization in Custom Processors. DSD 2006: 496-503 - [c10]Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski:
Aspect-Oriented Architecture Description for Retargetable Compilation, Simulation and Synthesis of Application-Specific Pipelined Datapaths . ICCD 2006: 356-361 - 2005
- [c9]Mehrdad Reshadi, Daniel Gajski:
A cycle-accurate compilation algorithm for custom pipelined datapaths. CODES+ISSS 2005: 21-26 - [c8]Mehrdad Reshadi, Prabhat Mishra:
Memory access optimizations in instruction-set simulators. CODES+ISSS 2005: 237-242 - [c7]Mehrdad Reshadi, Nikil D. Dutt:
Generic Pipelined Processor Modeling and High Performance Cycle-Accurate Simulator Generation. DATE 2005: 786-791 - [c6]Mehrdad Reshadi, Bita Gorjiara, Daniel D. Gajski:
Utilizing Horizontal and Vertical Parallelism with a No-Instruction-Set Compiler for Custom Datapaths. ICCD 2005: 69-76 - 2004
- [c5]Bita Gorjiara, Pai H. Chou, Nader Bagherzadeh, Mehrdad Reshadi, David W. Jensen:
Fast and efficient voltage scheduling by evolutionary slack distribution. ASP-DAC 2004: 659-662 - 2003
- [c4]Mehrdad Reshadi, Nikhil Bansal, Prabhat Mishra, Nikil D. Dutt:
An efficient retargetable framework for instruction-set simulation. CODES+ISSS 2003: 13-18 - [c3]Mehrdad Reshadi, Prabhat Mishra, Nikil D. Dutt:
Instruction set compiled simulation: a technique for fast and flexible instruction set simulation. DAC 2003: 758-763 - [c2]Mehrdad Reshadi, Nikil D. Dutt:
Reducing Compilation Time Overhead in Compiled Simulators. ICCD 2003: 151- - 2002
- [c1]Alexandru Nicolau, Nikil D. Dutt, Rajesh Gupta, Nick Savoiu, Mehrdad Reshadi, Sumit Gupta:
Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis. ISSS 2002: 261-266
Coauthor Index
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