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Muhammad Hassan 0002
Person information
- affiliation: University of Bremen, Institute of Computer Science, Germany
Other persons with the same name
- Muhammad Hassan — disambiguation page
- Muhammad Hassan 0001 (aka: Muhammad Hassan Raza Khan) — National Institute of Standards and Technology, NIST, Gaithersburg, MD, US (and 1 more)
- Muhammad Hassan 0003 — National University of Sciences and Technology, School of Electrical Engineering and Computer Sciences, Islamabad, Pakistan
- Muhammad Hassan 0004 — Uppsala University, Sweden
- Muhammad Hassan 0005 — University of Illinois at Urbana-Champaign, Champaign, IL, USA
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2020 – today
- 2024
- [j4]Chandan Kumar Jha, Muhammad Hassan, Rolf Drechsler:
cecApprox: Enabling Automated Combinational Equivalence Checking for Approximate Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 71(7): 3282-3293 (2024) - [j3]Chandan Kumar Jha, Khushboo Qayyum, Kemal Çaglar Coskun, Simranjeet Singh, Muhammad Hassan, Rainer Leupers, Farhad Merchant, Rolf Drechsler:
veriSIMPLER: An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing. IEEE Trans. Circuits Syst. I Regul. Pap. 71(9): 4169-4179 (2024) - [j2]Kousik Bhunia, Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler:
ReSG: A Data Structure for Verification of Majority-based In-memory Computing on ReRAM Crossbars. ACM Trans. Embed. Comput. Syst. 23(6): 90:1-90:24 (2024) - [c19]Ece Nur Demirhan Coskun, Sallar Ahmadi-Pour, Muhammad Hassan, Rolf Drechsler:
Security Coverage Metrics for Information Flow at the System Level. ASPDAC 2024: 945-950 - [c18]Muhammad Hassan, Sallar Ahmadi-Pour, Khushboo Qayyum, Chandan Kumar Jha, Rolf Drechsler:
LLM-Guided Formal Verification Coupled with Mutation Testing. DATE 2024: 1-2 - [c17]Khushboo Qayyum, Abhoy Kole, Kamalika Datta, Muhammad Hassan, Rolf Drechsler:
Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification. ACM Great Lakes Symposium on VLSI 2024: 502-506 - 2023
- [c16]Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler:
Automated Equivalence Checking Method for Majority Based In-Memory Computing on ReRAM Crossbars. ASP-DAC 2023: 19-25 - [c15]Kemal Çaglar Coskun, Muhammad Hassan, Rolf Drechsler:
Equivalence Checking of System-Level and SPICE-Level Models of Static Nonlinear Circuits. DATE 2023: 1-6 - [c14]Jens Trommer, Niladri Bhattacharjee, Thomas Mikolajick, Sebastian Huhn, Marcel Merten, Mohammed E. Djeridane, Muhammad Hassan, Rolf Drechsler, Shubham Rai, Nima Kavand, Armin Darjani, Akash Kumar, V. Sessi, M. Drescher, S. Kolodinski, M. Wiatr:
Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable Transistors. DATE 2023: 1-6 - [c13]Marcel Merten, Muhammad Hassan, Rolf Drechsler:
Quality Assessment of Logic Locking Mechanisms using Pseudo-Boolean Optimization Techniques. DDECS 2023: 105-110 - [c12]Weiyan Zhang, Mehran Goli, Muhammad Hassan, Rolf Drechsler:
Efficient ML-Based Performance Estimation Approach Across Different Microarchitectures for RISC-V Processors. DSD 2023: 693-699 - [c11]Ece Nur Demirhan Coskun, Muhammad Hassan, Mehran Goli, Rolf Drechsler:
VAST: Validation of VP-based Heterogeneous Systems against Availability Security Properties using Static Information Flow Tracking. ISQED 2023: 1-8 - 2022
- [c10]Kemal Çaglar Coskun, Muhammad Hassan, Rolf Drechsler:
Equivalence Checking of System-Level and SPICE-Level Models of Linear Analog Filters. DDECS 2022: 160-165 - 2021
- [b1]Muhammad Hassan:
Enhanced modern virtual prototype based verification flow for heterogeneous systems. University of Bremen, Germany, 2021, pp. 1-182 - [c9]Muhammad Hassan, Daniel Große, Rolf Drechsler:
System-Level Verification of Linear and Non-Linear Behaviors of RF Amplifiers using Metamorphic Relations. ASP-DAC 2021: 761-766 - [c8]Muhammad Hassan, Daniel Große, Rolf Drechsler:
System Level Verification of Phase-Locked Loop using Metamorphic Relations. DATE 2021: 1378-1381
2010 – 2019
- 2019
- [j1]Mehran Goli, Muhammad Hassan, Daniel Große, Rolf Drechsler:
Security validation of VP-based SoCs using dynamic information flow tracking. it Inf. Technol. 61(1): 45-58 (2019) - [c7]Muhammad Hassan, Daniel Große, Hoang M. Le, Rolf Drechsler:
Data Flow Testing for SystemC-AMS Timed Data Flow Models. DATE 2019: 366-371 - [c6]Muhammad Hassan, Daniel Große, Thilo Vörtler, Karsten Einwich, Rolf Drechsler:
Functional Coverage-Driven Characterization of RF Amplifiers. FDL 2019: 1-8 - [c5]Mehran Goli, Muhammad Hassan, Daniel Große, Rolf Drechsler:
Automated Analysis of Virtual Prototypes at Electronic System Level. ACM Great Lakes Symposium on VLSI 2019: 307-310 - 2018
- [c4]Muhammad Hassan, Daniel Große, Hoang M. Le, Thilo Vörtler, Karsten Einwich, Rolf Drechsler:
Testbench qualification for SystemC-AMS timed data flow models. DATE 2018: 857-860 - 2017
- [c3]Muhammad Hassan, Vladimir Herdt, Hoang M. Le, Mingsong Chen, Daniel Große, Rolf Drechsler:
Data flow testing for virtual prototypes. DATE 2017: 380-385 - [c2]Muhammad Hassan, Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler:
Early SoC security validation by VP-based static information flow analysis. ICCAD 2017: 400-407 - 2016
- [c1]Daniel Große, Hoang M. Le, Muhammad Hassan, Rolf Drechsler:
Guided lightweight Software test qualification for IP integration using Virtual Prototypes. ICCD 2016: 606-613
Coauthor Index
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last updated on 2024-10-31 21:12 CET by the dblp team
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