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ORCIDKamalika Datta
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2020 – today
- 2024
[j23]Mojtaba Noorallahzadeh, Mohammad Mosleh, Kamalika Datta:
A new design of parity-preserving reversible multipliers based on multiple-control toffoli synthesis targeting emerging quantum circuits. Frontiers Comput. Sci. 18(6): 186908 (2024)- [j22]Kousik Bhunia
, Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler:
ReSG: A Data Structure for Verification of Majority-based In-memory Computing on ReRAM Crossbars. ACM Trans. Embed. Comput. Syst. 23(6): 90:1-90:24 (2024) - [c52]Abhoy Kole, Arighna Deb, Kamalika Datta, Rolf Drechsler:
Dynamic Realization of Multiple Control Toffoli Gate. DATE 2024: 1-6 - [c51]Lennart Weingarten, Kamalika Datta, Abhoy Kole, Rolf Drechsler:
Complete and Efficient Verification for a RISC-V Processor Using Formal Verification. DATE 2024: 1-6 - [c50]Khushboo Qayyum, Abhoy Kole, Kamalika Datta, Muhammad Hassan, Rolf Drechsler:
Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification. ACM Great Lakes Symposium on VLSI 2024: 502-506 - [c49]Abhoy Kole, Kamalika Datta, Rolf Drechsler:
Design Automation Challenges and Benefits of Dynamic Quantum Circuit in Present NISQ Era and Beyond: (Invited Paper). ISVLSI 2024: 601-606 - [c48]Liam Hurwitz, Kamalika Datta, Abhoy Kole, Rolf Drechsler:
Is Simulation the only Alternative for Effective Verification of Dynamic Quantum Circuits? RC 2024: 201-217 - [c47]Abhoy Kole, Kamalika Datta, Rolf Drechsler:
Exploring the Potential of Dynamic Quantum Circuit for Improving Device Scalability. SOCC 2024: 1-5 - [c46]Fatemeh Shirinzadeh, Arighna Deb, Saeideh Shirinzadeh, Abhoy Kole, Kamalika Datta, Rolf Drechsler:
In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures. VLSID 2024: 384-389 - [i2]Abhoy Kole, Mohammed E. Djeridane, Lennart Weingarten, Kamalika Datta, Rolf Drechsler:
qSAT: Design of an Efficient Quantum Satisfiability Solver for Hardware Equivalence Checking. CoRR abs/2409.03917 (2024) - 2023
- [j21]Kamalika Datta, Arighna Deb, Abhoy Kole, Rolf Drechsler:
Impact of sneak paths on in-memory logic design in memristive crossbars. it Inf. Technol. 65(1-2): 29-39 (2023) - [c45]Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler:
Automated Equivalence Checking Method for Majority Based In-Memory Computing on ReRAM Crossbars. ASP-DAC 2023: 19-25 - [c44]Abhoy Kole, Arighna Deb, Kamalika Datta, Rolf Drechsler:
Extending the Design Space of Dynamic Quantum Circuits for Toffoli based Network. DATE 2023: 1-6 - [c43]Kamalika Datta, Rolf Drechsler:
Memristors: Device Modeling, Design and Verification. iSES 2023: 254-259 - [c42]Lennart Weingarten, Kamalika Datta, Rolf Drechsler:
PolyMiR: Polynomial Formal Verification of the MicroRV32 Processor. NANOARCH 2023: 24:1-24:6 - [c41]Kamalika Datta, Arighna Deb, Fatemeh Shirinzadeh, Abhoy Kole, Saeideh Shirinzadeh, Rolf Drechsler:
Verification of In-Memory Logic Design using ReRAM Crossbars. NEWCAS 2023: 1-5 - [c40]Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler:
Improved Cost-Metric for Nearest Neighbor Mapping of Quantum Circuits to 2-Dimensional Hexagonal Architecture. RC 2023: 218-231 - [c39]Abhoy Kole, Kamalika Datta, Philipp Niemann, Indranil Sengupta, Rolf Drechsler:
Exploiting the Benefits of Clean Ancilla Based Toffoli Gate Decomposition Across Architectures. RC 2023: 232-244 - 2022
- [j20]Dev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Sandip Chakraborty, Rolf Drechsler, Indranil Sengupta:
FAMCroNA: Fault Analysis in Memristive Crossbars for Neuromorphic Applications. J. Electron. Test. 38(2): 145-163 (2022) - [j19]F. Lalchhandama, Mukesh Sahani, Vompolu Mohan Srinivas, Indranil Sengupta, Kamalika Datta:
In-Memory Computing on Resistive RAM Systems Using Majority Operation. J. Circuits Syst. Comput. 31(4): 2250071:1-2250071:24 (2022) - [j18]F. Lalchhandama, Kamalika Datta, Sandip Chakraborty, Rolf Drechsler, Indranil Sengupta:
CoMIC: Complementary Memristor based in-memory computing in 3D architecture. J. Syst. Archit. 126: 102480 (2022) - [j17]Dev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Sandip Chakraborty, Rolf Drechsler, Indranil Sengupta:
Feed-Forward learning algorithm for resistive memories. J. Syst. Archit. 131: 102730 (2022) - [c38]Abhoy Kole, Kamalika Datta, Indranil Sengupta, Rolf Drechsler:
SAT-based Exact Synthesis of Ternary Reversible Circuits using a Functionally Complete Gate Library. DSD 2022: 769-776 - [c37]Kamalika Datta, Saeideh Shirinzadeh, Phrangboklang Lyngton Thangkhiew, Indranil Sengupta, Rolf Drechsler:
Unlocking Sneak Path Analysis in Memristor Based Logic Design Styles. DSD 2022: 793-800 - [c36]Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler:
Mapping Quantum Circuits to 2-Dimensional Quantum Architectures. GI-Jahrestagung 2022: 1109-1120 - [c35]Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler:
Nearest Neighbor Mapping of Quantum Circuits to Two-Dimensional Hexagonal Qubit Architecture. ISMVL 2022: 35-42 - [c34]Kamalika Datta, Saman Fröhlich, Saeideh Shirinzadeh, Dev Narayan Yadav, Indranil Sengupta, Rolf Drechsler:
Unlocking High Resolution Arithmetic Operations within Memristive Crossbars for Error Tolerant Applications. VLSI-SoC 2022: 1-6 - 2020
- [j16]Phrangboklang Lyngton Thangkhiew, Alwin Zulehner, Robert Wille, Kamalika Datta, Indranil Sengupta:
An efficient memristor crossbar architecture for mapping Boolean functions using Binary Decision Diagrams (BDD). Integr. 71: 125-133 (2020) - [j15]P. Mercy Nesa Rani, Kamalika Datta:
Improved Ternary Reversible Logic Synthesis Using Group Theoretic Approach. J. Circuits Syst. Comput. 29(12): 2050192:1-2050192:24 (2020) - [j14]Abhoy Kole, Stefan Hillmich, Kamalika Datta, Robert Wille, Indranil Sengupta:
Improved Mapping of Quantum Circuits to IBM QX Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2375-2383 (2020) - [c33]Abdallah M. Felfel, Kamalika Datta, Arko Dutt, Hasita Veluri, Ahmed Zaky, Aaron Voon-Yew Thean, Mohamed M. Sabry Aly:
Quantifying the Benefits of Monolithic 3D Computing Systems Enabled by TFT and RRAM. DATE 2020: 43-48 - [c32]Kamalika Datta, Arko Dutt, Ahmed Zaky, Umesh Chand, Devendra Singh, Yida Li, Jackson Chun-Yang Huang, Aaron Thean, Mohamed M. Sabry Aly:
Fledge: Flexible Edge Platforms Enabled by In-memory Computing. DATE 2020: 1181-1186
2010 – 2019
- 2019
- [j13]Dev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, Kamalika Datta:
Look-ahead mapping of Boolean functions in memristive crossbar array. Integr. 64: 152-162 (2019) - [j12]Leniency Marbaniang, Kamalika Datta:
Efficient Design of Quantum Circuits Using Nearest Neighbor Constraint in 3D Architecture. J. Circuits Syst. Comput. 28(5): 1950084:1-1950084:19 (2019) - [c31]Alwin Zulehner, Kamalika Datta, Indranil Sengupta, Robert Wille:
A staircase structure for scalable and efficient synthesis of memristor-aided logic. ASP-DAC 2019: 237-242 - [c30]Naveen Murali G, Peddireddi Satya Vardhan, F. Lalchhandama, Kamalika Datta, Indranil Sengupta:
Mapping of Boolean Logic Functions onto 3D Memristor Crossbar. VLSID 2019: 500-501 - [c29]Tathagato Bose, Kamalika Datta, Indranil Sengupta:
Exploiting Negative Control Lines and Nearest Neighbor for Improved Comparator Design. VLSID 2019: 514-515 - [c28]Yaswanth Krishna Yadav Danaboina, Pravanjan Samanta, Kamalika Datta, Indrajit Chakrabarti, Indranil Sengupta:
Design and Implementation of Threshold Logic Functions Using Memristors. VLSID 2019: 518-519 - 2018
- [j11]Phrangboklang Lyngton Thangkhiew, Kamalika Datta:
Scalable in-memory mapping of Boolean functions in memristive crossbar array using simulated annealing. J. Syst. Archit. 89: 49-59 (2018) - [j10]Abhoy Kole, Kamalika Datta, Indranil Sengupta:
A New Heuristic for N-Dimensional Nearest Neighbor Realization of a Quantum Circuit. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(1): 182-192 (2018) - [j9]Phrangboklang Lyngton Thangkhiew, Rahul Gharpinde, Kamalika Datta:
Efficient Mapping of Boolean Functions to Memristor Crossbar Using MAGIC NOR Gates. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(8): 2466-2476 (2018) - [j8]Rahul Gharpinde, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Indranil Sengupta:
A Scalable In-Memory Logic Synthesis Approach Using Memristor Crossbar. IEEE Trans. Very Large Scale Integr. Syst. 26(2): 355-366 (2018) - [c27]Phrangboklang Lyngton Thangkhiew, Kamalika Datta:
Fast In-Memory Computation of Boolean Functions in Memristive Crossbar Array. ISED 2018: 105-109 - [c26]Naveen Murali G, F. Lalchhandama, Kamalika Datta, Indranil Sengupta:
Modelling and Simulation of Non-Ideal MAGIC NOR Gates on Memristor Crossbar. ISED 2018: 124-128 - [c25]Alwin Zulehner, P. Mercy Nesa Rani, Kamalika Datta, Indranil Sengupta, Robert Wille:
Generalizing the Concept of Scalable Reversible Circuit Synthesis for Multiple-Valued Logic. ISMVL 2018: 115-120 - [c24]Saeideh Shirinzadeh, Kamalika Datta, Rolf Drechsler:
Logic Design Using Memristors: An Emerging Technology. ISMVL 2018: 121-126 - 2017
- [c23]Abhoy Kole, P. Mercy Nesa Rani, Kamalika Datta, Indranil Sengupta, Rolf Drechsler:
Exact Synthesis of Ternary Reversible Functions Using Ternary Toffoli Gates. ISMVL 2017: 179-184 - [c22]Abhoy Kole, Robert Wille, Kamalika Datta, Indranil Sengupta:
Test Pattern Generation Effort Evaluation of Reversible Circuits. RC 2017: 162-175 - [c21]P. Mercy Nesa Rani, Abhoy Kole, Kamalika Datta, Indranil Sengupta:
Improved Decomposition of Multiple-Control Ternary Toffoli Gates Using Muthukrishnan-Stroud Quantum Gates. RC 2017: 202-213 - [c20]Leniency Marbaniang, Abhoy Kole, Kamalika Datta, Indranil Sengupta:
Design of Efficient Quantum Circuits Using Nearest Neighbor Constraint in 2D Architecture. RC 2017: 248-253 - [c19]Abhoy Kole, Kamalika Datta:
Improved NCV Gate Realization of Arbitrary Size Toffoli Gates. VLSID 2017: 289-294 - [i1]Rajarshi Ray, Arup Deka, Kamalika Datta:
Exact Synthesis of Reversible Logic Circuits using Model Checking. CoRR abs/1702.07470 (2017) - 2016
- [j7]Abhoy Kole, Kamalika Datta, Indranil Sengupta:
A Heuristic for Linear Nearest Neighbor Realization of Quantum Circuits by SWAP Gate Insertion Using N-Gate Lookahead. IEEE J. Emerg. Sel. Topics Circuits Syst. 6(1): 62-72 (2016) - [c18]Phrangboklang Lyngton Thangkhiew, Rahul Gharpinde, Varun Chowdhary Paturi, Kamalika Datta, Indranil Sengupta:
Area efficient implementation of ripple carry adder using memristor crossbar arrays. IDT 2016: 142-147 - [c17]Shuchishman Burman, Kamalika Datta, Robert Wille, Indranil Sengupta, Rolf Drechsler:
An improved gate library for logic synthesis of optical circuits. ISED 2016: 1-6 - [c16]Arghya P. Saikia Thengal, Naman Rastogi, Abhilash Medhi, Ritu Ranjan Shrivastwa, Kamalika Datta:
Parameter sensing and object tracking using global positioning system. ISED 2016: 289-293 - [c15]F. Lalchhandama, Brojo Gopal Sapui, Kamalika Datta:
An Improved Approach for the Synthesis of Boolean Functions Using Memristor Based IMPLY and INVERSE-IMPLY Gates. ISVLSI 2016: 319-324 - 2015
- [j6]Kamalika Datta, Tanay Chattopadhyay, Indranil Sengupta:
All optical design of binary adders using semiconductor optical amplifier assisted Mach-Zehnder interferometer. Microelectron. J. 46(9): 839-847 (2015) - [j5]Kamalika Datta, Indranil Sengupta, Hafizur Rahaman:
A Post-Synthesis Optimization Technique for Reversible Circuits Exploiting Negative Control Lines. IEEE Trans. Computers 64(4): 1208-1214 (2015) - [c14]Ritu Ranjan Shrivastwa, Kamalika Datta, Indranil Sengupta:
Fast Qubit Placement in 2D Architecture Using Nearest Neighbor Realization. iNIS 2015: 95-100 - [c13]Abhoy Kole, Kamalika Datta, Indranil Sengupta, Robert Wille:
Towards a Cost Metric for Nearest Neighbor Constraints in Reversible Circuits. RC 2015: 273-278 - [c12]Eleonora Schönborn, Kamalika Datta, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler:
BDD-Based Synthesis for All-Optical Mach-Zehnder Interferometer Circuits. VLSID 2015: 435-440 - 2014
- [j4]Kamalika Datta, Gaurav Rathi, Indranil Sengupta, Hafizur Rahaman:
An Improved Reversible Circuit Synthesis Approach using Clustering of ESOP Cubes. ACM J. Emerg. Technol. Comput. Syst. 11(2): 15:1-15:16 (2014) - [j3]Kamalika Datta, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler:
An Approach to Reversible Logic Synthesis Using Input and Output Permutations. Trans. Comput. Sci. 24: 92-110 (2014) - [c11]Kamalika Datta, Alhaad Gokhale, Indranil Sengupta, Hafizur Rahaman:
An ESOP-Based Reversible Circuit Synthesis Flow Using Simulated Annealing. ACSS (2) 2014: 131-144 - [c10]Eleonora Schönborn, Kamalika Datta, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler:
Optimizing DD-based synthesis of reversible circuits using negative control lines. DDECS 2014: 129-134 - [c9]Sayak Chakraborti, Paturi Varun Chowdhary, Kamalika Datta, Indranil Sengupta:
BDD based synthesis of Boolean functions using memristors. IDT 2014: 136-141 - [c8]Robert Wille, Jannis Stoppe, Eleonora Schönborn, Kamalika Datta, Rolf Drechsler:
RevVis: Visualization of Structures and Properties in Reversible Circuits. RC 2014: 111-124 - [c7]Kamalika Datta, Indranil Sengupta:
All Optical Reversible Multiplexer Design Using Mach-Zehnder Interferometer. VLSID 2014: 539-544 - 2013
- [j2]Kamalika Datta, Indranil Sengupta, Hafizur Rahaman:
Particle Swarm Optimization Based Reversible Circuit Synthesis Using Mixed Control Toffoli Gates. J. Low Power Electron. 9(3): 363-372 (2013) - [j1]Kamalika Datta, Indranil Sengupta:
Partial encryption and watermarking scheme for audio files with controlled degradation of quality. Multim. Tools Appl. 64(3): 649-669 (2013) - [c6]Kamalika Datta, Vishal Shrivastav, Indranil Sengupta, Hafizur Rahaman:
Reversible logic implementation of AES algorithm. DTIS 2013: 140-144 - [c5]Kamalika Datta, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler:
An evolutionary approach to reversible logic synthesis using output permutation. IDT 2013: 1-6 - [c4]Chandan Bandyopadhyay, Debashri Roy, Dipak Kumar Kole, Kamalika Datta, Hafizur Rahaman:
ESOP-Based Synthesis of Reversible Circuit Using Improved Cube List. ISED 2013: 26-30 - [c3]Kamalika Datta, Gaurav Rathi, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler:
Exploiting Negative Control Lines in the Optimization of Reversible Circuits. RC 2013: 209-220 - 2012
- [c2]Kamalika Datta, Indranil Sengupta, Hafizur Rahaman:
Particle Swarm Optimization Based Circuit Synthesis of Reversible Logic. ISED 2012: 226-230 - [c1]Kamalika Datta, Gaurav Rathi, Indranil Sengupta, Hafizur Rahaman:
Synthesis of Reversible Circuits Using Heuristic Search Method. VLSI Design 2012: 328-333
Coauthor Index
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last updated on 2024-11-20 21:59 CET by the dblp team
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