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2020 – today
- 2021
[j6]Nilanjan Mukherjee, Daniel Tille, Mahendar Sapati
, Yingdi Liu, Jeffrey Mayer, Sylwester Milewski, Elham K. Moghaddam, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer:
Time and Area Optimized Testing of Automotive ICs. IEEE Trans. Very Large Scale Integr. Syst. 29(1): 76-88 (2021)
2010 – 2019
- 2019
- [j5]Elham K. Moghaddam, Nilanjan Mukherjee, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer, Justyna Zawada:
Logic BIST With Capture-Per-Clock Hybrid Test Points. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(6): 1028-1041 (2019) - [c8]Nilanjan Mukherjee, Jerzy Tyszer, Daniel Tille, Mahendar Sapati, Yingdi Liu, Jeffrey Mayer, Sylwester Milewski, Elham K. Moghaddam, Janusz Rajski, Jedrzej Solecki:
Test Time and Area Optimized BrST Scheme for Automotive ICs. ITC 2019: 1-10 - 2018
- [c7]Yingdi Liu, Janusz Rajski, Sudhakar M. Reddy, Jedrzej Solecki, Jerzy Tyszer:
Staggered ATPG with capture-per-cycle observation test points. VTS 2018: 1-6 - 2017
- [j4]Grzegorz Mrugalski, Janusz Rajski, Lukasz Rybak, Jedrzej Solecki, Jerzy Tyszer:
Star-EDT: Deterministic On-Chip Scheme Using Compressed Test Patterns. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(4): 683-693 (2017) - [j3]Grzegorz Mrugalski, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer, Chen Wang:
Trimodal Scan-Based Test Paradigm. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 1112-1125 (2017) - [c6]Sylwester Milewski, Nilanjan Mukherjee, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer, Justyna Zawada:
Full-scan LBIST with capture-per-cycle hybrid test points. ITC 2017: 1-9 - 2015
- [j2]Michal Filipek, Grzegorz Mrugalski, Nilanjan Mukherjee, Benoit Nadeau-Dostie, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer:
Low-Power Programmable PRPG With Test Compression Capabilities. IEEE Trans. Very Large Scale Integr. Syst. 23(6): 1063-1076 (2015) - [c5]Grzegorz Mrugalski, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer, Chen Wang:
TestExpress - New Time-Effective Scan-Based Deterministic Test Paradigm. ATS 2015: 19-24 - [c4]Grzegorz Mrugalski, Janusz Rajski, Lukasz Rybak, Jedrzej Solecki, Jerzy Tyszer:
A deterministic BIST scheme based on EDT-compressed test patterns. ITC 2015: 1-8 - 2012
- [c3]Jedrzej Solecki, Jerzy Tyszer, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski:
Low power programmable PRPG with enhanced fault coverage gradient. ITC 2012: 1-9 - 2011
- [j1]Brady Benware, Grzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer:
Fault Diagnosis with Orthogonal Compactors in Scan-Based Designs. J. Electron. Test. 27(5): 599-609 (2011) - [c2]Brady Benware, Grzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer:
Diagnosis of Failing Scan Cells through Orthogonal Response Compaction. ETS 2011: 1-6 - 2010
- [c1]Brady Benware, Grzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer:
Diagnosis of failing scan cells through orthogonal response compaction. ETS 2010: 221-226
Coauthor Index
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