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ORCIDSorin P. Voinigescu
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- affiliation: University of Toronto, Canada
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2020 – today
- 2023
[c29]Sorin P. Voinigescu, Shai Bonen, Suyash Pati Tripathi, Saurabh Bagchi, Gregory Cooke, T. Jager, Akash Bharadwaj, Jessica Zhao:
A Circuit Designer's Perspective on Transistor Modelling Challenges for 6G, Fiberoptics, and Quantum Computing ICs. BCICTS 2023: 36-43- [c28]Jianan Zhao, Sorin P. Voinigescu:
An 80-GBaud PAM-4 $G_{\mathrm{m}}$ -Boosted Variable-Gain TIA in 22-nm FDSOI. BCICTS 2023: 199-202 - 2021
- [c27]Suyash Pati Tripathi, Shai Bonen, Claudia Nastase, Sergiu Iordanescu
, George Boldeiu, Mircea Pasteanu, Alexandru Müller, Sorin P. Voinigescu:
Compact Modelling of 22nm FDSOI CMOS Semiconductor Quantum Dot Cryogenic I-V Characteristics. ESSCIRC 2021: 43-46 - [c26]Naftali Weiss, Gregory Cooke, Peter Schvan, Pascal Chevalier, Andreia Cathelin, Sorin P. Voinigescu:
200-GS/s ADC Front-End Employing 25% Duty Cycle Quadrature Clock Generator. ESSCIRC 2021: 483-486 - [c25]Suyash Pati Tripathi, Shai Bonen, Claudia Nastase, Sergiu Iordanescu, George Boldeiu, Mircea Pasteanu, Alexandru Müller, Sorin P. Voinigescu:
Compact Modelling of 22nm FDSOI CMOS Semiconductor Quantum Dot Cryogenic I-V Characteristics. ESSDERC 2021: 43-46
2010 – 2019
- 2019
- [j40]Alireza Zandieh, Peter Schvan, Sorin P. Voinigescu:
Design of a 55-nm SiGe BiCMOS 5-bit Time-Interleaved Flash ADC for 64-Gbd 16-QAM Fiberoptics Applications. IEEE J. Solid State Circuits 54(9): 2375-2387 (2019) - [c24]Jashva Rafique, The'Linh Nguyen, Sorin P. Voinigescu:
A 4.6V, 6-bit, 64GS/s Transmitter in 22nm FDSOI CMOS. BCICTS 2019: 1-4 - 2018
- [j39]Stefan Shopov, Ozan D. Gurbuz, Gabriel M. Rebeiz, Sorin P. Voinigescu:
AD-Band Digital Transmitter with 64-QAM and OFDM Free-Space Constellation Formation. IEEE J. Solid State Circuits 53(7): 2012-2022 (2018) - [c23]Munehiko Nagatani, Hitoshi Wakita, Teruo Jyo, Miwa Mutoh, Minoru Ida, Sorin P. Voinigescu, Hideyuki Nosaka:
A 256-Gbps PAM-4 Signal Generator IC in 0.25-µm InP DHBT Technology. BCICTS 2018: 28-31 - [c22]Alireza Zandieh, Peter Schvan, Sorin P. Voinigescu:
A 2x-Oversampling, 128-GS/s 5-bit Flash ADC for 64-GBaud Applications. BCICTS 2018: 52-55 - [c21]M. Sadeah Dadash, David Harame, Sorin P. Voinigescu:
Large-Swing 22nm Si/SiGe FDSOI Stacked Cascodes for 56GBaud Drivers and 5G PAs. BCICTS 2018: 267-270 - [c20]Alireza Zandieh, Naftali Weiss, The'Linh Nguyen, David Haranne, Sorin P. Voinigescu:
128-GS/s ADC Front-End with Over 60-GHz Input Bandwidth in 22-nm Si/SiGe FDSOI CMOS. BCICTS 2018: 271-274 - [c19]Sorin P. Voinigescu:
mmWand high speed solutions enabled by FD-SOI. ESSDERC 2018: 183 - 2017
- [j38]Bodhisatwa Sadhu, Sorin P. Voinigescu:
Introduction to the Special Section on the 2016 IEEE BCTM and IEEE CSICS. IEEE J. Solid State Circuits 52(9): 2224-2225 (2017) - [j37]Michael Schröter, Tommy Rosenbaum, Pascal Chevalier, Bernd Heinemann, Sorin P. Voinigescu, Ed Preisler, Josef Böck, Anindya Mukherjee:
SiGe HBT Technology: Future Trends and TCAD-Based Roadmap. Proc. IEEE 105(6): 1068-1086 (2017) - [j36]Sorin P. Voinigescu, Stefan Shopov, James Bateman, Hassan Farooq, James Hoffman, Konstantinos Vasilakopoulos:
Silicon Millimeter-Wave, Terahertz, and High-Speed Fiber-Optic Device and Benchmark Circuit Scaling Through the 2030 ITRS Horizon. Proc. IEEE 105(6): 1087-1104 (2017) - [c18]Stefan Shopov, Ozan D. Gurbuz, Gabriel M. Rebeiz, Sorin P. Voinigescu:
A 13.2-dBm, 138-GHz I/Q RF-DAC with 64-QAM and OFDM free-space constellation formation. ESSCIRC 2017: 191-194 - [c17]Zheng Yong, Stefan Shopov, Jared C. Mikkelsen, Robert Mallard, Jason C. C. Mak, Sorin P. Voinigescu, Joyce K. S. Poon:
A 44Gbps high extinction ratio silicon Mach-Zehnder modulator with a 3D-integrated 28nm FD-SOI CMOS driver. OFC 2017: 1-3 - 2016
- [j35]Stefan Shopov, Sorin P. Voinigescu:
A 3×60Gb/s Transmitter/Repeater Front-End With 4.3VPP Single-Ended Output Swing in a 28nm UTBB FD-SOI Technology. IEEE J. Solid State Circuits 51(7): 1651-1662 (2016) - [j34]James Hoffman, Jean-Roland Martin-Gosse, Stefan Shopov, Jack J. Pekarik, Renata Camillo-Castillo, Vibhor Jain, David L. Harame, Sorin P. Voinigescu:
Analog Circuit Blocks for 80-GHz Bandwidth Frequency-Interleaved, Linear, Large-Swing Front-Ends. IEEE J. Solid State Circuits 51(9): 1985-1993 (2016) - [j33]James Hoffman, Stefan Shopov, Pascal Chevalier, Andreia Cathelin, Peter Schvan, Sorin P. Voinigescu:
55-nm SiGe BiCMOS Distributed Amplifier Topologies for Time-Interleaved 120-Gb/s Fiber-Optic Receivers and Transmitters. IEEE J. Solid State Circuits 51(9): 2040-2053 (2016) - [j32]Stefan Shopov, Andreea Balteanu, Jürgen Hasch, Pascal Chevalier, Andreia Cathelin, Sorin P. Voinigescu:
A 234-261-GHz 55-nm SiGe BiCMOS Signal Source with 5.4-7.2 dBm Output Power, 1.3% DC-to-RF Efficiency, and 1-GHz Divided-Down Output. IEEE J. Solid State Circuits 51(9): 2054-2065 (2016) - 2015
- [c16]Stefan Shopov, Sorin P. Voinigescu:
A 3×40Gb/s 28nm FDSOI CMOS front-end array with 10mVPP sensitivity and >4VPP output swing. ESSCIRC 2015: 72-75 - 2014
- [j31]Stefan Shopov, Andreea Balteanu, Sorin P. Voinigescu:
A 19 dBm, 15 Gbaud, 9 bit SOI CMOS Power-DAC Cell for High-Order QAM W-Band Transmitters. IEEE J. Solid State Circuits 49(7): 1653-1664 (2014) - [j30]Andreea Balteanu, Stefan Shopov, Sorin P. Voinigescu:
A High Modulation Bandwidth, 110 GHz Power-DAC Cell for IQ Transmitter Arrays With Direct Amplitude and Phase Modulation. IEEE J. Solid State Circuits 49(10): 2103-2113 (2014) - 2013
- [j29]Andreea Balteanu, Ioannis Sarkas, Eric Dacquay, Alexander Tomkins, Gabriel M. Rebeiz, Peter M. Asbeck, Sorin P. Voinigescu:
A 2-Bit, 24 dBm, Millimeter-Wave SOI CMOS Power-DAC Cell for Watt-Level High-Efficiency, Fully Digital m-ary QAM Transmitters. IEEE J. Solid State Circuits 48(5): 1126-1137 (2013) - [j28]Sorin P. Voinigescu, Alexander Tomkins, Eric Dacquay, Pascal Chevalier, Jürgen Hasch, Alain Chantre, Bernard Sautreuil:
A Study of SiGe HBT Signal Sources in the 220-330-GHz Range. IEEE J. Solid State Circuits 48(9): 2011-2021 (2013) - [c15]Stefan Shopov, Andreea Balteanu, Sorin P. Voinigescu:
A 19-dBm, 15-Gbaud, 9-bit SOI CMOS power-DAC cell for high-order QAM W-band transmitters. ESSCIRC 2013: 69-72 - 2012
- [c14]Ioannis Sarkas, Andreea Balteanu, Eric Dacquay, Alexander Tomkins, Sorin P. Voinigescu:
A 45nm SOI CMOS Class-D mm-Wave PA with >10Vpp differential swing. ISSCC 2012: 88-90 - 2011
- [j27]Shahriar Shahramian, Adam Hart, Alexander Tomkins, Anthony Chan Carusone, Patrice Garcia, Pascal Chevalier, Sorin P. Voinigescu:
Design of a Dual W- and D-Band PLL. IEEE J. Solid State Circuits 46(5): 1011-1022 (2011) - [j26]Ricardo Andres Aroca, Peter Schvan, Sorin P. Voinigescu:
A 2.4-Vpp 60-Gb/s CMOS Driver With Digitally Variable Amplitude and Pre-Emphasis Control at Multiple Peaking Frequencies. IEEE J. Solid State Circuits 46(10): 2226-2239 (2011) - 2010
- [j25]Ioannis Sarkas, Sean T. Nicolson, Alexander Tomkins, Ekaterina Laskin, Pascal Chevalier, Bernard Sautreuil, Sorin P. Voinigescu:
An 18-Gb/s, Direct QPSK Modulation SiGe BiCMOS Transceiver for Last Mile Links in the 70-80 GHz Band. IEEE J. Solid State Circuits 45(10): 1968-1980 (2010) - [j24]Alexander Tomkins, Patrice Garcia, Sorin P. Voinigescu:
A Passive W-Band Imaging Receiver in 65-nm Bulk CMOS. IEEE J. Solid State Circuits 45(10): 1981-1991 (2010)
2000 – 2009
- 2009
- [j23]Adam Hart, Sorin P. Voinigescu:
A 1 GHz Bandwidth Low-Pass ΔΣADC With 20-50 GHz Adjustable Sampling Rate. IEEE J. Solid State Circuits 44(5): 1401-1414 (2009) - [j22]Shahriar Shahramian, Sorin P. Voinigescu, Anthony Chan Carusone:
A 35-GS/s, 4-Bit Flash ADC With Active Data and Clock Distribution Trees. IEEE J. Solid State Circuits 44(6): 1709-1720 (2009) - [j21]Alexander Tomkins, Ricardo Andres Aroca, Takuji Yamamoto, Sean T. Nicolson, Yoshiyasu Doi, Sorin P. Voinigescu:
A Zero-IF 60 GHz 65 nm CMOS Transceiver With Direct BPSK Modulation Demonstrating up to 6 Gb/s Data Rates Over a 2 m Wireless Link. IEEE J. Solid State Circuits 44(8): 2085-2099 (2009) - [j20]Grégory Avenier, Malick Diop, Pascal Chevalier, Germaine Troillard, Nicolas Loubet, Julien Bouvier, Linda Depoyan, Nicolas Derrier, Michel Buczko, Cédric Leyris, Samuel Boret, Sébastien Montusclat, Alain Margain, Sébastien Pruvost, Sean T. Nicolson, Kenneth H. K. Yau, Nathalie Revil, Daniel Gloria, Didier Dutartre, Sorin P. Voinigescu, Alain Chantre:
0.13µm SiGe BiCMOS Technology Fully Dedicated to mm-Wave Applications. IEEE J. Solid State Circuits 44(9): 2312-2321 (2009) - 2008
- [j19]Ekaterina Laskin, Pascal Chevalier, Alain Chantre, Bernard Sautreuil, Sorin P. Voinigescu:
165-GHz Transceiver in SiGe Technology. IEEE J. Solid State Circuits 43(5): 1087-1100 (2008) - [j18]Mehdi Khanpour, Keith W. Tang, Patrice Garcia, Sorin P. Voinigescu:
A Wideband W-Band Receiver Front-End in 65-nm CMOS. IEEE J. Solid State Circuits 43(8): 1717-1730 (2008) - [j17]Ricardo Andres Aroca, Sorin P. Voinigescu:
A Large Swing, 40-Gb/s SiGe BiCMOS Driver With Adjustable Pre-Emphasis for Data Transmission Over 75Ω Coaxial Cable. IEEE J. Solid State Circuits 43(10): 2177-2186 (2008) - [j16]Sean T. Nicolson, Pascal Chevalier, Bernard Sautreuil, Sorin P. Voinigescu:
Single-Chip W-band SiGe HBT Transceivers and Receivers for Doppler Radar and Millimeter-Wave Imaging. IEEE J. Solid State Circuits 43(10): 2206-2217 (2008) - [c13]Patrice Garcia, Alain Chantre, Sébastien Pruvost, Pascal Chevalier, Sean T. Nicolson, David Roy, Sorin P. Voinigescu, Christophe Garnier:
Will BiCMOS stay competitive for mmW applications ? CICC 2008: 387-394 - [c12]Alexander Tomkins, Ricardo Andres Aroca, Takuji Yamamoto, Sean T. Nicolson, Yoshiyasu Doi, Sorin P. Voinigescu:
A zero-IF 60GHz transceiver in 65nm CMOS with ≫ 3.5Gb/s links. CICC 2008: 471-474 - [c11]Ekaterina Laskin, Mehdi Khanpour, Ricardo Andres Aroca, Keith K. W. Tang, Patrice Garcia, Sorin P. Voinigescu:
A 95GHz Receiver with Fundamental-Frequency VCO and Static Frequency Divider in 65nm Digital CMOS. ISSCC 2008: 180-181 - 2007
- [j15]Terry Yao, Michael Q. Gordon, Keith K. W. Tang, Kenneth H. K. Yau, Ming-Ta Yang, Peter Schvan, Sorin P. Voinigescu:
Algorithmic Design of CMOS LNAs and PAs for 60-GHz Radio. IEEE J. Solid State Circuits 42(5): 1044-1057 (2007) - [j14]Theodoros Chalvatzis, Eric Gagnon, Morris Repeta, Sorin P. Voinigescu:
A Low-Noise 40-GS/s Continuous-Time Bandpass ΔΣ ADC Centered at 2 GHz for Direct Sampling Receivers. IEEE J. Solid State Circuits 42(5): 1065-1075 (2007) - [j13]Theodoros Chalvatzis, Kenneth H. K. Yau, Ricardo Andres Aroca, Peter Schvan, Ming-Ta Yang, Sorin P. Voinigescu:
Low-Voltage Topologies for 40-Gb/s Circuits in Nanoscale CMOS. IEEE J. Solid State Circuits 42(7): 1564-1573 (2007) - [j12]Sean T. Nicolson, Kenneth H. K. Yau, Pascal Chevalier, Alain Chantre, Bernard Sautreuil, Keith W. Tang, Sorin P. Voinigescu:
Design and Scaling of W-Band SiGe BiCMOS VCOs. IEEE J. Solid State Circuits 42(9): 1821-1833 (2007) - [j11]Timothy O. Dickson, Sorin P. Voinigescu:
Low-Power Circuits for a 2.5-V, 10.7-to-86-Gb/s Serial Transmitter in 130-nm SiGe BiCMOS. IEEE J. Solid State Circuits 42(10): 2077-2085 (2007) - [c10]Sorin P. Voinigescu, Ricardo Andres Aroca, Timothy O. Dickson, Sean T. Nicolson, Theodoros Chalvatzis, Pascal Chevalier, Patrice Garcia, Christophe Gamier, Bernard Sautreuil:
Towards a sub-2.5V, 100-Gb/s Serial Transceiver. CICC 2007: 471-478 - [c9]Keith W. Tang, Mehdi Khanpour, Patrice Garcia, Christophe Gamier, Sorin P. Voinigescu:
65-nm CMOS, W-Band Receivers for Imaging Applications. CICC 2007: 749-752 - [c8]Andreia Cathelin, Baudouin Martineau, N. Seller, S. Douyere, Jean Gorisse, Sébastien Pruvost, Christine Raynaud, Frederic Gianesello, Sébastien Montusclat, Sorin P. Voinigescu, Ali M. Niknejad, Didier Belot, Jean-Pierre Schoellkopf:
Design for millimeter-wave applications in silicon technologies. ESSCIRC 2007: 464-471 - [c7]Sorin P. Voinigescu, Sean T. Nicolson, Mehdi Khanpour, Keith K. W. Tang, Kenneth H. K. Yau, N. Seyedfathi, A. Timonov, A. Nachman, George V. Eleftheriades, Peter Schvan, Ming-Ta Yang:
CMOS SOCs at 100 GHz: System Architectures, Device Characterization, and IC Design Examples. ISCAS 2007: 1971-1974 - 2006
- [j10]Timothy O. Dickson, Kenneth H. K. Yau, Theodoros Chalvatzis, Alain M. Mangan, Ekaterina Laskin, Rudy Beerkens, Paul Westergaard, Mihai Tazlauanu, Ming-Ta Yang, Sorin P. Voinigescu:
The Invariance of Characteristic Current Densities in Nanoscale MOSFETs and Its Impact on Algorithmic Design Methodologies and Design Porting of Si(Ge) (Bi)CMOS High-Speed Building Blocks. IEEE J. Solid State Circuits 41(8): 1830-1845 (2006) - [j9]Ekaterina Laskin, Sorin P. Voinigescu:
A 60 mW per Lane, 4$, times, $23-Gb/s 2$ ^7 -$1 PRBS Generator. IEEE J. Solid State Circuits 41(10): 2198-2208 (2006) - [j8]Adesh Garg, Anthony Chan Carusone, Sorin P. Voinigescu:
A 1-Tap 40-Gb/s Look-Ahead Decision Feedback Equalizer in 0.18-$muhbox m$SiGe BiCMOS Technology. IEEE J. Solid State Circuits 41(10): 2224-2232 (2006) - [j7]Shahriar Shahramian, Anthony Chan Carusone, Sorin P. Voinigescu:
Design Methodology for a 40-GSamples/s Track and Hold Amplifier in 0.18-$muhbox m$SiGe BiCMOS Technology. IEEE J. Solid State Circuits 41(10): 2233-2240 (2006) - [c6]Shahriar Shahramian, Sorin P. Voinigescu, Anthony Chan Carusone:
A 30-GS/sec Track and Hold Amplifier in 0.13-μm CMOS Technology. CICC 2006: 493-496 - 2005
- [j6]Timothy O. Dickson, Rudy Beerkens, Sorin P. Voinigescu:
A 2.5-V 45-Gb/s decision circuit using SiGe BiCMOS logic. IEEE J. Solid State Circuits 40(4): 994-1003 (2005) - [j5]Timothy O. Dickson, Ekaterina Laskin, Imran Khalid, Rudy Beerkens, Jingqiong Xie, Boris Karajica, Sorin P. Voinigescu:
An 80-Gb/s 231-1 pseudorandom binary sequence generator in SiGe BiCMOS technology. IEEE J. Solid State Circuits 40(12): 2735-2745 (2005) - [c5]Sorin P. Voinigescu, Timothy O. Dickson, Theodoros Chalvatzis, Altan Hazneci, Ekaterina Laskin, Rudy Beerkens, Imran Khalid, Edward S. Rogers Sr.:
Algorithmic design methodologies and design porting of wireline transceiver IC building blocks between technology nodes. CICC 2005: 111-118 - [c4]Sorin P. Voinigescu, Michael Gordon, Chihou Lee, Terry Yao, Alain M. Mangan, Kenneth H. K. Yau:
System-on-Chip Design beyond 50 GHz, invited. IWSOC 2005: 10-13 - 2004
- [j4]Hai Tran, Florin Pera, Douglas S. McPherson, Dorin Viorel, Sorin P. Voinigescu:
6-kΩ 43-Gb/s differential transimpedance-limiting amplifier with auto-zero feedback and high dynamic range. IEEE J. Solid State Circuits 39(10): 1680-1689 (2004) - [j3]Hai Tran, FlorinPera Pera, Douglas S. McPherson, Dorin Viorel, Sorin P. Voinigescu:
Correction to "6-k$Omega$43-Gb/s Differential Transimpedance-Limiting Amplifier With Auto-Zero Feedback and High Dynamic Range". IEEE J. Solid State Circuits 39(12): 2492 (2004) - [c3]Paul Westergaard, Timothy O. Dickson, Sorin P. Voinigescu:
A 1.5V 20/30 Gb/s CMOS backplane driver with digital pre-emphasis. CICC 2004: 23-26 - [c2]Michael Gordon, Sorin P. Voinigescu:
An inductor-based 52-GHz 0.18 μm SiGe HBT cascode LNA with 22 dB gain. ESSCIRC 2004: 287-290 - 2003
- [j2]Douglas S. McPherson, Florin Pera, Mihai Tazlauanu, Sorin P. Voinigescu:
A 3-V fully differential distributed limiting driver for 40-Gb/s optical transmission systems. IEEE J. Solid State Circuits 38(9): 1485-1496 (2003) - 2001
- [c1]Sorin P. Voinigescu, P. Popescu, P. Banens, Miles Copeland, G. Fortier, K. Howlett, M. Herod, David Marchesan, Jonathan L. Showell, S. Sziiagyi, Hai Tran, J. Weng:
Circuits and technologies for highly integrated optical networking ICs at 10 Gb/s to 40 Gb/s. CICC 2001: 331-338
1990 – 1999
- 1997
- [j1]Sorin P. Voinigescu, Michael C. Maliepaard, Jonathan L. Showell, Greg E. Babcock, David Marchesan, Michael Schroter, Peter Schvan, David L. Harame:
A scalable high-frequency noise model for bipolar transistors with application to optimal transistor sizing for low-noise amplifier design. IEEE J. Solid State Circuits 32(9): 1430-1439 (1997)
Coauthor Index
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