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ORCIDFoster F. Dai
Fa Foster Dai
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- affiliation: Auburn University, USA
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2020 – today
- 2024
[c64]Alexander Meyer, Kaoru Yamashita, Adilet Dossanov, Martin Maier, Finn Stapelfeldt, Yerzhan Kudabay, Peter Toth, Fa Foster Dai, Hiroki Ishikuro, Vadim Issakov:
A 10-bit 100kS/s SAR ADC With a Monotonic Capacitor Switching Procedure for Single-Ended Inputs in 22nm CMOS FDSOI. ISCAS 2024: 1-5- 2023
- [j32]Haoyi Zhao, Fa Foster Dai
:
A 12-Bit 260-MS/s Pipelined-SAR ADC With Ring-TDC-Based Fine Quantizer for Automatic Cross-Domain Scale Alignment. IEEE J. Solid State Circuits 58(10): 2883-2896 (2023) - 2022
- [c63]Haoyi Zhao, Fa Foster Dai:
A 0.97mW 260MS/s 12b Pipelined-SAR ADC with Ring-TDC-Based Fine Quantizer for PVT Robust Automatic Cross-Domain Scale Alignment. ISSCC 2022: 1-3 - 2021
- [j31]Dongyi Liao, Fa Foster Dai:
A Fractional-N Reference Sampling PLL With Linear Sampler and CDAC Based Fractional Spur Cancellation. IEEE J. Solid State Circuits 56(3): 694-704 (2021) - 2020
- [j30]Dongyi Liao, Yucai Zhang, Fa Foster Dai, Zhenqi Chen, Yanjie Wang:
An mm-Wave Synthesizer With Robust Locking Reference-Sampling PLL and Wide-Range Injection-Locked VCO. IEEE J. Solid State Circuits 55(3): 536-546 (2020) - [j29]Hechen Wang, Fa Foster Dai, Zhan Su, Yanjie Wang:
Sub-Sampling Direct RF-to-Digital Converter With 1024-APSK Modulation for High Throughput Polar Receiver. IEEE J. Solid State Circuits 55(4): 1064-1076 (2020) - [c62]Dongyi Liao, Fa Foster Dai:
A 7.7~10.3GHz 5.2mW -247.3dB-FOM Fractional-N Reference Sampling PLL with 2nd Order CDAC Based Fractional Spur Cancellation In 45nm CMOS. CICC 2020: 1-4
2010 – 2019
- 2019
- [c61]Dongyi Liao, Yucai Zhang, Zhenqi Chen, Yanjie Wang, Fa Foster Dai:
An mm-Wave Synthesizer with Low In-Band Noise and Robust Locking Reference-Sampling PLL. CICC 2019: 1-4 - [c60]Zhan Su, Hechen Wang, Haoyi Zhao, Zhenqi Chen, Yanjie Wang, Fa Foster Dai:
A 280MS/s 12b SAR-Assisted Hybrid ADC with Time Domain Sub-Range Quantizer in 45nm CMOS. CICC 2019: 1-4 - [c59]Zhan Su, Hechen Wang, Haoyi Zhao, Xiao Liu, Fa Foster Dai:
An 8-bit 80-MS/s Fully Self-Timed SAR ADC with 3/2 Interleaved Comparators and High-Order PVT Stabilized HBT Bandgap Reference. ISCAS 2019: 1-4 - [c58]Hechen Wang, Zhan Su, Haoyi Zhao, Yanjie Wang, Fa Foster Dai:
A 3.8 mW Sub-Sampling Direct RF-to-Digital Converter for Polar Receiver Achieving 1.94 Gb/s Data Rate with 1024-APSK Modulation. VLSI Circuits 2019: 82- - 2018
- [j28]Dongyi Liao, Fa Foster Dai, Bram Nauta, Eric A. M. Klumperink:
A 2.4-GHz 16-Phase Sub-Sampling Fractional-N PLL With Robust Soft Loop Switching. IEEE J. Solid State Circuits 53(3): 715-727 (2018) - [j27]Hechen Wang, Fa Foster Dai, Hua Wang:
A Reconfigurable Vernier Time-to-Digital Converter With 2-D Spiral Comparator Array and Second-Order ΔΣ Linearization. IEEE J. Solid State Circuits 53(3): 738-749 (2018) - [j26]Rong Jiang, Hossein Noori, Fa Foster Dai:
A Multi-Phase Coupled Oscillator Using Inductive Resonant Coupling and Modified Dual-Tank Techniques. IEEE J. Solid State Circuits 53(9): 2454-2464 (2018) - [c57]Zhenqi Chen, Dongyi Liao, Fa Foster Dai:
A full-duplex transceiver front-end RFIC with code-domain spread spectrum modulation for Tx self-interference cancellation and in-band jammer rejection. CICC 2018: 1-4 - [c56]Taiyun Chi, Hechen Wang, Min-Yu Huang, Fa Foster Dai, Hua Wang:
A bidirectional lens-free digital-bits-in/-out 0.57mm2 terahertz nano-radio in CMOS with 49.3mW Peak power consumption supporting 50cm Internet-of-Things communication. CICC 2018: 1-4 - [c55]Hossein Noori, Rong Jiang, Fa Foster Dai:
A 1.8 GHz-2.4 GHz SAW-Less Reconfigurable Receiver Frontend RFIC in 65nm CMOS RF SOI. ISCAS 2018: 1-4 - [c54]Yucheng Tong, Fa Foster Dai, Hossein Noori, Kun Zhao:
A Low Phase Noise Ring Oscillator with Miller Capacitance Cancellation. ISCAS 2018: 1-4 - 2017
- [j25]Dongyi Liao, Hechen Wang, Fa Foster Dai, Yang Xu, Roc Berenguer, Sara Munoz Hermoso:
An 802.11a/b/g/n Digital Fractional-N PLL With Automatic TDC Linearity Calibration for Spur Cancellation. IEEE J. Solid State Circuits 52(5): 1210-1220 (2017) - [c53]Taiyun Chi, Hechen Wang, Min-Yu Huang, Fa Foster Dai, Hua Wang:
A bidirectional lens-free digital-bits-in/-out 0.57mm2 Terahertz nano-radio in CMOS with 49.3mW peak power consumption supporting 50cm Internet-of-Things communication. CICC 2017: 1-4 - [c52]Dongyi Liao, Fa Foster Dai, Bram Nauta, Eric A. M. Klumperink:
Multi-phase sub-sampling fractional-N PLL with soft loop switching for fast robust locking. CICC 2017: 1-4 - [c51]John Long, Fa Foster Dai:
Session 24-Milimeter-wave communication circuits. CICC 2017: 1 - [c50]Ruixin Wang, Fa Foster Dai:
A 0.8∼1.3 GHz multi-phase injection-locked PLL using capacitive coupled multi-ring oscillator with reference spur suppression. CICC 2017: 1-4 - [c49]Hechen Wang, Fa Foster Dai, Hua Wang:
A 330μW 1.25ps 400fs-INL vernier time-to-digital converter with 2D reconfigurable spiral arbiter array and 2nd-order ΔΣ linearization. CICC 2017: 1-4 - [c48]Hechen Wang, Fa Foster Dai:
A 14-Bit, 1-ps resolution, two-step ring and 2D Vernier TDC in 130nm CMOS technology. ESSCIRC 2017: 143-146 - [c47]Rong Jiang, Hossein Noori, Fa Foster Dai, Jun Fu, Wei Zhou, Yudong Wang:
A low phase noise 8.8 GHz VCO based on ISF manipulation and dual-tank technique. ISCAS 2017: 1-4 - [c46]Zhan Su, Hossein Noori, Fa Foster Dai, Wei Zhou, Yudong Wang, Jun Fu:
Offset based feedforward amplifier with nonlinearity compensation and P1dB expansion. ISCAS 2017: 1-4 - 2016
- [c45]Ruixin Wang, Fa Foster Dai:
A 1∼1.5 GHz capacitive coupled inductor-less multi-ring oscillator with improved phase noise. ESSCIRC 2016: 377-380 - 2015
- [c44]Fa Foster Dai, Feng Zhao, Rong Jiang:
Low noise coupling techniques for multi-phase oscillators. ASICON 2015: 1-4 - [c43]Fa Foster Dai, Swaminathan Sankaran:
Session 4 - Frequency and phase generation techniques. CICC 2015: 1 - [c42]Zhan Su, Bogdan M. Wilamowski, Ruixin Wang, Fa Foster Dai:
Adaptive integratable hardware realization of analog neural networks for nonlinear system. INDIN 2015: 521-526 - 2014
- [j24]Jianjun Yu, Feng Zhao, Joseph Cali, Fa Foster Dai, Desheng Ma, Xueyang Geng, Yuehai Jin, Yuan Yao, Xin Jin, J. David Irwin, Richard C. Jaeger:
An X-Band Radar Transceiver MMIC with Bandwidth Reduction in 0.13 µm SiGe Technology. IEEE J. Solid State Circuits 49(9): 1905-1915 (2014) - [c41]Foster F. Dai, Byunghoo Jung:
Low power transceivers and oscillators. CICC 2014: 1 - [c40]Feng Zhao, Fa Foster Dai:
A capacitive-coupling technique with phase noise and phase error reduction for multi-phase clock generation. CICC 2014: 1-4 - 2013
- [j23]Fa Foster Dai:
Introduction to the Special Section on the 26th Bipolar/BiCMOS Circuits and Technology Meeting. IEEE J. Solid State Circuits 48(9): 2000-2001 (2013) - 2012
- [j22]Fa Foster Dai:
Introduction to the Special Section on the 25th Bipolar/BiCMOS Circuits and Technology Meeting. IEEE J. Solid State Circuits 47(9): 1964-1965 (2012) - [j21]Feng Zhao, Fa Foster Dai:
A 0.6-V Quadrature VCO With Enhanced Swing and Optimized Capacitive Coupling for Phase Noise Reduction. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(8): 1694-1705 (2012) - [j20]Yuehai Jin, Fa Foster Dai:
Impact of Transceiver RFIC Impairments on MIMO System Performance. IEEE Trans. Ind. Electron. 59(1): 538-549 (2012) - [c39]Fa Foster Dai, Howard C. Luong:
PLLs, VCOs, and dividers. CICC 2012: 1-2 - [c38]Jianjun Yu, Feng Zhao, Joseph Cali, Desheng Ma, Xueyang Geng, Fa Foster Dai, J. David Irwin, Andre Aklian:
A single-chip x-band chirp radar MMIC with stretch processing. CICC 2012: 1-4 - [c37]Xin Jin, Fa Foster Dai:
A 100MHz fifth-order low-pass gm-C filter using folded stages. IECON 2012: 6234-6239 - [c36]Yuehai Jin, Fa Foster Dai:
A harmonic rejection mixer in wideband transmitter. IECON 2012: 6240-6243 - [c35]Hossein Noori, Fa Foster Dai:
Effect of CMOS device sizing on circuit noise performance. IECON 2012: 6244-6247 - [c34]Xin Jin, Fa Foster Dai:
A 6th order zero capacitor spread 1MHz - 10MHz tunable CMOS active-RC low pass filter with fast tuning scheme. ISCAS 2012: 1187-1190 - [c33]Suraj Sindia, Fa Foster Dai, Vishwani D. Agrawal, Virendra Singh:
Impact of process variations on computers used for image processing. ISCAS 2012: 1444-1447 - [c32]Hossein Noori, Fa Foster Dai:
Remedies for noise degradation due to active Q-Enhancement Circuit. ISCAS 2012: 1756-1759 - 2011
- [j19]Desheng Ma, Fa Foster Dai, Richard C. Jaeger, J. David Irwin:
An X- and Ku-Band Wideband Recursive Receiver MMIC With Gain-Reuse. IEEE J. Solid State Circuits 46(3): 562-571 (2011) - [j18]Jie Qin, Joseph Cali, Bradley F. Dutton, George J. Starr, Fa Foster Dai, Charles E. Stroud:
Selective Spectrum Analysis for Analog Measurements. IEEE Trans. Ind. Electron. 58(10): 4960-4971 (2011) - [c31]Feng Zhao, Fa Foster Dai:
A 0.6V quadrature VCO with optimized capacitive coupling for phase noise reduction. CICC 2011: 1-4 - [c30]Zhenqi Chen, Fa Foster Dai:
A 3mW 8-Bit radiation-hardened-by-design DAC for ultra-wide temperature range from -180°C to 120°C. ISCAS 2011: 997-1000 - [c29]Vasanth Kakani, Fa Foster Dai:
A 4.2-4.7GHz, 3.7mW digitally controlled oscillator RFIC. ISCAS 2011: 2841-2844 - 2010
- [j17]Xueyang Geng, Fa Foster Dai, J. David Irwin, Richard C. Jaeger:
An 11-Bit 8.6 GHz Direct Digital Synthesizer MMIC With 10-Bit Segmented Sine-Weighted DAC. IEEE J. Solid State Circuits 45(2): 300-313 (2010) - [j16]Jianjun Yu, Fa Foster Dai, Richard C. Jaeger:
A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 μm CMOS Technology. IEEE J. Solid State Circuits 45(4): 830-842 (2010) - [j15]Xueyang Geng, Fa Foster Dai, J. David Irwin, Richard C. Jaeger:
24-Bit 5.0 GHz Direct Digital Synthesizer RFIC With Direct Digital Modulations in 0.13 μ m SiGe BiCMOS Technology. IEEE J. Solid State Circuits 45(5): 944-954 (2010) - [j14]Xueyang Geng, Fa Foster Dai:
An X-Band Transformer-Coupled Varactor-Less Quadrature Current-Controlled Oscillator in 0.18 μm SiGe BiCMOS Technology. IEEE J. Solid State Circuits 45(9): 1669-1677 (2010) - [j13]Zhenqi Chen, Fa Foster Dai:
Effects of LO Phase and Amplitude Imbalances and Phase Noise on M -QAM Transceiver Performance. IEEE Trans. Ind. Electron. 57(5): 1505-1517 (2010) - [c28]Jianjun Yu, Fa Foster Dai:
On-chip Jitter Measurement Using Vernier Ring Time-to-Digital Converter. Asian Test Symposium 2010: 167-170 - [c27]Xiaojie Chu, Min Lin, Zheng Gong, Yin Shi, Fa Foster Dai:
A CMOS programmable gain amplifier with a novel DC-offset cancellation technique. CICC 2010: 1-4 - [c26]Jianjun Yu, Fa Foster Dai:
A 3-dimensional Vernier ring time-to-digital converter in 0.13µm CMOS. CICC 2010: 1-4
2000 – 2009
- 2009
- [j12]Yuan Yao, Jie Wu, Yin Shi, Foster F. Dai:
A Fully Integrated 900-MHz Passive RFID Transponder Front End With Novel Zero-Threshold RF-DC Rectifier. IEEE Trans. Ind. Electron. 56(7): 2317-2325 (2009) - [j11]Dayu Yang, Foster F. Dai, Weining Ni, Yin Shi, Richard C. Jaeger:
Delta-Sigma Modulation for Direct Digital Frequency Synthesis. IEEE Trans. Very Large Scale Integr. Syst. 17(6): 793-802 (2009) - [c25]Peng Yu, Zheng Gong, Ming Gu, Yin Shi, Foster F. Dai:
A 430MHz-2.15GHz fractional-N frequency synthesizer for DVB and ABS-S applications. CICC 2009: 247-250 - [c24]George J. Starr, Jie Qin, Bradley F. Dutton, Charles E. Stroud, Foster F. Dai, Victor P. Nelson:
Automated Generation of Built-In Self-Test and Measurement Circuitry for Mixed-Signal Circuits and Systems. DFT 2009: 11-19 - [c23]Zhenqi Chen, Fa Foster Dai:
Effects of LO Phase and Amplitude Imbalances and Phase Noise on M-QAM Transceiver Performance. ISCAS 2009: 197-200 - 2008
- [j10]Vasanth Kakani, Fa Foster Dai:
Design and Analysis of a Transversal Filter RFIC in SiGe Technology. IEEE Des. Test Comput. 25(1): 10-16 (2008) - [j9]Xuefeng Yu, Fa Foster Dai, J. David Irwin, Richard C. Jaeger:
A 12 GHz 1.9 W Direct Digital Synthesizer MMIC Implemented in 0.18 µm SiGe BiCMOS Technology. IEEE J. Solid State Circuits 43(6): 1384-1393 (2008) - [j8]Yuan Yao, Foster F. Dai, Richard C. Jaeger, John D. Cressler:
A 12-Bit Cryogenic and Radiation-Tolerant Digital-to-Analog Converter for Aerospace Extreme Environment Applications. IEEE Trans. Ind. Electron. 55(7): 2810-2819 (2008) - [c22]Fa Foster Dai, Howard C. Luong:
Session 5 - Broadband circuit techniques for emerging wireless communications. CICC 2008 - [c21]Fa Foster Dai, Howard C. Luong:
Session 9 - Broadband circuit techniques for emerging wireless communications. CICC 2008 - [c20]Yin Shi, Foster F. Dai, Jun Yan, Xueqing Hu, Hua Xu, Ming Gu, Xuelian Zhang, Qiming Xu, Bei Chen, Fangxiong Chen, Peng Yu, Heping Ma, Fang Yuan, Richard C. Jaeger:
A multifunction transceiver RFIC for 802.11a/b/g WLAN and DVB-H applications. CICC 2008: 249-252 - [c19]Yin Shi, Fa Foster Dai, Jun Yan, Hua Xu, Xuelian Zhang, Heping Ma, Fang Yuan, Xin Guan, Richard C. Jaeger:
A fully integrated zero-IF mobile TV tuner RFIC for S-band CMMB application. CICC 2008: 253-256 - [c18]Xuefeng Yu, Fa Foster Dai, Dayu Yang, J. David Irwin, Richard C. Jaeger:
An X/Ku-band frequency synthesizer using a 9-Bit quadrature DDS. CICC 2008: 491-494 - [c17]Xueyang Geng, Xuefeng Yu, Fa Foster Dai, J. David Irwin, Richard C. Jaeger:
An 11-bit 8.6GHz direct digital synthesizer MMIC with 10-bit segmented nonlinear DAC. ESSCIRC 2008: 362-365 - 2007
- [j7]Jie Qin, Charles E. Stroud, Fa Foster Dai:
FPGA-Based Analog Functional Measurements for Adaptive Control in Mixed-Signal Systems. IEEE Trans. Ind. Electron. 54(4): 1885-1897 (2007) - [c16]Ling Yuan, Weining Ni, Yin Shi, Foster F. Dai:
A 10-bit 2GHz Current-Steering CMOS D/A Converter. ISCAS 2007: 737-740 - [c15]Jie Qin, Charles E. Stroud, Foster F. Dai:
Noise Figure Measurement Using Mixed-Signal BIST. ISCAS 2007: 2180-2183 - 2006
- [j6]John W. M. Rogers, Foster F. Dai, Calvin Plett, Mark S. Cavin:
Design and Characterization of a 5.2 GHz/2.4 GHz ΣΔ Fractional-N Frequency Synthesizer for Low-Phase Noise Performance. EURASIP J. Wirel. Commun. Netw. 2006 (2006) - [j5]Fa Foster Dai, Weining Ni, Yin Shi, Richard C. Jaeger:
A direct digital frequency synthesizer with fourth-order phase domain ΔΣ noise shaper and 12-bit current-steering DAC. IEEE J. Solid State Circuits 41(4): 839-850 (2006) - [j4]Foster F. Dai, Charles E. Stroud, Dayu Yang:
Automatic linearity and frequency response tests with built-in pattern generator and analyzer. IEEE Trans. Very Large Scale Integr. Syst. 14(6): 561-572 (2006) - [c14]Dayu Yang, Weining Ni, Fa Foster Dai, Yin Shi, Richard C. Jaeger:
Delta-Sigma Modulation in Direct Digital Frequency Synthesis. CICC 2006: 523-526 - [c13]Weining Ni, Xueyang Geng, Yin Shi, Foster F. Dai:
A 12-bit 300 MHz CMOS DAC for high-speed system applications. ISCAS 2006 - [c12]Charles E. Stroud, Dayu Yang, Foster F. Dai:
Analog frequency response measurement in mixed-signal systems. ISCAS 2006 - [c11]Oimins Xu, Xueqing Hu, Pens Gao, Jun Yan, Yin Shi, Foster F. Dai, Richard C. Jaeger:
A direct-conversion mixer with DC-offset cancellation for IEEE 802.11a WLAN receiver. ISCAS 2006 - [c10]Yuan Yao, Xuefeng Yu, Foster F. Dai, Richard C. Jaeger:
A 12-bit current steering DAC for cryogenic applications. ISCAS 2006 - 2005
- [j3]John W. M. Rogers, Foster F. Dai, Mark S. Cavin, David G. Rahn:
A multiband ΔΣ fractional-N frequency synthesizer for a MIMO WLAN transceiver RFIC. IEEE J. Solid State Circuits 40(3): 678-689 (2005) - [j2]David G. Rahn, Mark S. Cavin, Fa Foster Dai, Neric H. W. Fong, Richard Griffith, José Macedo, A. David Moore, John W. M. Rogers, Mike Toner:
A fully integrated multiband MIMO WLAN transceiver RFIC. IEEE J. Solid State Circuits 40(8): 1629-1641 (2005) - [c9]Yuan Yao, Yin Shi, Foster F. Dai:
A novel low-power input-independent MOS AC/DC charge pump. ISCAS (1) 2005: 380-383 - [c8]Vasanth Kakani, Foster F. Dai, Richard C. Jaeger:
An high speed integrated equalizer for dispersion compensation in 10Gb/s fiber networks. ISCAS (2) 2005: 1178-1181 - [c7]Dayu Yang, Foster F. Dai, Charles E. Stroud:
Built-in self-test for automatic analog frequency response measurement. ISCAS (3) 2005: 2208-2211 - [c6]Xuefeng Yu, Foster F. Dai, Yin Shi, Ronghua Zhu:
2 GHz 8-bit CMOS ROM-less direct digital frequency synthesizer. ISCAS (5) 2005: 4397-4400 - [c5]Foster F. Dai, Shengfang Wei, Richard C. Jaeger:
Integrated blind electronic equalizer for fiber dispersion compensation. ISCAS (6) 2005: 5750-5753 - 2004
- [c4]Malinky Ghosh, Lakshmi S. J. Chimakurthy, Foster F. Dai, Richard C. Jaeger:
A novel DDS architecture using nonlinear ROM addressing with improved compression ratio and quantisation noise. ISCAS (2) 2004: 705-708 - [c3]Vasanth Kakani, Foster F. Dai, Richard C. Jaeger:
Delay analysis and optimal biasing for high speed low power Current Mode Logic circuits. ISCAS (2) 2004: 869-872 - [c2]Foster F. Dai, Charles E. Stroud, Dayu Yang, Shuying Qi:
Automatic Linearity (IP3) Test with Built-in Pattern Generator and Analyzer. ITC 2004: 271-280 - 2003
- [c1]John W. M. Rogers, Mark S. Cavin, Fa Foster Dai, David G. Rahn:
A ΔΣ fractional-N frequency synthesizer with a multi-band PMOS VCOs for 2.4 and 5GHz WLAN applications. ESSCIRC 2003: 651-654 - 2001
- [j1]Chwan-Hwa John Wu, J. David Irwin, Fa Foster Dai:
Enabling multimedia applications for factory automation. IEEE Trans. Ind. Electron. 48(5): 913-919 (2001)
Coauthor Index
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