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ORCIDHongil Yoon
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2020 – today
- 2023
[c17]Yejin Lee, Donghyun Lee, JungUk Hong, Jae W. Lee, Hongil Yoon:
Not All Neighbors Matter: Point Distribution-Aware Pruning for 3D Point Cloud. AAAI 2023: 1240-1249- [c16]Hyeongjun Kim, Taegun Yim, Choong Keun Lee, Hongil Yoon:
A picowatt CMOS voltage reference with 0.046 %/V line sensitivity for a low-power IoT system. ISOCC 2023: 45-46 - 2022
- [j13]Jeongbin Kim
, Yongwoon Song, Kyungseon Cho, Hyukjun Lee, Hongil Yoon, Eui-Young Chung:
STT-MRAM-Based Multicontext FPGA for Multithreading Computing Environment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(5): 1330-1343 (2022) - 2021
- [c15]Taegun Yim, Choong Keun Lee, Hongil Yoon:
A High Speed Modified Dickson Charge Pump. ISCAS 2021: 1-5 - [c14]Sam Son, Seung Yul Lee, Yunho Jin, Jonghyun Bae, Jinkyu Jeong, Tae Jun Ham, Jae W. Lee, Hongil Yoon:
ASAP: Fast Mobile Application Switch via Adaptive Prepaging. USENIX ATC 2021: 365-380 - 2020
- [i1]Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Srikant Bharadwaj, Gabe Black, Gedare Bloom, Bobby R. Bruce, Daniel Rodrigues Carvalho, Jerónimo Castrillón, Lizhong Chen, Nicolas Derumigny, Stephan Diestelhorst, Wendy Elsasser, Marjan Fariborz, Amin Farmahini Farahani, Pouya Fotouhi, Ryan Gambord, Jayneel Gandhi, Dibakar Gope, Thomas Grass, Bagus Hanindhito, Andreas Hansson, Swapnil Haria, Austin Harris, Timothy Hayes, Adrian Herrera, Matthew Horsnell, Syed Ali Raza Jafri, Radhika Jagtap, Hanhwi Jang, Reiley Jeyapaul, Timothy M. Jones, Matthias Jung, Subash Kannoth, Hamidreza Khaleghzadeh, Yuetsu Kodama, Tushar Krishna, Tommaso Marinelli, Christian Menard, Andrea Mondelli, Tiago Mück, Omar Naji, Krishnendra Nathella, Hoa Nguyen, Nikos Nikoleris, Lena E. Olson, Marc S. Orr, Binh Pham, Pablo Prieto, Trivikram Reddy, Alec Roelke, Mahyar Samani, Andreas Sandberg, Javier Setoain, Boris Shingarov, Matthew D. Sinclair, Tuan Ta, Rahul Thakur, Giacomo Travaglini, Michael Upton, Nilay Vaish, Ilias Vougioukas, Zhengrong Wang, Norbert Wehn, Christian Weis, David A. Wood, Hongil Yoon, Éder F. Zulian:
The gem5 Simulator: Version 20.0+. CoRR abs/2007.03152 (2020)
2010 – 2019
- 2018
- [j12]Vijay Janapa Reddi, Hongil Yoon, Allan Knies:
Two Billion Devices and Counting. IEEE Micro 38(1): 6-21 (2018) - [c13]Hongil Yoon, Jason Lowe-Power, Gurindar S. Sohi:
Filtering Translation Bandwidth with Virtual Caching. ASPLOS 2018: 113-127 - [c12]Choong Keun Lee, Taegun Yim, Hongil Yoon:
Bit-line Sense Amplifier Using PMOS Charge Transfer Pre-amplifier for Low-Voltage DRAM. TENCON 2018: 1357-1361 - [c11]Seungjin Lee, Taegun Yim, Hongil Yoon:
Low-Energy Consumption Write Circuit using Comparing Operation in STT-MRAM. TENCON 2018: 1367-1370 - [c10]Taegun Yim, Seungjin Lee, Choong Keun Lee, Hongil Yoon:
A Low-Voltage Charge Pump with High Pumping Efficiency. TENCON 2018: 2135-2139 - [c9]SeoungMin Lee, Choong Keun Lee, Hongil Yoon:
A New Charge Pump Switch Parallel to Series Connection. TENCON 2018: 2140-2143 - 2017
- [j11]Kangwook Jo, Hongil Yoon:
Variation-Tolerant Sensing Circuit for Ultralow-Voltage Operation of Spin-Torque Transfer Magnetic RAM. IEEE Trans. Circuits Syst. II Express Briefs 64-II(5): 570-574 (2017) - [c8]Kyungseon Cho, Seungjin Lee, Choong Keun Lee, Taegun Yim, Hongil Yoon:
Low power multi-context look-up table (LUT) using spin-torque transfer magnetic RAM for non-volatile FPGA. ISOCC 2017: 107-108 - [c7]Seungjin Lee, Taegun Yim, Choong Keun Lee, Kyungseon Cho, Hongil Yoon:
Energy-efficient write circuit in STT-MRAM based look-up table (LUT) using comparison write scheme. ISOCC 2017: 288-289 - 2016
- [c6]Hongil Yoon, Gurindar S. Sohi:
Revisiting virtual L1 caches: A practical design using dynamic synonym remapping. HPCA 2016: 212-224 - [c5]Kangwook Jo, Kyungseon Cho, Hongil Yoon:
Variation-tolerant and low power look-up table (LUT) using spin-torque transfer magnetic RAM for non-volatile field programmable gate array (FPGA). ISOCC 2016: 101-102 - 2013
- [j10]Sang-uhn Cha, Hongil Yoon:
Self-correcting check bit generator of error correction codes for memories. IEICE Electron. Express 10(6): 20130103 (2013) - 2012
- [c4]Jaeseok Park, Ingeol Lee, Young-Seok Park, Sung-Geun Kim, Kyungho Ryu, Dong-Hoon Jung, Kangwook Jo, Choong Keun Lee, Hongil Yoon, Seong-Ook Jung, Woo-Young Choi, Sungho Kang:
Integration of dual channel timing formatter system for high speed memory test equipment. ISOCC 2012: 185-187
2000 – 2009
- 2007
- [j9]Yunho Jung, Jiho Kim, Seongjoo Lee, Hongil Yoon, Jaeseok Kim:
Design and Implementation of MIMO-OFDM Baseband Processor for High-Speed Wireless LANs. IEEE Trans. Circuits Syst. II Express Briefs 54-II(7): 631-635 (2007) - [c3]Sang-uhn Cha, Hongil Yoon:
High Speed, Minimal Area, and Low Power SEC Code for DRAMs with Large I/O Data Widths. ISCAS 2007: 3026-3029 - 2006
- [j8]Kwisung Yoo, Gunhee Han, Hongil Yoon:
Convergence analysis of the cascade second-order adaptive line equalizer. IEEE Trans. Circuits Syst. II Express Briefs 53-II(6): 507-511 (2006) - 2005
- [c2]Yunho Jung, Jiho Kim, Seungphyo Noh, Hongil Yoon, Jaeseok Kim:
A digital 120Mb/s MIMO-OFDM baseband processor for high speed wireless LANs. CICC 2005: 81-84 - 2004
- [j7]Bongyong Lee, Hongil Yoon, Kyung Sook Hyun, Yong Hwan Kwon, Ilgu Yun:
Investigation of manufacturing variations of planar InP/InGaAs avalanche photodiodes for optical receivers. Microelectron. J. 35(8): 635-640 (2004) - [c1]Byung In Moon, Hongil Yoon, Ilgu Yun, Sungho Kang:
An In-Order SMT Architecture with Static Resource Partitioning for Consumer Applications. PDCAT 2004: 539-544 - 2003
- [j6]Jae-Yoon Sim, Hongil Yoon, Ki-Chul Chun, Hyun-Seok Lee, Sang-Pyo Hong, Kyu-Chan Lee, Jei-Hwan Yoo, Dong-Il Seo, Soo-In Cho:
A 1.8-V 128-Mb mobile DRAM with double boosting pump, hybrid current sense amplifier, and dual-referenced adjustment scheme for temperature sensor. IEEE J. Solid State Circuits 38(4): 631-640 (2003) - [j5]Yunho Jung, Hongil Yoon, Jaeseok Kim:
New efficient FFT algorithm and pipeline implementation results for OFDM/DMT applications. IEEE Trans. Consumer Electron. 49(1): 14-20 (2003)
1990 – 1999
- 1999
- [j4]Hongil Yoon, Gi-Won Cha, Changsik Yoo, Nam-Jong Kim, Keum-Yong Kim, Chang Ho Lee, Kyu-Nam Lim, Kyuchan Lee, Jun-Young Jeon, Tae Sung Jung, Hongsik Jeong, Tae-Young Chung, Kinam Kim, Soo-In Cho:
A 2.5-V, 333-Mb/s/pin, 1-Gbit, double-data-rate synchronous DRAM. IEEE J. Solid State Circuits 34(11): 1589-1599 (1999) - 1998
- [j3]Kyu-Chan Lee, Changhyun Kim, Hongil Yoon, Keum-Yong Kim, Byung-Sik Moon, Sang-Bo Lee, Jung-Hwa Lee, Nam-Jong Kim, Soo-In Cho:
A 1 Gbit synchronous dynamic random access memory with an independent subarray-controlled scheme and a hierarchical decoding scheme. IEEE J. Solid State Circuits 33(5): 779-786 (1998) - [j2]Chang-Hyun Kim, Jung-Hwa Lee, J. B. Lee, Beomsup Kim, C. S. Park, Sang-Bo Lee, S. Y. Lee, C. W. Park, J. G. Roh, Hyoung Sik Nam, D. Y. Kim, D. Y. Lee, Tae-Sung Jung, Hongil Yoon, Soo-In Cho:
A 64-Mbit, 640-MByte/s bidirectional data strobed, double-data-rate SDRAM with a 40-mW DLL for a 256-MByte memory system. IEEE J. Solid State Circuits 33(11): 1703-1710 (1998) - 1997
- [j1]Kyu-Chan Lee, Changhyun Kim, Dong-Ryul Ryu, Jai-Hoon Sim, Sang-Bo Lee, Byung-Sik Moon, Keum-Yong Kim, Nam-Jong Kim, Seung-Moon Yoo, Hongil Yoon, Jei-Hwan Yoo, Soo-In Cho:
Low-voltage, high-speed circuit designs for gigabit DRAMs. IEEE J. Solid State Circuits 32(5): 642-648 (1997)
Coauthor Index
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