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ORCIDYuelin Du
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2010 – 2019
- 2018
[c20]Ting Lu, Yuelin Du:
A Novel Method of Human Tracking Based on Stereo Vision. CCIS 2018: 883-889- [c19]Yuelin Du, Jiaming Liu, Mingkai Chen, Lei Wang, Baoyu Zheng:
Mobility-based Physical-layer Key Generation Scheme for D2D Communications Underlaying Cellular Network. WCSP 2018: 1-5 - 2015
- [c18]Zigang Xiao, Yuelin Du, Martin D. F. Wong
, He Yi, H.-S. Philip Wong, Hongbo Zhang:
Contact pitch and location prediction for Directed Self-Assembly template verification. ASP-DAC 2015: 644-651 - [c17]Daifeng Guo, Yuelin Du, Martin D. F. Wong:
Polynomial time optimal algorithm for stencil row planning in e-beam lithography. ASP-DAC 2015: 658-664 - 2014
- [b1]Yuelin Du:
Optimization for advanced lithography. University of Illinois Urbana-Champaign, USA, 2014 - [c16]Zigang Xiao, Yuelin Du, Haitong Tian, Martin D. F. Wong, He Yi, H.-S. Philip Wong, Hongbo Zhang:
Directed Self-Assembly (DSA) Template Pattern Verification. DAC 2014: 55:1-55:6 - [c15]Yuelin Du, Martin D. F. Wong:
Optimization of standard cell based detailed placement for 16 nm FinFET process. DATE 2014: 1-6 - [c14]Haitong Tian, Yuelin Du, Hongbo Zhang, Zigang Xiao, Martin D. F. Wong:
Triple patterning aware detailed placement with constrained pattern assignment. ICCAD 2014: 116-123 - 2013
- [j2]Zigang Xiao, Yuelin Du, Hongbo Zhang, Martin D. F. Wong:
A Polynomial Time Exact Algorithm for Overlay-Resistant Self-Aligned Double Patterning (SADP) Layout Decomposition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(8): 1228-1239 (2013) - [c13]Yuelin Du, Hongbo Zhang, Qiang Ma, Martin D. F. Wong:
Linear time algorithm to find all relocation positions for EUV defect mitigation. ASP-DAC 2013: 261-266 - [c12]Yuelin Du, Qiang Ma, Hua Song, James P. Shiely, Gerard Luk-Pat, Alexander Miloslavsky, Martin D. F. Wong:
Spacer-is-dielectric-compliant detailed routing for self-aligned double patterning lithography. DAC 2013: 93:1-93:6 - [c11]Zigang Xiao, Yuelin Du, Haitong Tian, Martin D. F. Wong:
Optimally minimizing overlay violation in self-aligned double patterning decomposition for row-based standard cell layout in polynomial time. ICCAD 2013: 32-39 - [c10]Haitong Tian, Yuelin Du, Hongbo Zhang, Zigang Xiao, Martin D. F. Wong:
Constrained pattern assignment for standard cell based triple patterning lithography. ICCAD 2013: 178-185 - [c9]Yuelin Du, Daifeng Guo, Martin D. F. Wong, He Yi, H.-S. Philip Wong, Hongbo Zhang, Qiang Ma:
Block copolymer directed self-assembly (DSA) aware contact layer optimization for 10 nm 1D standard cell library. ICCAD 2013: 186-193 - 2012
- [j1]Jianxin Chen, Yuanyuan Chen, Liang Zhou, Yuelin Du:
A Data Gathering Approach for Wireless Sensor Network with Quadrotor-based Mobile Sink Node. KSII Trans. Internet Inf. Syst. 6(10): 2529-2547 (2012) - [c8]Yuelin Du, Hongbo Zhang, Martin D. F. Wong, Kai-Yuan Chao:
Hybrid lithography optimization with E-Beam and immersion processes for 16nm 1D gridded design. ASP-DAC 2012: 707-712 - [c7]Hongbo Zhang, Yuelin Du, Martin D. F. Wong, Rasit Onur Topaloglu:
Efficient pattern relocation for EUV blank defect mitigation. ASP-DAC 2012: 719-724 - [c6]Yuanyuan Chen, Jianxin Chen, Liang Zhou, Yuelin Du:
A Data Gathering Approach for Wireless Sensor Network with Quadrotor-Based Mobile Sink Node. CWSN 2012: 44-56 - [c5]Hongbo Zhang, Yuelin Du, Martin D. F. Wong, Yunfei Deng, Pawitter Mangat:
Layout small-angle rotation and shift for EUV defect mitigation. ICCAD 2012: 43-49 - [c4]Zigang Xiao, Yuelin Du, Hongbo Zhang, Martin D. F. Wong:
A polynomial time exact algorithm for self-aligned double patterning layout decomposition. ISPD 2012: 17-24 - 2011
- [c3]Hongbo Zhang, Yuelin Du, Martin D. F. Wong, Kai-Yuan Chao:
Mask cost reduction with circuit performance consideration for self-aligned double patterning. ASP-DAC 2011: 787-792 - [c2]Hongbo Zhang, Yuelin Du, Martin D. F. Wong, Rasit Onur Topaloglu:
Self-aligned double patterning decomposition for overlay minimization and hot spot detection. DAC 2011: 71-76 - [c1]Hongbo Zhang, Yuelin Du, Martin D. F. Wong, Kai-Yuan Chao:
Lithography-aware layout modification considering performance impact. ISQED 2011: 437-441
Coauthor Index
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