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ORCIDHaitong Tian
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2010 – 2019
- 2016
[b1]Haitong Tian:
Layout decomposition for triple patterning lithography. University of Illinois Urbana-Champaign, USA, 2016- [c11]Haitong Tian, Martin D. F. Wong
:
Performance evaluation considering mask misalignment in multiple patterning decomposition. ISQED 2016: 192-197 - [r1]Haitong Tian, Martin D. F. Wong:
Layout Decomposition for Multiple Patterning. Encyclopedia of Algorithms 2016: 1059-1062 - 2015
- [c10]Haitong Tian, Hongbo Zhang, Zigang Xiao, Martin D. F. Wong:
An efficient linear time triple patterning solver. ASP-DAC 2015: 208-213 - 2014
- [c9]Zigang Xiao, Yuelin Du, Haitong Tian, Martin D. F. Wong, He Yi, H.-S. Philip Wong, Hongbo Zhang:
Directed Self-Assembly (DSA) Template Pattern Verification. DAC 2014: 55:1-55:6 - [c8]Haitong Tian, Yuelin Du, Hongbo Zhang, Zigang Xiao, Martin D. F. Wong:
Triple patterning aware detailed placement with constrained pattern assignment. ICCAD 2014: 116-123 - 2013
- [j2]Xu He, Tao Huang, Linfu Xiao, Haitong Tian, Evangeline F. Y. Young:
Ripple: A Robust and Effective Routability-Driven Placer. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(10): 1546-1556 (2013) - [c7]Zigang Xiao, Yuelin Du, Haitong Tian, Martin D. F. Wong:
Optimally minimizing overlay violation in self-aligned double patterning decomposition for row-based standard cell layout in polynomial time. ICCAD 2013: 32-39 - [c6]Haitong Tian, Yuelin Du, Hongbo Zhang, Zigang Xiao, Martin D. F. Wong:
Constrained pattern assignment for standard cell based triple patterning lithography. ICCAD 2013: 178-185 - 2012
- [j1]Haitong Tian, Wai-Chung Tang, Evangeline F. Y. Young, Cliff C. N. Sze:
Postgrid Clock Routing for High Performance Microprocessor Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(2): 255-259 (2012) - [c5]Fuqiang Qian, Haitong Tian, Evangeline F. Y. Young:
Crosslink insertion for variation-driven clock network construction. ACM Great Lakes Symposium on VLSI 2012: 321-326 - [c4]Haitong Tian, Hongbo Zhang, Qiang Ma, Zigang Xiao, Martin D. F. Wong:
A polynomial time triple patterning algorithm for cell based row-structure layout. ICCAD 2012: 57-64 - 2011
- [c3]Xu He, Tao Huang, Linfu Xiao, Haitong Tian, Guxin Cui, Evangeline F. Y. Young:
Ripple: An effective routability-driven placer by iterative cell movement. ICCAD 2011: 74-79 - [c2]Haitong Tian, Wai-Chung Tang, Evangeline F. Y. Young, Cliff C. N. Sze:
Grid-to-ports clock routing for high performance microprocessor designs. ISPD 2011: 21-28 - 2010
- [c1]Linfu Xiao, Zigang Xiao, Zaichen Qian, Yan Jiang, Tao Huang, Haitong Tian, Evangeline F. Y. Young:
Local clock skew minimization using blockage-aware mixed tree-mesh clock network. ICCAD 2010: 458-462
Coauthor Index
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