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ORCIDSai Pentapati
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- affiliation: Georgia Institute of Technology, Atlanta, GA, USA
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2020 – today
- 2024
[j9]Sai Pentapati
, Kyungwook Chang, Sung Kyu Lim:
Pin-3D: Effective Physical Design Methodology for Multidie Co-Optimization in Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(4): 1009-1022 (2024)- [j8]Yen-Hsiang Huang, Sai Pentapati, Anthony Agnesina, Moritz Brunion, Sung Kyu Lim:
On Legalization of Die Bonding Bumps and Pads for 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(9): 2741-2754 (2024) - [j7]Sai Pentapati, Sung Kyu Lim:
Heterogeneous Monolithic 3-D IC Designs: Challenges, EDA Solutions, and Power, Performance, Cost Tradeoffs. IEEE Trans. Very Large Scale Integr. Syst. 32(3): 413-421 (2024) - 2023
- [j6]Pruek Vanna-Iampikul, Chengjia Shao, Yi-Chen Lu, Sai Pentapati, Yun Heo, Jae-Seung Choi, Sung Kyu Lim:
Snap-3D: A Constrained Placement-Driven Physical Design Methodology for High Performance 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2331-2335 (2023) - [j5]Yi-Chen Lu, Siddhartha Nath, Sai Pentapati, Sung Kyu Lim:
ECO-GNN: Signoff Power Prediction Using Graph Neural Networks with Subgraph Approximation. ACM Trans. Design Autom. Electr. Syst. 28(4): 55:1-55:22 (2023) - [c13]Sai Pentapati, Anthony Agnesina, Moritz Brunion, Yen-Hsiang Huang, Sung Kyu Lim:
On Legalization of Die Bonding Bumps and Pads for 3D ICs. ISPD 2023: 62-70 - 2022
- [j4]Yi-Chen Lu, Sai Pentapati, Lingjun Zhu, Gauthaman Murali, Kambiz Samadi, Sung Kyu Lim:
A Machine Learning-Powered Tier Partitioning Methodology for Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4575-4586 (2022) - [j3]Sai Pentapati, Sung Kyu Lim:
Metal Layer Sharing: A Routing Optimization Technique for Monolithic 3D ICs. IEEE Trans. Very Large Scale Integr. Syst. 30(9): 1355-1367 (2022) - [c12]Sai Pentapati, Sung Kyu Lim:
Routing Layer Sharing: A New Opportunity for Routing Optimization in Monolithic 3D ICs. ISPD 2022: 127-134 - 2021
- [j2]Lingjun Zhu, Lennart Bamberg, Sai Surya Kiran Pentapati, Kyungwook Chang, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Brian Cline, Saurabh Sinha, Xiaoqing Xu, Alberto García-Ortiz, Sung Kyu Lim:
High-Performance Logic-on-Memory Monolithic 3-D IC Designs for Arm Cortex-A Processors. IEEE Trans. Very Large Scale Integr. Syst. 29(6): 1152-1163 (2021) - [c11]Sai Surya Kiran Pentapati, Sung Kyu Lim:
Heterogeneous Monolithic 3D ICs: EDA Solutions, and Power, Performance, Cost Tradeoffs. DAC 2021: 925-930 - [c10]Yi-Chen Lu, Sai Pentapati, Sung Kyu Lim:
The Law of Attraction: Affinity-Aware Placement Optimization using Graph Neural Networks. ISPD 2021: 7-14 - [c9]Pruek Vanna-Iampikul, Chengjia Shao, Yi-Chen Lu, Sai Pentapati, Sung Kyu Lim:
Snap-3D: A Constrained Placement-Driven Physical Design Methodology for Face-to-Face-Bonded 3D ICs. ISPD 2021: 39-46 - [c8]Sai Surya Kiran Pentapati, Bon Woong Ku, Sung Kyu Lim:
ML-Based Wire RC Prediction in Monolithic 3D ICs with an Application to Full-Chip Optimization. ISPD 2021: 75-82 - 2020
- [c7]Yi-Chen Lu, Sai Surya Kiran Pentapati, Lingjun Zhu, Kambiz Samadi, Sung Kyu Lim:
TP-GNN: A Graph Neural Network Framework for Tier Partitioning in Monolithic 3D ICs. DAC 2020: 1-6 - [c6]Lennart Bamberg, Alberto García Ortiz, Lingjun Zhu, Sai Pentapati, Da Eun Shim, Sung Kyu Lim:
Macro-3D: A Physical Design Methodology for Face-to-Face-Stacked Heterogeneous 3D ICs. DATE 2020: 37-42 - [c5]Sai Surya Kiran Pentapati, Kyungwook Chang, Vassilios Gerousis, Rwik Sengupta, Sung Kyu Lim:
Pin-3D: A Physical Synthesis and Post-Layout Optimization Flow for Heterogeneous Monolithic 3D ICs. ICCAD 2020: 4:1-4:9 - [c4]Yi-Chen Lu, Siddhartha Nath, Sai Surya Kiran Pentapati, Sung Kyu Lim:
A Fast Learning-Driven Signoff Power Optimization Framework. ICCAD 2020: 161:1-161:9
2010 – 2019
- 2019
- [j1]Sai Pentapati, Lingjun Zhu, Lennart Bamberg, Da Eun Shim, Alberto García Ortiz, Sung Kyu Lim:
A Logic-on-Memory Processor-System Design With Monolithic 3-D Technology. IEEE Micro 39(6): 38-45 (2019) - [c3]Sai Surya Kiran Pentapati, Da Eun Shim, Sung Kyu Lim:
Logic Monolithic 3D ICs: PPA Benefits and EDA Tools Necessary. ACM Great Lakes Symposium on VLSI 2019: 445-450 - [c2]Da Eun Shim, Sai Pentapati, Jeehyun Lee, Yun Seop Yu, Sung Kyu Lim:
Tier Partitioning and Flip-flop Relocation Methods for Clock Trees in Monolithic 3D ICs. ISLPED 2019: 1-6 - 2018
- [c1]Kyungwook Chang, Sai Pentapati, Da Eun Shim, Sung Kyu Lim:
Road to High-Performance 3D ICs: Performance Optimization Methodologies for Monolithic 3D ICs. ISLPED 2018: 33:1-33:6
Coauthor Index
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