"Snap-3D: A Constrained Placement-Driven Physical Design Methodology for ..."

Pruek Vanna-Iampikul et al. (2023)

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DOI: 10.1109/TCAD.2022.3218763

access: closed

type: Journal Article

metadata version: 2023-09-30

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Pruek Vanna-Iampikul, Chengjia Shao, Yi-Chen Lu, Sai Pentapati, Yun Heo, Jae-Seung Choi, Sung Kyu Lim:
Snap-3D: A Constrained Placement-Driven Physical Design Methodology for High Performance 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2331-2335 (2023)

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